NXP Semiconductors freescale semiconductor CSM12D User manual

Freescale Semiconductor SLKS12DT256UG
UserGuide Rev. 1, 9/2007
© Freescale Semiconductor, Inc., 2006. All rights reserved.
_______________________________________________________________________
APPLICATION MODULE STUDENT LEARNING
KIT FEATURING FREESCALE MC9S12DT256
For use with the following part numbers:
CSM12D with MC9S12DT256 chipset
APS12DT256SLK
PBS12DT256SLK

CONTENTS
CAUTIONARY NOTES ..............................................................................................................4
TERMINOLOGY.........................................................................................................................4
FEATURES................................................................................................................................5
REFERENCES...........................................................................................................................5
REFERENCES...........................................................................................................................6
GETTING STARTED..................................................................................................................7
OPERATING MODES................................................................................................................7
RUN MODE........................................................................................................................... 7
DEBUG MODE......................................................................................................................8
DEVELOPMENT SUPPORT......................................................................................................9
SOFTWARE DEVELOPMENT.............................................................................................. 9
MEMORY MAP......................................................................................................................9
BDM_PORT HEADER......................................................................................................... 10
EXPANDED MODE OPERATION....................................................................................... 10
MODE.............................................................................................................................. 10
POWER....................................................................................................................................10
POWER SELECT................................................................................................................ 11
PWR_SEL....................................................................................................................... 11
RESET SWITCH ......................................................................................................................11
LOW VOLTAGE RESET..........................................................................................................12
TIMING.....................................................................................................................................12
COMMUNICATIONS................................................................................................................12
RS-232 ................................................................................................................................ 12
COM CONNECTOR........................................................................................................ 13
MSCAN................................................................................................................................ 14
VRH/VRL..................................................................................................................................14
USER I/O..................................................................................................................................15
SWITCHES.......................................................................................................................... 15
LED’S .................................................................................................................................. 15
POT..................................................................................................................................... 15
PHOTO-SENSOR ............................................................................................................... 15
SIGNALS............................................................................................................................. 16
ENABLES............................................................................................................................ 16
MCU I/O PORT.........................................................................................................................17
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TABLE OF FIGURES
Figure 1: BDM_PORT...............................................................................................................10
Figure 2: MODE Option Header ...............................................................................................10
Figure 3: PWR_SEL Option Header.........................................................................................11
Figure 4: COM_EN Header ......................................................................................................13
Figure 5: COM Connector.........................................................................................................13
Figure 6. CAN_PORT Connector ............................................................................................14
Figure 7: Connector J1.............................................................................................................17
TABLE OF TABLES
Table 1: DT256 Memory Map.....................................................................................................9
Table 2: COM Connections ......................................................................................................12
Table 3: ATD Reference Voltage..............................................................................................14
Table 4: User I/O......................................................................................................................16
Table 5: USER Option Header .................................................................................................16
Revision History
Date Rev Comments
September 1, 2006 0 Initial Release
September 17, 2007 1 Doc ID Changed from SLK0102UG; Updated
Reference Materials
Freescale Semiconductor 3

CAUTIONARY NOTES
1) Electrostatic Discharge (ESD) prevention measures should be used when handling this
product. ESD damage is not a warranty repair item.
2) Axiom Manufacturing does not assume any liability arising out of the application or use of
any product or circuit described herein; neither does it convey any license under patent
rights or the rights of others.
3) EMC Information on the APS12DT256SLK board:
a) This product as shipped from the factory with associated power supplies and cables, has
been verified to meet with requirements of CE and the FCC as a CLASS B product.
b) This product is designed and intended for use as a development platform for hardware or
software in an educational or professional laboratory.
c) In a domestic environment, this product may cause radio interference in which case the
user may be required to take adequate prevention measures.
d) Attaching additional wiring to this product or modifying the products operation from the
factory default as shipped may effect its performance and cause interference with nearby
electronic equipment. If such interference is detected, suitable mitigating measures should
be taken.
TERMINOLOGY
This development module uses option select jumpers to configure default board operation.
Terminology for application of the option jumpers is as follows:
Jumper – a plastic shunt that connects 2 terminals electrically
Jumper on, in, or installed - jumper is installed such that 2 pins are connected together
Jumper off, out, or idle - jumper is installed on 1 pin only. It is recommended that
jumpers be idled by installing on 1 pin so they will not be lost.
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FEATURES
The APS12DT256SLK is an educational development module supporting the Freescale
MC9S12DT256 microcontroller (MCU). Application module SLK’s include components for out-
of-box operation and are preprogrammed with a serial monitor to make application
development quick and easy. A background DEBUG port is provided for development tool use
and is compatible with HCS12 BDM interface cables and software. The 60-pin connector
allows the APS12DT256SLK module to be connected to an expanded evaluation environment
such as the Microcontroller Project Board Student Learning Kit (PBMCUSLK) or user’s custom
PCB.
•Optional power Input/Output from ConnectorJ1
Features: •User Components Provided
•1 DIP Switch, 4-pos
•MC9S12DT256 MCU, 80 LQFP •3 Push Button Switches: 2 User, RESET
•256 KB Flash EEPROM •5 LED Indicators: 4 User, +5V
•4KB EEPROM •Jumpers
•12 KB RAM •USER_EN
•SAE J1850 Byte Data Link Controller •PWR_SEL
•8-ch, 10-bit, ATD w/ external trigger •COM_EN
•8-bit Enhanced Capture Timer with IC, OC,
and Pulse Accumulate capabilities •Connectors
•60-pos pin-header providing access to MCU
IO signals
•7-ch, 8-bit PWM
•9 KBI inputs •2.0mm barrel connector power input
•56 GPIO •6-pin BDM interface connector
•3 CAN Channels •3-pos CAN interface connector
•CAN 2.0 A/B PHY w/ 3-pos header •DB9 connector
•2 SCI & 2 SPI Channels •Supplied with DB9 Serial Cable, Power Supply,
Documentation (CD), and Manual
•1 IIC Channel
•RS-232 transceiver w/ DB9 connector
•4 MHz Clock Oscillator Specifications:
•Low Voltage Reset Supervisor Module Size 3.5” x 2.5”
•Power Input Selection Header Power Input: +9V typical, +6V to +20V
•On-board 5V regulator

REFERENCES
The latest product information, updates and reference documents can be found at
www.freescale.com and/or www.axman.com
SLKS12DT256UG.pdf APS12DT256SLK User Guide (this document)
APS12DT256SLKSCHEM.pdf APS12DT256SLK Schematic
9S12DT256_ZIP.zip MC9S12DT256 Device User Guide
APS12DT256PG.pdf Quick Start Guide for stand alone module operation
APS12DT256_DEMO.zip CodeWarrior Project to support APS12DT256PG
The following reference documents are available online for using the application module in
conjunction with the Freescale Microcontroller Project Board Student Learning Kit:
PBS12DT256PG.pdf Quick Start Guide for module use with Microcontroller
Project Board (PBMCUSLK)
PBS12DT256_DEMO.zip CodeWarrior Project to support PBS12DT256PG
Visit www.freescale.com\universityprogram for current product information, reference materials
and updates.
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GETTING STARTED
Please refer to the APS12DT256SLK Quick Start Users Guide to quickly setup the stand-alone
application module or PBS12DT256SLK Quick Start Users Guide to get started with the
microcontroller project board (PBMCUSLK).
OPERATING MODES
The APS12DT256SLK board operates in two operating modes: Run Mode, or Debug Mode.
Run Mode allows user application code to execute from Power-On or Reset. Debug Mode
supports the development and debug of application code. See the related sections below for
quickly starting the board in the desired operation mode.
RUN MODE
Run mode allows user application to execute when power is applied to the board. Use the
following settings to configure the APS12DT256SLK board for RUN Mode to get started
quickly.
1. Connect a COM port serial communication cable between board and host PC if needed for
the application. Launch supporting host communication software as needed.
2. Connect auxiliary equipment to board as required by application.
3. Apply power to the board.
4. The programmed application should begin to execute.
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DEBUG MODE
Debug Mode supports application development and debug. Debug mode is available to the
user through the factory loaded serial monitor, integrated USB-BDM on the PBMCUSLK or an
external HC(S)12 BDM cable. Refer to the PBMCUSLK User Guide for details on using the
integrated USB-BDM.
The steps below describe the steps to put a device in debug mode using the serial cable OR
BDM options.
1. Install and launch the latest CodeWarrior Development Studio.
2. Configure Application specific components. Set jumpers, connect auxiliary equipment to
the module, connect COM port, and launch supporting host communication software, as
needed by the application.
A DB9 serial communications (COM) cable supports the use of serial programming. The steps
below describe using a serial DB9 cable with CodeWarrior for programming and debug.
i. Power-On the device.
ii. Connect COM port serial communication cable between application module and host
PC.
iii. Press and hold simultaneously SW1 and RESET push buttons.
iv. Continue holding SW1 while releasing RESET. Wait 3 seconds, and then release
SW1. The serial monitor is now waiting for the development software to establish
DEBUG communication.
v. Verify that your CodeWarrior debug target is HCS12Serial Monitor.
A 6-pin BDM interface header (BDM_PORT) supports the use of an external HC(S)12 BDM
cable. The steps below describe using an external HC(S)12 BDM cable to access DEBUG
mode.
i. Connect the HC(S)12 BDM cable to the BDM_PORT header.
ii. Connect the supplied USB cable between an available USB port on the host PC and
the USB connector on the board.
iii. Verify that your CodeWarrior debug target is “P&E MultiLink/Cyclone” (or as required
by your hardware selection).
3. Compile project and execute debugger in CodeWarrior. The development software will
establish the DEBUG communication.
NOTE
Upon hardware RESET, the device will default to RUN mode. You will need to do parts of the
above steps to get the hardware back in to DEBUG mode.
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DEVELOPMENT SUPPORT
SOFTWARE DEVELOPMENT
Software development will require the use of an HC(S)12 assembler or compiler and a host PC
operating a debug interface. Supplied with this board is the CodeWarrior Development Studio
along with the Axiom IDE for Windows for debugging and flash programming.
MEMORY MAP
The APS12DT256SLK is designed to support the MC9S12D family of MCU’s specifically the
MC9S12DT256. This section shows the default memory map for both MCU’s immediately out
of reset. Refer to the Device User Guide for the specific MCU installed for further details.
Table 1: DT256 Memory Map
0x0000 –
0x03FF Registers 1K bytes Mappable to any 2K block in the first 32K
0x0400 –
0x0FFF EEPROM 4K bytes Mappable to any 4K block. Bottom 1K used by Registers out of reset
0x1000 –
0x3FFF RAM 12K bytes Mappable to any 16K block and alignable top or bottom
0x4000 –
0x7FFF Fixed FLASH 16K bytes Dependant on state of ROMHM bit
0x8000 –
0xBFFF Paged FLASH 256K bytes 16 – 16K pages
0xC000 –
0xFEFF Fixed Flash 16K bytes
0xFF00 –
0xFFFF Vectors 256 bytes BDM if active
NOTE: The bottom 1K of EEPROM is covered by Registers out of reset.
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BDM_PORT HEADER
A 6-pin BDM port header allows connection of a HC(S)12 compatible BDM cable for
application development. Refer to the BDM cable documentation for details on use of the
BDM cable with this module.
Figure 1: BDM_PORT
MODC/BKGD 1 2 GND
3 4 RESET*
5 6 VDD
See the HC12 Reference Manual for
complete DEBUG documentation
EXPANDED MODE OPERATION
For the APS12DT256SLK module, expanded mode operation is supported and available to the
user. All signals necessary to implement the multiplexed bus are available at connector J1.
The MODE option header is used to configure the module for expanded bus mode operation.
Refer to the 9S12DT256 Device User Guide for details on implementing the expanded bus.
MODE
By default, the MC9S12DT256 MCU’s are configured for single-chip operation. The MODE
option header allows the user to configure the board for expanded bus operation. In default
configuration, this header is not installed in default configurations.
Figure 2: MODE Option Header
MODB 3 4 Shunt pulls MODB input high
MODA 1 2 Shunt pulls MODA input high
MODE
NOTE: Expanded bus mode operation is supported only when a 9S12DT256 MCU is installed
on the MCU.
POWER
The APS12DT256SLK is designed to be used with and powered from the PBMCUSLK. The
APS12DT256SLK will source power from the PBMCUSLK through connector J1. The module
may also be used as a stand-alone platform. As a stand-alone platform, the module may be
powered through the 2.1mm barrel connector and on-board regulator or through connector J1.
The module may also be configured to provide power to external circuitry connected to J1.
When powering external circuitry, do not exceed the maximum output current limit of the on-
board regulator.
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The on-board voltage regulator (VR1) accepts power input through a 2.1mm barrel connector
(PWR). Input voltage may range from +7V to +18V. The voltage regulator (VR1) provides a
+5V fixed output voltage with current output limited to 250mA. Over-temperature and over-
current limit built into the voltage regulator provides protection from excessive stresses. Do
not exceed the maximum output current limit of VR1 when attempting to power off-board
circuitry through connector J1.
POWER SELECT
Power may be applied to the board through a 2.0mm barrel connector, or through connector
J1. Optionally, power may be routed through connector J1 to supply external circuitry. Power
selection is achieved by using a 4-pos selection header. When attached to the PBMCUSLK,
power is provide by the project board through connector J1.
Use caution when configuring this selection header. Applying power to the module through the
on-board regulator and connector J1 at the same time may cause damage to the module.
PWR_SEL
Figure 3: PWR_SEL Option Header
VDD 4 3
VX 2 1 Source power input from barrel connector PWR.
PWR_SEL
VDD 4 3
VX 2 1 Source power input from connector J1.
PWR_SEL
VDD 4 3
VX 2 1
PWR_SEL
Source power from barrel connector PWR and supply power to external
circuitry connected to J1.
NOTE: Exercise caution when configuring this selection header. Improper configuration may
damage the module.
RESET Switch
The RESET switch provides a method to apply an asynchronous RESET to the MCU. The
RESET switch is connected directly to the RESET* input on the MCU. Pressing the RESET
switch applies a low voltage level to the RESET* input. Pressing the reset switch causes the
reset supervisor at LV1 to assert RESET for 150 ms. A pull-up bias resistor allows normal
MCU operation. Shunt capacitance ensures an adequate input pulse width.

Low Voltage RESET
A DS1813, low-voltage supervisor at LV1 protects the APS12DT256SLK under-voltage conditions.
LV1 will assert RESET when the 5V rail falls below the trip point of 4.62V. LV1 will assert RESET for
approximately 150ms after voltage returns to nominal.
TIMING
Timing input to the MCU is provided by a 4 MHz, fundamental frequency, crystal oscillator. The
oscillator exhibits a frequency tolerance of ±30ppm. The timing input is configured for full-
swing Pierce mode operation in both MCU configurations.
The XCLKS output is routed to test point VIA located near the MCU. The internal clock
ECLKX2 is available at this via if needed.
COMMUNICATIONS
The APS12DT256SLK module provides the user with 1 COM port and 1 CAN port on the
module. COM1 is links to SCI0 on the MCU. The RS-232 channel is configured as a DCE
device. This allows a straight through cable between the module and the host PC.
Also, the MCU provides 2 additional CAN ports, 2 SPI ports, and 1IIC port. Access to these
communications ports is provided through connector J1. Physical layer support is not provide
for these feature and must be provided by the user in needed. Refer to the MCU Device User
Guide for details
RS-232
An RS-232 translator provides RS-232 to TTL/CMOS logic level translation on the COM
connector. The COM connector is a 9-pin Dsub, right-angle connector. A ferrite bead on
shield ground provides conducted immunity protection. Communication signals TXD and RXD
are routed from the transceiver to the MCU. Communications signals TXD and RXD also
connect to general purpose Port S signals on the MCU.
Table 2: COM Connections
MCU Port COM Signal I/O PORT
CONNECTOR
PS1/TXD0 TXD0 J1-5
PS0/RXD0 RXD1 J1-7
PS3/TXD1 TXD1 J1-40
PS2/RSXD1 RXD1 J1-38
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Communications signals Tx/Rx route to connector J1 for use off-module if desired. When
using these signal to drive off-module RS-232 devices or when attempting alternate
communications protocols such at IrDA or LIN, the user should disconnect the on-board RS-
232 transceiver. The COM_EN header block allows the user to selectively disable each of the
4 communications signals.
Figure 4: COM_EN Header
1 2 TX Enable/Disable TX to transceiver
3 4 RX Enable/Disable RX to transceiver
COM_EN
COM Connector
A standard 9-pin Dsub connectors provide external connection for COM1. The Dsub shell is
connected to board ground through a ferrite bead. The ferrite bead provides noise isolation on
the RS-232 connection. The figure below details the DB9 connector.
Figure 5: COM Connector
1 6
TXD 2 7 RTS
RXD 3 8 CTS
4 9 NC
GND 5
Female DB9 connector that interfaces to the MCU internal SCI0 serial port via
the RS232 transceiver. It provides simple 2 wire asynchronous serial
communications without flow control. Flow control is provided at test points
on the board. A straight-through cable is used to connect the module to a DTE
device such as a host PC.
Pins 1, 4, and 6 are connected together.
Pins 7 and 8 are connected together.

MSCAN
The APS12DT256SLK provides one PCA82C250 high-speed CAN physical interface. A 3-pin
connector provides connectivity to the off-board CAN bus. The CAN PHY connects to the
CAN0 channel on the MCU. The PHY supports data rates up to 1 Mbps with slew-rate control.
The figure below shows the pin-out of the CAN_PORT connector.
Figure 6. CAN_PORT Connector
1 CAN_H
2 GND
3 CAN_L
The CAN PHY connects to the CAN0
channel in the MCU
Also the MCU provides support for additional CAN channels. All CAN channels supported are
routed to the connector J1 for use if needed. Consult the Device User Guide for the installed
MCU for further details.
VRH/VRL
MCU inputs VRH and VRL provide the upper and lower voltage reference for the analog to
digital (ATD) converter. By default, VRH is tied to VDD and VRL is tied to ground. Adequate
filtering has been added to provide a voltage reference with minimal ripple. Either, or both,
references may be isolated to provide alternate ATD input references. A test point via on each
signal, labeled VRH, or VRL, provides an easy way to attach an alternate reference voltage.
A 0-ohm configuration resistor allows isolation of each reference voltage. Removing R10
isolates VRH while removing R12 isolates VRL. Install a suitably sized 0-ohm resistors in
these locations to restore the board to its default configuration.
Care must be exercised when using alternate input references. The associated configuration
resistor must be removed before applying an alternate voltage reference or the board may be
damaged. Also, no input protection is provided; incorrect configuration will damage the MCU.
The table below summarizes the changes necessary to use alternate VRH and/or VRL.
Table 3: ATD Reference Voltage
Installed (Default) Removed
R4 VRH = VDD VRH provided by user
R5 VRL = GND VRL provided by user
NOTE: Damage to the board may result if an alternate reference voltage is attached without
first removing the associated configuration resistor.
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USER I/O
User I/O includes 2 push button switches, one 4-position DIP switch, 4 green LEDs, a
potentiometer, and a photo-sensor. The sections below provide details on each User I/O. The
User option header block enables or disables each User I/O individually.
Switches
The APS12DT256SLK target board provides 2 push button switches and one 4-position DIP
switch for user input. Each push button switch is an active low input with a pull-up resistor bias
to prevent indeterminate input conditions. Pressing a push-button switch causes a low logic
input on the associated input.
Each DIP switch position is an active low input. Use of the DIP switches requires enabling the
associated PORTB pull-ups internal to the MCU prevent indeterminate input conditions.
Moving a DIP switch position to ON causes a low logic level on the associated input. Table 4
shows the associated connection signal for each switch. Table 5 shows the associated USER
enable position to enable each switch.
LED’s
The APS12DT256SLK target board provides 4 green LEDs for output indication. Each LED is
an active low output. A current-limit resistor prevents excessive diode current. Writing a low
logic level to an LED output causes the associated LED to turn on. Table 4 shows the
associated connection signal for each LED. Table 5 shows the associated USER enable
position to enable each LED.
POT
A single-turn, 3/8 inch, 5K ohm trimmer potentiometer (POT) has been provided as user,
analog input. The part is decoupled to minimize noise during adjustment. The POT connects
to analog input PAD05/AN05 on the MCU. Table 4 shows the associated connection signal for
the POT. Table 5 shows the associated USER enable position to enable the POT.
Photo-Sensor
A 4mm photocell light sensor exhibiting 23K – 33K ohms of output resistance has been
provided. Output resistance is inversely related to incident light intensity. A gain stage (U5)
amplifies the sensor output before connecting to the MCU. The SENSOR connects to analog
input PAD04/AN04 on the MCU. Table 4 shows the associated signal connection for the
sensor. Table 5 shows the associated USER enable position to enable the sensor.

Signals
The following table shows the connections for each user I/O device.
Table 4: User I/O
USER Ref Des Signal Device
1 SW1 PP0/KWP0/PWM0/MISO1 Push Button Switch
2 SW2 PP1/KWP1/PWM1/MOSI1 Push Button Switch
3 SW3-1 PB0/ADDR0/DATA0 4-pos DIP Switch
4 SW3-2 PB1/ADDR1/DATA1 4-pos DIP Switch
5 SW3-3 PB2ADDR2/DATA2 4-pos DIP Switch
6 SW3-4 PB3/ADDR3/DATA3 4-pos DIP Switch
7 LED1 PB4/ADDR4/DATA4 Green LED
8 LED2 PB5/ADDR5/DATA5 Green LED
9 LED3 PB6/ADDR6/DATA6 Green LED
10 LED4 PB7/ADDR7/DATA7 Green LED
11 RV1 PAD05/AN05 Potentiometer
12 RZ1 PAD04/AN04 Light Sensor
Enables
The User option header block enables or disables each User I/O device individually. User I/O
includes 4 green LEDs, 2 push button switches, one 4-position DIP switch, a Light Sensor, and
a potentiometer. Installing a shunt enables the associated option. Removing a shunt disables
the associated option. The table below shows the configuration option for each USER I/O.
Table 5: USER Option Header
Shunt
USER Installed Removed Description
SW1 1 2 Enable Disable Push Button Switch 1
SW2 3 4 Enable Disable Push Button Switch 2
SW3-1 5 6 Enable Disable DIP Switch Position 1
SW3-2 7 8 Enable Disable DIP Switch Position 2
SW3-3 9 10 Enable Disable DIP Switch Position 3
SW3-4 11 12 Enable Disable DIP Switch Position 4
LED1 13 14 Enable Disable LED 1
LED2 15 16 Enable Disable LED 2
LED3 17 18 Enable Disable LED 3
LED4 19 20 Enable Disable LED 4
RV1 21 22 Enable Disable Potentiometer
RZ1 23 24 Enable Disable Light Sensor
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MCU I/O PORT
Connector J1 provides access to the MC9S12DT256 I/O signals. The figures below show the
pin-out for the MCU I/O connector. Only signal XCLS is not available at connector J1.
Figure 7: Connector J1
VAUX 1 2 PE1/IRQ*
GND 3 4 RESET*
PS1/TXD0 56 MODC/BKGD
PS0/RXD0 78 PP7/KWP7/PWM7/SCK2
PP0/KWP0/PWM0/MISO1 910 PAD07/AN07
PP1/KWP1/PWM1/MOSI1 11 12 PAD06/AN06
PT0/IOC0 13 14 PAD05/AN05
PT1/IOC1 15 16 PAD04/AN04
PM4/RXCAN2/RXCAN0/RXCAN4/MOSI0 17 18 PAD00/AN00
PM2/RXCAN1/RXCAN0/MISO0 19 20 PAD01/AN01
PM5/TXCN2/TXCAN0/TXCAN4/SCK0 21 22 PAD02/AN02
PM3/TXCAN1/TXCAN0/SS0* 23 24 PAD03/AN03
PA7/ADDR15/DATA15 25 26 PJ7/KWJ7/TXCAN4/SCL0
PA6/ADDR14/DATA14 27 28 PJ6/KWJ6/RXCAN4/SDA0
PA5/ADDR13/DATA13 29 30 PP2/KPP2/PWM2/SCK1
PA4/ADDR12/DATA12 31 32 PP3/KWP3/PWM3/SS1*
PA3/ADDR11/DATA11 33 34 PP4/KWP4/PWM4/MISO2
PA2/ADDR10/DATA10 35 36 PP5/KWP5/PWM5/MOSI2
PA1/ADDR9/DATA9 37 38 PS2/RXD1
PA0/ADDR8/DATA8 39 40 PS3/TXD1
PB7/ADDR7/DATA7 41 42 PE0/XIRQ*
PB6/ADDR6/DATA6 43 44 PE2/RW
PB5/ADDR5/DATA5 45 46 PE3/LSTRB*
PB4/ADDR4/DATA4 47 48 PE4/ECLK
PB3/ADDR3/DATA3 49 50 PT2/IOC2
PB2/ADDR2/DATA2 51 52 PT3/IOC3
PB1/ADDR1/DATA1 53 54 PT4/IOC4
PB0/ADDR0/DATA0 55 56 PT5/IOC5
PM1/TXCAN0/TXB 57 58 PT6/IOC6
PM0/RXCAN0/RXB 59 60 PT7/IOC7

Document Number: XX0000
Rev. X
09/2005
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f
personal injury or death associated with such unintended or unauthorized
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Freescale™ and the Freescale logo are trademarks of Freescale
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A
ll other product or service names are the property of their respective
owners.
SLKS12DT256UG
Rev. 1
09/2007