Phytec phyCORE-P8xC51Mx2 User manual

A product of a PHYTEC Technology Holding company
phyCORE-P8xC51Mx2
Hardware Manual
Edition April 2005

phyCORE-P8xC51Mx2
PHYTEC Messtechnik GmbH 2005 L-602e_3
In this manual are descriptions for copyrighted products that are not explicitly
indicated as such. The absence of the trademark () and copyright () symbols
does not imply that a product is not protected. Additionally, registered patents and
trademarks are similarly not expressly indicated in this manual.
The information in this document has been carefully checked and is believed to be
entirely reliable. However, PHYTEC Messtechnik GmbH assumes no
responsibility for any inaccuracies. PHYTEC Messtechnik GmbH neither gives
any guarantee nor accepts any liability whatsoever for consequential damages
resulting from the use of this manual or its associated product. PHYTEC
Messtechnik GmbH reserves the right to alter the information contained herein
without prior notification and accepts no responsibility for any damages which
might result.
Additionally, PHYTEC Messtechnik GmbH offers no guarantee nor accepts any
liability for damages arising from the improper usage or improper installation of
the hardware or software. PHYTEC Messtechnik GmbH further reserves the right
to alter the layout and/or design of the hardware without prior notification and
accepts no liability for doing so.
Copyright 2005 PHYTEC Messtechnik GmbH, D-55129 Mainz
Rights - including those of translation, reprint, broadcast, photomechanical or
similar reproduction and storage or processing in computer systems, in whole or in
part - are reserved. No reproduction may occur without the express written consent
from PHYTEC Messtechnik GmbH.
EUROPE NORTH AMERICA
Address: PHYTEC Technologie Holding AG
Robert-Koch-Str. 39
D-55129 Mainz
GERMANY
PHYTEC America LLC
203 Parfitt Way SW, Suite G100
Bainbridge Island, WA 98110
USA
Ordering
Information: [phone] [e-mail] 1 [phone] [e-mail]
Technical
Support: [phone] [email protected] 1 [phone] [e-mail]
Fax: [phone] [phone]
Web Site: http://www.phytec.de http://www.phytec.com
3rd Edition: April 2005

Contents
PHYTEC Messtechnik GmbH 2005 L-602e_3
Preface...........................................................................................................1
1 Introduction .........................................................................................3
1.1 Blockdiagram................................................................................6
1.2 View of the phyCORE-P8xC51Mx2............................................6
2 Pin Description.....................................................................................7
3 Jumpers..............................................................................................13
3.1 J1 Internal or External Program Memory..................................16
3.2 J2, J3 Pin 1 and Pin 23 on U1....................................................16
3.3 J4 PLD Control..........................................................................17
3.4 J5, J6 RAM Selection................................................................17
3.5 J7 SRAM Supply Voltage..........................................................18
3.6 J8, J9 P3.0 and P3.1 as RxD0 and TxD0 Signals......................18
3.7 J10, J11 P4.0 and P4.1 as 2nd Serial Interface ...........................19
3.8 J12, J13 Pins X1F13 / X1E14 Configuration .............................19
3.9 J14 RS-485 Interface Control....................................................20
3.10 J15, J18 EEPROM Configuration .............................................20
3.11 J16, J17 Configuration of P1.6 and P1.7 for I2C Bus...............21
3.12 J19 RTC Interrupt......................................................................21
3.13 J20 Remote Download Source...................................................22
4 Memory Models.................................................................................23
4.1 Control Register 1.......................................................................25
4.2 Control Register 2.......................................................................28
5 Serial Interfaces.................................................................................30
5.1 RS-232 Interface.........................................................................30
5.2 RS-485 Interface.........................................................................30
6 Flash Memory (U7)............................................................................31
7 Serial EEPROM (U12)......................................................................33
8 Real-Time Clock RTC-8563/64 (U13)..............................................34
9 Reset Controller (U8)........................................................................35
10 Remote Supervisory Chip (U10) ......................................................36
11 Battery Buffer....................................................................................37
12 Technical Specifications....................................................................39
13 Hints for Handling the Module........................................................41

phyCORE-P8xC51Mx2
PHYTEC Messtechnik GmbH 2005 L-602e_3
14 The phyCORE-P8xC51Mx2 on the
phyCORE Development Board LD 5V...........................................43
14.1 Concept of the phyCORE Development Board LD 5V .............43
14.2 Development Board LD 5V Connectors and Jumpers...............45
14.2.1 Connectors.....................................................................45
14.2.2 Jumpers on the
phyCORE Development Board LD 5V.........................46
14.2.3 Unsupported Features and Improper Jumper Settings ..48
14.3 Functional Components on the
phyCORE Development Board LD 5V......................................49
14.3.1 Power Supply at X1.......................................................49
14.3.2 Starting FlashTools .......................................................51
14.3.3 First Serial Interface at Socket P1A..............................53
14.3.4 Power Supply to External Devices via Socket P1A......54
14.3.5 Socket P1B....................................................................56
14.3.6 Plug P2A .......................................................................58
14.3.7 RS-485 Interface at Plug P2B .......................................60
14.3.8 Programmable LED D3.................................................62
14.3.9 Pin Assignment Summary of the phyCORE,
the Expansion Bus and the Patch Field.........................63
14.3.10 Battery Connector BAT1...............................................68
14.3.11 DS2401 Silicon Serial Number.....................................69
14.3.12 Pin Header Connector X4 .............................................70
Index............................................................................................................71

Contents
PHYTEC Messtechnik GmbH 2005 L-602e_3
Index of Figures
Figure 1: Block Diagram..............................................................................6
Figure 2: View of the phyCORE-P8xC51Mx2............................................6
Figure 3: Pinout of the phyCORE-P8xC51Mx2 (Top View) ......................7
Figure 4: Numbered Matrix Overview of the phyCORE-Connector
(Viewed from Above)...................................................................9
Figure 5: Numbering of the Jumper Pads...................................................13
Figure 6: Location of the Jumpers (Top View)..........................................13
Figure 7: Location of the Jumpers (Bottom View)....................................14
Figure 8: Default Memory Model following a Hardware Reset...............24
Figure 9: Von Neumann Memory Model...................................................27
Figure 10: Configuration of the I/O Area ....................................................29
Figure 11: Physical Dimensions (not Shown at Scale) ................................39
Figure 12: Modular Development and Expansion Board Concept with
the phyCORE-P8xC51Mx2........................................................44
Figure 13: Location of Connectors on the
phyCORE Development Board LD 5V ......................................45
Figure 14: Numbering of Jumper Pads ........................................................46
Figure 15: Location of the Jumpers (View of the Component Side)...........47
Figure 16: Default Jumper Settings of the
phyCORE Development Board LD 5V with
phyCORE-P8xC51Mx2..............................................................47
Figure 17: Connecting the Supply Voltage at X1 ........................................50
Figure 18: Pin Assignment of the DB-9 Socket P1A as RS-232
(Front View) ...............................................................................53
Figure 19: Location of Components at U11 and U12 for
Power Supply to External Subassemblies...................................54
Figure 20: Pin Assignment of the DB-9 Socket P1B (Front View).............56

phyCORE-P8xC51Mx2
PHYTEC Messtechnik GmbH 2005 L-602e_3
Figure 21: Pin Assignment of the DB-9 Plug P2A (Front View)................58
Figure 22: Pin Assignment of the DB-9 Plug P2B as RS-485 Interface .....60
Figure 23: Pin Assignment Scheme of the Expansion Bus..........................64
Figure 24: Pin Assignment Scheme of the Patch Field................................64
Figure 25: Connecting the DS2401 Silicon Serial Number.........................70
Figure 26: Pin Assignment of the DS2401 Silicon Serial Number..............70
Index of Tables
Table 1: Pinout of the phyCORE-Connector X1......................................12
Table 2: Jumper Settings Overview..........................................................15
Table 3: J1 Access to External or Internal Program Memory.................16
Table 4: J2, J3 U1 Pins 1 and 23 Connections ........................................16
Table 5: J4 PLD Control..........................................................................17
Table 6: J5, J6 RAM Selection and Mode...............................................17
Table 7: J7 SRAM Supply Voltage .........................................................18
Table 8: J8, J9 Port P3.0 and P3.1 / 1st Serial Interface Configuration...18
Table 9: J10, J11 Port P4.0 and P4.1 / 2nd Serial Interface
Configuration..............................................................................19
Table 10: J12, J13 X1F13 and X1E14 Configuration ...............................19
Table 11: J14 RS-485 Interface Control Configuration ............................20
Table 12: J15, J18 EEPROM Configuration .............................................20
Table 13: J16 and J17 I²C Interface Configuration...................................21
Table 14: J19 RTC Interrupt Configuration ..............................................21
Table 15: J20 Remote Download Source Configuration...........................22
Table 16: Control Register 1 of the Address Decoder................................25
Table 17: Control Register 2 of the Address Decoder................................28
Table 18: EEPROM Memory Options and Addressing..............................33
Table 19: Improper Jumper Settings for the Development Board..............48

Contents
PHYTEC Messtechnik GmbH 2005 L-602e_3
Table 20: JP9 Configuration of the Main Supply Voltage VCCI..............49
Table 21: JP9 Improper Jumper Settings for the Main Supply Voltage....50
Table 22: JP28 Configuration of the Boot Button.....................................51
Table 23: JP28 Configuration of a Permanent FlashTools
Start Condition............................................................................52
Table 24: JP22, JP23, JP10 Configuration of Boot via RS-232 ................52
Table 25: Improper Jumper Settings for Boot via RS-232.........................52
Table 26: Jumper Configuration for the RS-232 Interface.........................53
Table 27: JP24 Power Supply to External Devices Connected to P1A
on the Development Board.........................................................55
Table 28: Jumper Configuration of the DB-9 Socket P1B.........................56
Table 29: Improper Jumper Settings for Configuration of P1B .................57
Table 30: Jumper Configuration for Plug P2A...........................................58
Table 31: Improper Jumper Settings for Plug P2A.....................................59
Table 32: Jumper Configuration for DB-9 Plug P2B as RS-485
Interface......................................................................................60
Table 33: Improper Jumper Settings for the RS-485 Interface at
Plug P2B.....................................................................................61
Table 34: JP17 Configuration of the Programmable LED D3...................62
Table 35: Pin Assignment Data/Address Bus for the
phyCORE-P8xC51Mx2 / Development Board /
Expansion Board.........................................................................65
Table 36: Pin Assignment Control Signals for the
phyCORE-P8xC51Mx2 / Development Board /
Expansion Board.........................................................................66
Table 37: Pin Assignment Interface Signals for the
phyCORE-P8xC51Mx2 / Development Board /
Expansion Board.........................................................................66
Table 38: Pin Assignment Power Supply for the
phyCORE-P8xC51Mx2 / Development Board /
Expansion Board.........................................................................67

phyCORE-P8xC51Mx2
PHYTEC Messtechnik GmbH 2005 L-602e_3
Table 39: Unused Pins on the phyCORE-P8xC51Mx2 /
Development Board / Expansion Board.....................................68
Table 40: JP19 Jumper Configuration for Silicon Serial Number Chip....69

Preface
PHYTEC Messtechnik GmbH 2005 L-602e_3 1
Preface
This phyCORE-P8xC51Mx2 Hardware Manual describes the board’s
design and functions. Precise specifications for the P8xC51Mx2
microcontroller can be found in the enclosed microcontroller Data
Sheet/User’s Manual. If software is included please also refer to
additional documentation for this software.
In this hardware manual and in the attached schematics, low active
signals are denoted by a "/" in front of the signal name (i.e.: /RD). A
"0" indicates a logic-zero or low-level signal, while a "1" represents a
logic-one or high-level signal.
Declaration of Electro Magnetic Conformity for the
PHYTEC phyCORE-P8xC51Mx2
PHYTEC Single Board Computers (henceforth products) are designed
for installation in electrical appliances or as dedicated Evaluation
Boards (i.e.: for use as a test and prototype platform for
hardware/software development) in laboratory environments.
Note:
PHYTEC products lacking protective enclosures are subject to dam-
age by Electro Static Discharge (ESD) and, hence, may only be
unpacked, handled or operated in environments in which sufficient
precautionary measures have been taken in respect to ESD dangers. It
is also necessary that only appropriately trained personnel (such as
electricians, technicians and engineers) handle and/or operate these
products. Moreover, PHYTEC products should not be operated
without protection circuitry if connections to the product’s pin header
rows are longer than 3 m.

phyCORE-P8xC51Mx2
2PHYTEC MMesstechnikGmbH 2005 L-602e_3
PHYTEC products fulfill the norms of the European Union’s
Directive for Electro Magnatic Conformity only in accordance to the
descriptions and rules of usage indicated in this hardware manual
(particularly in respect to the pin header row connectors, power
connector and serial interface to a host-PC).
Implementation of PHYTEC products into target devices, as well as
user modifications and extensions of PHYTEC products, is subject to
renewed establishment of conformity to, and certification of, Electro
Magnetic Directives. Users should ensure conformance following any
modifications to the products as well as implementation of the
products into target systems.
The phyCORE-P8xC51Mx2 is one of a series of PHYTEC Single
Board Computers (SBCs) that can be populated with different
controllers and, hence, offers various functions and configurations.
PHYTEC supports all common 8- and 16-bit controllers in two ways:
(1) as the basis for Rapid Development Kits which serve as a
reference and evaluation platform
(2) as insert-ready, fully functional micro- / mini- and phyCORE
OEM modules which can be embedded directly into the user's
peripheral hardware design.
PHYTEC's microcontroller modules allow engineers to shorten devel-
opment horizons, reduce design costs and speed project concepts from
design to market.
EUROPE NORTH AMERICA
Address: PHYTEC Technologie Holding AG
Robert-Koch-Str. 39
D-55129 Mainz
GERMANY
PHYTEC America LLC
203 Parfitt Way SW, Suite G100
Bainbridge Island, WA 98110
USA
Web Site: http://www.phytec.de http://www.phytec.com
e-mail: [email protected] [e-mail]
Voice: [phone] [phone]
Fax: [phone] [phone]