Samsung S3C80A5B User manual

USER'S MANUAL ERRATA
This document contains the corrections of errors,
typos and omissions in the following document.
Samsung 8-bit CMOS S3C80A5B Microprocessor User's Manual
Document Number: 21.1-S3-C80A5B-082005
Publication: August 2005

S3C80A5B USER’S MANUAL ERRATA
1
ERRATA (VER 1.1)
Samsung 8-bit CMOS S3C80A5B Microprocessor User’s Manual
Document Number: 21.1-S3-C80A5B-082005
Publication: August 2005
1. Features (PAGE 1-2)
Operating Voltage Range
—2.0 V to 5.5 V at 8 MHz fOSC
2.Table 13-2. D.C. Electrical Characteristics (PAGE13-2)
(TA= –25 °C to + 85 °C, VDD = 2.0 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Unit
Operating voltage VDD fOSC= 8MHz
(Instruction clock = 1.33 MHz) 2.0 –5.5 V
3.Table 13-2. D.C. Electrical Characteristics (PAGE13-2)
Parameter Symbol Conditions Min Typ Max Unit
VOH1 VDD= 2.4 V, IOH = –6 mA
Port 2.1 only VDD –0.7
VOH2 VDD = 2.4 V, IOH = –2.2mA
Port 2.0, 2.2 VDD –0.7
––VOutput high
voltage
VOH3 VDD = 2.4 V, IOH = –1 mA
All output pins except Port2 VDD –1.0 ––

USER’S MANUAL ERRATA S3C80A5B
2
4.Table 13-2. D.C. Electrical Characteristics (PAGE13-3)
(TA = –25 °C to + 85 °C, VDD = 2.0 V to 5.5 V)
Parameter Symbol Conditions Min Typ Max Unit
Output low
voltage VOL1 VDD = 2.4 V, IOL = 12 mA, port
2.1 only 0.4 0.5
VOL2 VDD = 2.4 V, IOL = 5 mA
Port 2.0,2.2 0.4 0.5
VOL3 IOL = 1 mA
Ports 0 and 1
–
0.4 1.0
V
Supply current
(note) IDD1 VDD = 5.5 V
8-MHz crystal –59mA
IDD2 Idle mode;
VDD = 5.5 V
8-MHz crystal
–24mA
IDD3 Stop mode; TA = 25 °C
VDD = 5.5V
–16UA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
5.Table 13-4. Data Retention Supply Voltage in Stop Mode(PAGE13-4)
Parameter Symbol Conditions Min Typ Max Unit
Data retention supply
voltage VDDDR –1.0 –5.5 V
6.Table 13-8. Oscillation Stabilization Time(PAGE13-6)
(TA= –25 °C + 85 °C, VDD = 5.5V)

S3C80A5B USER’S MANUAL ERRATA
3
7. Figure 13-2. Operating Voltage Range of S3C80A5(PAGE13-6)
1.33 MHz
250 kHz
8.32 kHz
1234567
Supply Voltage (V)
Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, 16)
1.00 MHz
500 kHz
670 kHz
Instruction
Clock
8 MHz
6 MHz
4 MHz
Instruction
Clock
400 kHz
Figure 13-2. Operating Voltage Range of S3C80A5B

S3C80A5B
8-BIT CMOS
MICROCONTROLLERS
USER'S MANUAL
Revision 1.1

Important Notice
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checked and is believed to be entirely accurate at
the time of publication. Samsung assumes no
responsibility, however, for possible errors or
omissions, or for any consequences resulting from
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products or product specifications with the intent to
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and all liability, including without limitation any
consequential or incidental damages.
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S3C80A5B 8-Bit CMOS Microcontrollers
User's Manual, Revision 1.1
Publication Number: 21.1-S3- C80A5B-082005
© 2005 Samsung Electronics
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in
any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior
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certification (BSI Certificate No. FM24653). All semiconductor products are
designed and manufactured in accordance with the highest quality standards and
objectives.
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San #24 Nongseo-Dong, Giheung-Gu
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Home Page: http://www.samsungsemi.com
Printed in the Republic of Korea

S3C80A5BMICROCONTROLLER iii
Preface
The S3C80A5B Microcontroller User's Manual is designed for application designers and programmers who are using
the S3C80A5B microcontroller for application development.
It is organized in two main parts:
Part I Programming Model Part II Hardware Descriptions
Part I contains software-related information to familiarize you with the microcontroller's architecture, programming
model, instruction set, and interrupt structure. It has six chapters:
Chapter 1 Product Overview
Chapter 2 Address Spaces
Chapter 3 Addressing Modes
Chapter 4 Control Registers
Chapter 5 Interrupt Structure
Chapter 6 Instruction Set
Chapter 1, "Product Overview," is a high-level introduction to S3C80A5B with general product descriptions, as well as
detailed information about individual pin characteristics and pin circuit types.
Chapter 2, "Address Spaces," describes program and data memory spaces, the internal register file, and register
addressing. Chapter 2 also describes working register addressing, as well as system stack and user-defined stack
operations.
Chapter 3, "Addressing Modes," contains detailed descriptions of the addressing modes that are supported by the
KS88-series CPU.
Chapter 4, "Control Registers," contains overview tables for all mapped system and peripheral control register values,
as well as detailed one-page descriptions in a standardized format. You can use these easy-to-read, alphabetically
organized, register descriptions as a quick-reference source when writing programs.
Chapter 5, "Interrupt Structure," describes the S3C80A5B interrupt structure in detail and further prepares you for
additional information presented in the individual hardware module descriptions in Part II.
Chapter 6, "Instruction Set," describes the features and conventions of the instruction set used for all S3C8-series
microcontrollers. Several summary tables are presented for orientation and reference. Detailed descriptions of each
instruction are presented in a standard format. Each instruction description includes one or more practical examples
of how to use the instruction when writing an application program.
A basic familiarity with the information in Part I will help you to understand the hardware module descriptions in Part
II. If you are not yet familiar with the S3C8-series microcontroller family and are reading this manual for the first time,
we recommend that you first read Chapters 1–3 carefully. Then, briefly look over the detailed information in Chapters
4, 5, and 6. Later, you can reference the information in Part I as necessary.
Part II "hardware Descriptions," has detailed information about specific hardware components of the S3C80A5B
microcontroller. Also included in Part II are electrical, mechanical, OTP, and development tools data. It has eight
chapters:
Chapter 7 Clock Circuit
Chapter 8 RESET and Power-Down
Chapter 9 I/O Ports
Chapter 10 Basic Timer and Timer 0
Chapter 11 Timer 1
Chapter 12 Counter A
Chapter 13 Electrical Data
Chapter 14 Mechanical Data
Two order forms are included at the back of this manual to facilitate customer order for S3C80A5B microcontrollers:
the Mask ROM Order Form, and the Mask Option Selection Form. You can photocopy these forms, fill them out,
and then forward them to your local Samsung Sales Representative.

S3C80A5BMICROCONTROLLER v
Table of Contents
Part I —Programming Model
Chapter 1 Product Overview
Overview............................................................................................................................................................................................1-1
S3C80A5B Microcontroller..........................................................................................................................................................1-1
Features............................................................................................................................................................................................1-2
Block Diagram................................................................................................................................................................................1-3
Pin Assignments............................................................................................................................................................................1-4
Pin Descriptions.............................................................................................................................................................................1-5
Pin Circuits......................................................................................................................................................................................1-6
Chapter 2 Address Spaces
Overview............................................................................................................................................................................................2-1
Program memory (ROM).............................................................................................................................................................2-2
Register Architecture....................................................................................................................................................................2-3
Register Page Pointer (PP)..............................................................................................................................................2-5
Register Set 1......................................................................................................................................................................2-6
Register Set 2......................................................................................................................................................................2-6
Prime Register Space........................................................................................................................................................2-7
Working Registers ..............................................................................................................................................................2-8
Using the Register Pointers.............................................................................................................................................2-9
Register Addressing......................................................................................................................................................................2-11
Common Working Register Area (C0H–CFH)............................................................................................................2-13
4-Bit Working Register Addressing...............................................................................................................................2-14
8-Bit Working Register Addressing...............................................................................................................................2-16
System and User Stacks............................................................................................................................................................2-18
Chapter 3 Addressing Modes
Overview............................................................................................................................................................................................3-1
Register Addressing Mode (R)........................................................................................................................................3-2
Indirect Register Addressing Mode (IR)........................................................................................................................3-3
Indexed Addressing Mode (X)..........................................................................................................................................3-7
Direct Address Mode (DA)...............................................................................................................................................3-10
Indirect Address Mode (IA)...............................................................................................................................................3-12
Relative Address Mode (RA)............................................................................................................................................3-13
Immediate Mode (IM).........................................................................................................................................................3-14

vi S3C80A5BMICROCONTROLLER
Table of Contents (Continued)
Chapter 4 Control Registers
Overview.............................................................................................................................................4-1
Chapter 5 Interrupt Structure
Overview............................................................................................................................................................................................5-1
Interrupt Types......................................................................................................................................................................5-2
S3C80A5B Interrupt Structure.........................................................................................................................................5-3
Interrupt Vector Addresses...............................................................................................................................................5-5
Enable/Disable Interrupt Instructions (EI, DI)..............................................................................................................5-7
System-Level Interrupt Control Registers.....................................................................................................................5-7
Interrupt Processing Control Points...............................................................................................................................5-8
Peripheral Interrupt Control Registers ...........................................................................................................................5-9
System Mode Register (SYM)........................................................................................................................................5-10
Interrupt Mask Register (IMR)..........................................................................................................................................5-11
Interrupt Priority Register (IPR).......................................................................................................................................5-12
Interrupt Request Register (IRQ).....................................................................................................................................5-14
Interrupt Pending Function Types...................................................................................................................................5-15
Interrupt Source Polling Sequence.................................................................................................................................5-16
Interrupt Service Routines.................................................................................................................................................5-16
Generating interrupt Vector Addresses ........................................................................................................................5-17
Nesting of Vectored Interrupts.........................................................................................................................................5-17
Instruction Pointer (IP).......................................................................................................................................................5-17
Fast Interrupt Processing..................................................................................................................................................5-17
Chapter 6 Instruction Set
Overview............................................................................................................................................................................................6-1
Data Types ............................................................................................................................................................................6-1
Register Addressing...........................................................................................................................................................6-1
Addressing Modes ..............................................................................................................................................................6-1
Flags Register (FLAGS)....................................................................................................................................................6-6
Flag Descriptions.................................................................................................................................................................6-7
Instruction Set Notation.....................................................................................................................................................6-8
Condition Codes...................................................................................................................................................................6-12
Instruction Descriptions.....................................................................................................................................................6-13

S3C80A5BMICROCONTROLLER vii
Table of Contents (Continued)
Part II Hardware Descriptions
Chapter 7 Clock Circuit
Overview............................................................................................................................................................................................7-1
System Clock Circuit.........................................................................................................................................................7-1
Clock Status During Power-Down Modes....................................................................................................................7-2
System Clock Control Register (CLKCON).................................................................................................................7-3
Chapter 8 RESET and Power-Down
System Reset.................................................................................................................................................................................8-1
lvd reset..................................................................................................................................................................................8-1
Interrupt With Reset(INTR)...............................................................................................................................................8-2
Watchdog Timer Reset......................................................................................................................................................8-2
Power-on Reset(POR).......................................................................................................................................................8-2
System Reset Operation..................................................................................................................................................8-3
Hardware Reset Values.....................................................................................................................................................8-4
Power-Down Modes ......................................................................................................................................................................8-6
Stop Mode.............................................................................................................................................................................8-6
Using POR to Release Stop Mode................................................................................................................................8-6
Using an INTR to Release Stop Mode..........................................................................................................................8-6
Idle Mode...............................................................................................................................................................................8-9
Summary Table of Stop Mode, and Idle Mode...........................................................................................................8-10
Chapter 9 I/O Ports
Overview............................................................................................................................................................................................9-1
Port Data Registers............................................................................................................................................................9-2
Pull-Up Resistor Enable Registers ................................................................................................................................9-2
Port 0......................................................................................................................................................................................9-3
Port 0 Interrupt Enable Register (P0INT)......................................................................................................................9-4
Port 0 Interrupt Pending Register (P0PND).................................................................................................................9-4
Port 1......................................................................................................................................................................................9-6
Port 2......................................................................................................................................................................................9-8
Chapter 10 Basic Timer and Timer 0
Module Overview.............................................................................................................................................................................10-1
Basic Timer Control Register (BTCON)........................................................................................................................10-1
Basic Timer Function Description..................................................................................................................................10-3
Timer 0 Control Register (T0CON).................................................................................................................................10-3
Timer 0 Function Description...........................................................................................................................................10-5

viii S3C80A5BMICROCONTROLLER
Table of Contents (Concluded)
Chapter 11 Timer 1
Overview............................................................................................................................................................................................11-1
Timer 1 Overflow Interrupt..................................................................................................................................................11-2
Timer 1 Match Interrupt......................................................................................................................................................11-2
Timer 1 Control Register (T1CON)..................................................................................................................................11-4
Chapter 12 Counter A
Overview............................................................................................................................................................................................12-1
Counter A Control Register (CACON)...........................................................................................................................12-3
Counter A Pulse Width Calculations.............................................................................................................................12-4
Chapter 13 Electrical Data
Overview.............................................................................................................................................13-1
Chapter 14 Mechanical Data
Overview.............................................................................................................................................14-1

S3C80A5BMICROCONTROLLER ix
List of Figures
Figure Title Page
Number Number
1-1 Block Diagram......................................................................................................................................1-3
1-2 Pin Assignment Diagram (24-Pin SOP/SDIP Package).........................................................1-4
1-3 Pin Circuit Type 1 (Port 0)................................................................................................................1-6
1-4 Pin Circuit Type 2 (Port 1)................................................................................................................1-7
1-5 Pin Circuit Type 3 (P2.0)...................................................................................................................1-7
1-6 Pin Circuit Type 4 (P2.1)...................................................................................................................1-8
1-7 Pin Circuit Type 5 (P2.2)...................................................................................................................1-8
2-1 Program Memory Address Space..................................................................................................2-2
2-2 Internal Register File Organization.................................................................................................2-4
2-3 Register Page Pointer (PP)..............................................................................................................2-5
2-4 Set 1, Set 2 and Prime Area Register Map................................................................................2-7
2-5 8-Byte Working Register Areas (Slices)......................................................................................2-8
2-6 Contiguous 16-Byte Working Register Block.............................................................................2-9
2-7 Non-Contiguous 16-Byte Working Register Block....................................................................2-10
2-8 16-Bit Register Pair............................................................................................................................2-11
2-9 Register File Addressing...................................................................................................................2-12
2-10 Common Working Register Area....................................................................................................2-13
2-11 4-Bit Working Register Addressing...............................................................................................2-15
2-12 4-Bit Working Register Addressing Example.............................................................................2-15
2-13 8-Bit Working Register Addressing...............................................................................................2-16
2-14 8-Bit Working Register Addressing Example.............................................................................2-17
2-15 Stack Operations ................................................................................................................................2-18
3-1 Register Addressing...........................................................................................................................3-2
3-2 Working Register Addressing..........................................................................................................3-2
3-3 Indirect Register Addressing to Register File.............................................................................3-3
3-4 Indirect Register Addressing to Program Memory....................................................................3-4
3-5 Indirect Working Register Addressing to Register File............................................................3-5
3-6 Indirect Working Register Addressing to Program or Data Memory ...................................3-6
3-7 Indexed Addressing to Register File.............................................................................................3-7
3-8 Indexed Addressing to Program or Data Memory with Short Offset....................................3-8
3-9 Indexed Addressing to Program or Data Memory.....................................................................3-9
3-10 Direct Addressing for Load Instructions .......................................................................................3-10
3-11 Direct Addressing for Call and Jump Instructions .....................................................................3-11
3-12 Indirect Addressing.............................................................................................................................3-12
3-13 Relative Addressing............................................................................................................................3-13
3-14 Immediate Addressing.......................................................................................................................3-14
4-1 Register Description Format............................................................................................................4-4

xS3C80A5BMICROCONTROLLER
List of Figures(Continued)
Figure Title Page
Number Number
5-1 S3C8-Series Interrupt Types............................................................................................................5-2
5-2 S3C80A5B Interrupt Structure.........................................................................................................5-4
5-3 ROM Vector Address Area...............................................................................................................5-5
5-4 Interrupt Function Diagram...............................................................................................................5-8
5-5 System Mode Register (SYM)........................................................................................................5-10
5-6 Interrupt Mask Register (IMR)..........................................................................................................5-11
5-7 Interrupt Request Priority Groups...................................................................................................5-12
5-8 Interrupt Priority Register (IPR).......................................................................................................5-13
5-9 Interrupt Request Register (IRQ).....................................................................................................5-14
6-1 System Flags Register (FLAGS)....................................................................................................6-6
7-3 System Clock Circuit Diagram........................................................................................................7-2
7-4 System Clock Control Register (CLKCON).................................................................................7-3
8-1 Reset Block Diagram.........................................................................................................................8-1
8-2 Power-on Reset Circuit......................................................................................................................8-2
8-3 Timing Diagram for Power-on Reset Circuit.................................................................................8-3
9-1 S3C80A5B I/O Port Data Register Format..................................................................................9-2
9-2 Port 0 High-Byte Control Register (P0CONH)............................................................................9-3
9-3 Port 0 Low-Byte Control Register (P0CONL)..............................................................................9-4
9-4 Port 0 External Interrupt Control Register (P0INT) ....................................................................9-5
9-5 Port 0 External Interrupt Pending Register (P0PND)................................................................9-5
9-6 Port 1 High-Byte Control Register (P1CONH)............................................................................9-6
9-7 Port 1 Low-Byte Control Register (P1CONL)..............................................................................9-7
9-8 Port 2 Control Register (P2CON)....................................................................................................9-8
9-9 Port 2 Data Register (P2)..................................................................................................................9-9

S3C80A5BMICROCONTROLLER xi
List of Figures(Concluded)
Figure Title Page
Number Number
10-3 Simplified Timer 0 Function Diagram: Interval Timer Mode....................................................10-5
10-4 Simplified Timer 0 Function Diagram: PWM Mode...................................................................10-6
10-5 Basic Timer and Timer 0 Block Diagram.....................................................................................10-7
11-1 Simplified Timer 1 Function Diagram: Interval Timer Mode....................................................11-2
11-2 Timer 1 Block Diagram......................................................................................................................11-3
11-3 Timer 1 Control Register (T1CON).................................................................................................11-4
11-4 Timer 1 Registers................................................................................................................................11-5
12-1 Counter A Block Diagram.................................................................................................................12-2
12-2 Counter A Control Register (CACON)...........................................................................................12-3
12-3 Counter A Registers...........................................................................................................................12-4
12-4Counter A Output Flip-Flop Waveforms in Repeat Mode........................................................12-5
13-1Input Timing for External Interrupts (Port 0)................................................................................13-5
13-2 Operating Voltage Range of S3C80A5B ......................................................................................13-6
14-1 24-Pin SOP Package Mechanical Data.......................................................................................14-1
14-2 24-Pin SDIP Package Mechanical Data......................................................................................14-2

S3C80A5BMICROCONTROLLER xiii
List of Tables
Table Title Page
Number Number
1-1 Pin Descriptions ..................................................................................................................................1-5
2-1 S3C80A5B Register Type Summary.............................................................................................2-3
4-1 Mapped Registers (Set 1).................................................................................................................4-2
5-1 S3C80A5B Interrupt Vectors ...........................................................................................................5-6
5-2 Interrupt Control Register Overview................................................................................................5-7
5-3 Interrupt Source Control and Data Registers..............................................................................5-9
6-1Instruction Group Summary.............................................................................................................6-2
6-2 Flag Notation Conventions................................................................................................................6-8
6-3 Instruction Set Symbols....................................................................................................................6-8
6-4 Instruction Notation Conventions....................................................................................................6-9
6-5 Opcode Quick Reference..................................................................................................................6-10
6-6 Condition Codes ..................................................................................................................................6-12
8-1 Set 1 Register Values After Reset.................................................................................................8-4
8-2 Summary of Each Mode...................................................................................................................8-10
9-1 S3C80A5B Port Configuration Overview.......................................................................................9-1
9-2 Port Data Register Summary ..........................................................................................................9-2
13-1 Absolute Maximum Ratings.............................................................................................................13-2
13-2 D.C. Electrical Characteristics........................................................................................................13-2
13-3 Characteristics of Low Voltage Detect Circuit............................................................................13-4
13-4 Data Retention Supply Voltage in Stop Mode............................................................................13-4
13-5 Input/output Capacitance..................................................................................................................13-4
13-6 A.C. Electrical Characteristics........................................................................................................13-4
13-7 Oscillation Characteristics...............................................................................................................13-5
13-8 Oscillation Stabilization Time..........................................................................................................13-6

S3C80A5BMICROCONTROLLER xv
List of Programming Tips
Description Page
Number
Chapter 2: Address Spaces
Setting the Register Pointers................................................................................................................................................2-9
Using the RPs to Calculate the Sum of a Series of Registers...................................................................................2-10
Addressing the Common Working Register Area...........................................................................................................2-14
Standard Stack Operations Using PUSH and POP......................................................................................................2-19
Chapter 8: RESET and Power-Down
To Divide STOP Mode Releasing and POR...........................................................................................................................8-7
Chapter 10: Basic Timer and Timer 0
Configuring the Basic Timer..................................................................................................................................................10-8
Programming Timer 0..............................................................................................................................................................10-9
Chapter 12: Counter A
To Generate 38 kHz, 1/3duty Signal Through P2.1.......................................................................................................12-6
To Generate a One Pulse Signal Through P2.1..............................................................................................................12-7

S3C80A5BMICROCONTROLLER xvii
List of Register Descriptions
Register Full Register Name Page
Identifier Number
BTCON Basic Timer Control Register................................................................................4-5
CACON Counter A Control Register...................................................................................4-6
CLKCON System Clock Control Register.............................................................................4-7
EMT External Memory Timing Register .........................................................................4-8
FLAGS System Flags Register ........................................................................................4-9
IMR Interrupt Mask Register........................................................................................4-10
IPH Instruction Pointer (High Byte) .............................................................................4-11
IPL Instruction Pointer (Low Byte) ..............................................................................4-11
IPR Interrupt Priority Register......................................................................................4-12
IRQ Interrupt Request Register....................................................................................4-13
P0CONH Port 0 Control Register (High Byte) .......................................................................4-14
P0CONL Port 0 Control Register (Low Byte)........................................................................4-15
P0INT Port 0 Interrupt Control Register............................................................................4-16
P0PND Port 0 Interrupt Pending Register ..........................................................................4-17
P0PUR Port 0 Pull-up Resistor Enable Register.................................................................4-18
P1CONH Port 1 Control Register (High Byte) .......................................................................4-19
P1CONL Port 1 Control Register (Low Byte)........................................................................4-20
P1PUR Port 1 Pull-up Resistor Enable Register ................................................................4-21
P2CON Port 2 Control Register.........................................................................................4-22
PP Register Page Pointer..........................................................................................4-23
RP0 Register Pointer 0................................................................................................4-24
RP1 Register Pointer 1................................................................................................4-24
SPL Stack Pointer (Low Byte) .....................................................................................4-25
STOPCON Stop Control Register...........................................................................................4-25
SYM System Mode Register ........................................................................................4-26
T0CON Timer 0 Control Register.......................................................................................4-27
T1CON Timer 1 Control Register.......................................................................................4-28

S3C80A5BMICROCONTROLLER xix
List of Instruction Descriptions
Instruction Full Register Name Page
Mnemonic Number
ADC Add with Carry ....................................................................................................6-14
ADD Add....................................................................................................................6-15
AND Logical AND........................................................................................................6-16
BAND Bit AND..............................................................................................................6-17
BCP Bit Compare........................................................................................................6-18
BITC Bit Complement ..................................................................................................6-19
BITR Bit Reset ............................................................................................................6-20
BITS Bit Set................................................................................................................6-21
BOR Bit OR................................................................................................................6-22
BTJRF Bit Test, Jump Relative on False...........................................................................6-23
BTJRT Bit Test, Jump Relative on True.............................................................................6-24
BXOR Bit XOR..............................................................................................................6-25
CALL Call Procedure ....................................................................................................6-26
CCF Complement Carry Flag .......................................................................................6-27
CLR Clear..................................................................................................................6-28
COM Complement .......................................................................................................6-29
CP Compare.............................................................................................................6-30
CPIJE Compare, Increment, and Jump on Equal...............................................................6-31
CPIJNE Compare, Increment, and Jump on Non-Equal........................................................6-32
DA Decimal Adjust....................................................................................................6-33
DEC Decrement..........................................................................................................6-35
DECW Decrement Word.................................................................................................6-36
DI Disable Interrupts ................................................................................................6-37
DIV Divide (Unsigned).................................................................................................6-38
DJNZ Decrement and Jump if Non-Zero ..........................................................................6-39
EI Enable Interrupts.................................................................................................6-40
ENTER Enter..................................................................................................................6-41
EXIT Exit....................................................................................................................6-42
IDLE Idle Operation......................................................................................................6-43
INC Increment ...........................................................................................................6-44
INCW Increment Word...................................................................................................6-45
IRET Interrupt Return ...................................................................................................6-46
JP Jump..................................................................................................................6-47
JR Jump Relative......................................................................................................6-48
LD Load...................................................................................................................6-49
LDB Load Bit..............................................................................................................6-51

xx S3C80A5BMICROCONTROLLER
List of Instruction Descriptions(Continued)
Instruction Full Register Name Page
Mnemonic Number
LDC/LDE Load Memory......................................................................................................6-52
LDCD/LDED Load Memory and Decrement...............................................................................6-54
LDCI/LDEI Load Memory and Increment ................................................................................6-55
LDCPD/LDEPD Load Memory with Pre-Decrement ........................................................................6-56
LDCPI/LDEPI Load Memory with Pre-Increment..........................................................................6-57
LDW Load Word..........................................................................................................6-58
MULT Multiply (Unsigned)..............................................................................................6-59
NEXT Next...................................................................................................................6-60
NOP No Operation.......................................................................................................6-61
OR Logical OR..........................................................................................................6-62
POP Pop from Stack...................................................................................................6-63
POPUD Pop User Stack (Decrementing)............................................................................6-64
POPUI Pop User Stack (Incrementing).............................................................................6-65
PUSH Push to Stack.....................................................................................................6-66
PUSHUD Push User Stack (Decrementing)..........................................................................6-67
PUSHUI Push User Stack (Incrementing) ...........................................................................6-68
RCF Reset Carry Flag.................................................................................................6-69
RET Return................................................................................................................6-70
RL Rotate Left..........................................................................................................6-71
RLC Rotate Left through Carry .....................................................................................6-72
RR Rotate Right........................................................................................................6-73
RRC Rotate Right through Carry ...................................................................................6-74
SB0 Select Bank 0.....................................................................................................6-75
SB1 Select Bank 1.....................................................................................................6-76
SBC Subtract with Carry..............................................................................................6-77
SCF Set Carry Flag.....................................................................................................6-78
SRA Shift Right Arithmetic...........................................................................................6-79
SRP/SRP0/SRP1 Set Register Pointer ............................................................................................6-80
STOP Stop Operation....................................................................................................6-81
SUB Subtract .............................................................................................................6-82
SWAP Swap Nibbles......................................................................................................6-83
TCM Test Complement under Mask..............................................................................6-84
TM Test under Mask .................................................................................................6-85
WFI Wait for Interrupt..................................................................................................6-86
XOR Logical Exclusive OR...........................................................................................6-87

S3C80A5B PRODUCT OVERVIEW
1-1
1PRODUCT OVERVIEW
OVERVIEW
Samsung's S3C8-series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.
S3C80A5B MICROCONTROLLER
The S3C80A5B single-chip CMOS microcontroller is fabricated using a highly advanced CMOS process and is
based on Samsung's newest CPU architecture.
The S3C80A5B is the microcontroller which has mask-programmable ROM.
Using a proven modular design approach, Samsung engineers developed the S3C80A5B by integrating the
following peripheral modules with the powerful SAM87 RC core:
— Three programmable I/O ports, including two 8-bit ports and one 3-bit port, for a total of 19 pins.
— Internal LVD circuit and eight bit-programmable pins for external interrupts.
— One 8-bit basic timer for oscillation stabilization and watchdog functions (system reset).
— One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes.
— One 8-bit counter with auto-reload function and one-shot or repeat control.
The S3C80A5B is a versatile general-purpose microcontroller which is especially suitable for use as remote
transmitter controller. It is currently available in a 24-pin SOP and SDIP package.