Silicon Laboratories Si4700 User manual

Rev. 0.2 5/05 Copyright © 2005 by Silicon Laboratories AN232
Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
AN232
Si4700/01 EVALUATION BOARD USER’SGUIDE
1. Introduction—Si4700/01 EVB
Thank you for purchasing the Silicon Laboratories, Inc. Si4700/01 FM Tuner Evaluation Board (EVB). This EVB
and associated software has been designed to speed the overall development process and decrease the required
development time from EVB to product launch. We are looking forward to working with you, and have posted
support articles, answers to frequently asked questions, and application notes at https://www.mysilabs.com.
The Si4700/01 EVB kit should include the following important items:
Si4700/01 FM Tuner customer welcome and evaluation letter
Si4700/01 Errata
Si4700/01 base board Revision 1.1 (blue)
Si4700/01 daughter card with Si470x pre-mounted Revision 1.0 (red)
Wall transformer certified at 5 V/2 A, 100–240 V ac input with two jumpers (black) and
power input terminal (green)
USB cable
BNC to RCA adapters
RCA cable
Barrel adapter (1) mini jack
EVB Characterization report for included EVB
Si4700/01 Quick Start Guide
Si4700/01 CD including:
 Data sheet
 Development application GUI
 Firmware (embedded in Development GUI)
2. Overview
The Si4700/01 Evaluation Kit includes an evaluation board (EVB) to facilitate evaluation of the Si4700/01 using the
associated software. The EVB consists of a base board (blue) with a pre-mounted daughter card (red) - the
Si4700/01 is pre-installed on the daughter card. Several input/output (I/O) connections provide access to the
various subsystems on the EVB. Refer to Figure 1 for the locations of the various I/O connectors/devices.
3. Description
The following sections refer to both the image in Figure 1 and the silk screen on the Si4700/01 EVB. It is
recommended to refer to both when using this guide.

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2 Rev. 0.2
Figure 1. Locations of I/O Connectors/Devices
The base board has the following I/O connectors/devices:
J1 USB connector for USB interface
J2 JTAG connector for the C8051F320 MCU
J3 20-pin Expansion I/O connector
J4 Power input terminal block
J5 Daughter card connector (not visible when the base board and daughter card are mated)
J6 SMA connector for external clock input
J10 BNC connector for left audio output
J11 BNC connector for right audio output
PB1 Push-button to reset the C8051F320 MCU
D1 LED to confirm power supply to the C8051F320 MCU
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Rev. 0.2 3
The daughter card has the following I/O connectors/devices:
J1 SMA connector for RF (single-ended or non-inverting differential) input
J2 Base board connector (not visible when the base board and daughter card are mated)
J3 SMA connector for RF(inverting differential) input
The EVB consists of various subsystems that are explained in greater detail in the following sections.
3.1. Si4700/01 Base Board
3.1.1. Microcontroller and Associated Peripherals
The Si4700/01 evaluation environment uses a Silicon Laboratories' C8051F320 microcontroller to control the
Si4700/01 and to provide USB connectivity to the EVB (via J1). The LED D1 illuminates to confirm that power is
being properly supplied to the C8051F320 and firmware has loaded. Push-button PB1 manually resets the
C8051F320. The JTAG connector J2 is used to program the C8051F320 at production time, and is not necessary
for further development.
3.1.2. Reference Clock for the Si4700/01
The Si4700/01 accepts a 32.768 kHz reference clock input at the RCLK pin. On the EVB, this clock is provided by
a precision crystal oscillator. The output of the oscillator is routed to the Si4700/01 RCLK pin through a Schmitt-
trigger buffer (U5) and a 33 Ωseries termination resistor (R19). The user has the option of not using the oscillator
and bringing in the reference clock from an external source through J6. This can be achieved by depopulating R19
and populating R20 with a 0 Ωresistor. Note that the reference clock is not routed through the Schmitt-trigger
buffer when an external clock source is being used.
3.1.3. Power supply network
The EVB accepts three 5 to 7 V power supplies through the power input terminal block J4. Instructions on
connecting the power input terminal can be found in "5. Hardware Setup" on page 7.
The supply labeled VMCU/VIO is the input to regulator U2. The 3.3 V output of the regulator is used to power the
microcontroller and the reference clock systems and also applied to the VIO pin of the Si4700/01. U2 may be
bypassed by depopulating U2 and populating R30 with a 0 Ωresistor. In such a case, the VMCU/VIO supply at J4
must lie between 3.0 and 3.6 V—this condition is necessary to ensure reliable operation of the C8051F320.
The supply label VAUDIO is the input to regulator U6. The 3.3 V output of U6 is used to power the audio amplifier
network.
The supply labeled VRADIO is the input to the regulator U3. The 3.3 V output of the regulator is applied to the VA
and VD pins of the Si4700/01. U3 may be bypassed by depopulating R14 and populating R25 with a 0 Ωresistor.
In such a case, the VRADIO supply at J4 must lie between 2.7 and 5.5 V—these are the recommended operating
conditions for the Si4700/01.
3.1.4. Expansion I/O connector
The 20-pin Expansion I/O connector J3 provides access to all the control signals of the Si4700/01 including the
general purpose input/output pins. Pins for the VA, VD, VIO, and RCLK pins of the Si4700/01 are also available. All
test points on J3 are labeled indicating the signal available at the pin.
Note: The unlabeled pins on J3 between (a) SCLK and RST, and (b) RCLK and GPIO1, provide access to the
system ground.
3.2. Si4700/01 Daughter Card
3.2.1. Si4700/01 FM Tuner Chip
The Si4700/01 (U1) and its bypass capacitors are located on the daughter card. The daughter card allows for the
implementation of different RF input networks to connect the FM inputs at J1 and J3 to the FMIP and FMIN pins of
the Si4700/01 respectively. On the EVB, the Si4700/01 is configured to accept a single-ended FM input—the FMIN
pin is grounded and the FMIP pin is connected to J1 through an ac-coupling capacitor. Refer to “AN231: Si4700/01
Headphone and Antenna Interface” for more information.

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3.2.2. Audio Amplifier
The EVB includes a high-output drive dual op-amp chip (U2) to buffer the audio outputs at the LOUT and ROUT
pins of the Si4700/01. U2 is located on the bottom layer of the daughter card and is not visible when the base
board and daughter card are mated. The LOUT and ROUT pins are ac-coupled to the inputs of the op-amps on U2.
The op-amps are connected in a unity-gain, noninverting configuration and biased at the middle of the audio power
supply. The outputs of the op-amps are in turn ac-coupled to the BNC connectors J10 and J11 on the base board.
The audio amplification network has been designed to drive resistances of 10 kΩwhich is easily achievable on
most audio analyzers. The op-amps have enough drive capability to drive resistances much lower than 10 kΩ(e.g.
32 Ωheadphones). In such cases, however, the lower end of the audio spectrum (up to 2.5 kHz) may get
attenuated. This is because the 3-dB points of the high-pass filters at the outputs of the op-amps move to higher
frequencies as the output resistance is decreased. Also note that the op-amps are not sufficiently protected against
short-circuit conditions. Hence, the audio outputs at J10 and J11 should not be connected to a mono input if the
Si4700/01 is configured to produce a stereo output.

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4. EVB Configuration Matrix
Table 1 lists the configuration options the EVB provides, the hardware changes necessary to implement a certain
option, and any associated constraints. Figure 2 shows the locations of the various components required to
configure the EVB.
Figure 2. Locations of Components Used to Configure the EVB
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Table 1. EVB Configuration Matrix
Configuration
Variable Value of Configuration Variable Hardware Changes Constraints
Reference clock
source Crystal oscillator on EVB None (default option). None
Reference clock
source External clock Depopulate R19. Populate R20 with 0 Ω.32.768 kHz, CMOS switch- ing level, VIO voltage supply
from an external clock
source
VIO source Output of U2 None (default option). 5 V input at VMCU/VIO sup-
ply on J4.
VIO source VMCU/VIO supply (U2
bypassed) Depopulate U2. Populate R30 with 0 Ωresistor. 3.0–3.6 V input at VMCU/ VIO supply on J4
VA/VD source Output of U3 None (default option). 5 V input at VRADIO supply
on J4
VA/VD source VRADIO supply (U3
bypassed) Depopulate R14. Populate R25 with 0 Ωresistor. 2.7–5.5 V input at VRADIO supply on J4

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Rev. 0.2 7
5. Hardware Setup
The EVB is connected to a PC, which is running the associated software, as shown in Figure 3.
Figure 3. Hardware Setup
1. Supply power to the EVB by applying 5 V to the VMCU/VIO, VAUDIO, and VRADIO power supplies on J4. Ensure that the
grounds of all three power supplies are tied to the GND pin on J4.
Note: The EVB kit includes a 5 V wall transformer with ends that are not stripped, two black jumpers (also not stripped), and a
green power input terminal block (designated as J4 in Figure 1 of the Si4700/01 Evaluation Board User's Guide). Strip
the ends of the 5 V wall transformer and connect the white wire to the input of the power input terminal block correspond-
ing to the VRADIO supply ("5 V" in Figure 3). Connect the black wire to the input of the terminal block corresponding to
GND ("0 V" in Figure 3). Strip both ends of the two jumpers. Use one jumper to short the input of the terminal block cor-
responding to the VRADIO supply to the input corresponding to the AUDIO supply. Similarly, use the other jumper to
short the input corresponding to the AUDIO supply to the input corresponding to the MCU/VIO supply.
2. Connect a SMA cable to the SMA connector J1 on the daughter card and apply the desired FM input.
3. Connect one end of a BNC cable to the BNC connector J10 on the base board. Connect the other end of the BNC cable to
an audio analyzer, amplifier, or other test equipment with an input impedance > 10 kΩ.
4. Connect one end of a BNC cable to the BNC connector J11 on the base board. Connect the other end of the BNC cable to
an audio analyzer, amplifier, or other test equipment with an input impedance > 10 kΩ.
5. Connect the appropriate end of the USB cable to the USB connector J1 on the baseboard.
6. Connect the other end of the USB cable to a USB port on the PC.

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8 Rev. 0.2
6. Getting Started—Software Installation
The Si4700/01 Windows (graphical user interface) GUI Software is designed and intended for use only with the
Si4700/01 evaluation boards (EVB). This user guide is written to support Firmware Revision 6. The GUI software
revision number is available under help\about.
The GUI software development program uses the host machine USB port to communicate with the Si4700/01 EVB,
and is tested for use with Windows XP and Windows 2000.
To get started, insert the Silicon Laboratories, Inc. Si4700/01 CD into the host machine CD drive and launch
Windows Explorer. Open the CD to explore the contents in a window like the one shown in Figure 4 below.
Figure 4. Installation and Setup Start Screen
Important: Open and read the readme.txt file at this point. It may contain information that is not captured here,
and which could be very important to the functionality of the EVB or Software.
Software installation consists of three steps and it is recommended to follow the steps in order each time the host
machine or GUI changes.
1. If the USBXpress device and/or the development application GUI have been previously installed on the host machine,
uninstall ‘Si470x FM Tuner’ and ‘USBXpress Driver Set’ using the add/remove programs wizard in the control panel, before
proceeding to step 2.
2. Open the "USBXpress" folder and run USBXpress/PreInstaller.exe. Install the driver using the add/remove hardware wizard
in the control panel. There is a tutorial on this subject in " Appendix—Installing the USBXpress Device" on page 16.
3. Open the "Si470x" folder and run Si470X/setup.exe.
Launch the software under start\programs\Si470X FM Tuner as shown in Figure 5.

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Rev. 0.2 9
Figure 5. Launching Si470x FM Tuner Application
The first Si4700/01 window will show the application "searching for devices…" in the "Status Window" and the EVB
serial number in the "Select Device" window. Select the target device by clicking on the EVB serial number. The
progress bar on the bottom of the window will show initialization progress. When complete, the board is initialized
and development may now begin. Figures 6 and 7 show this process.

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10 Rev. 0.2
Figure 6. Configuration Screen to Select Device
Figure 7. Configuration Screen Successfully Initializing Device
TIP 1. If the Si4700/01 Development GUI doesn't find your device, try unplugging and plugging in the USB cable
again, pushing the "reset" button on the baseboard, connecting the power again, or re-launching the software.
TIP 2. It's normal for the GUI to display "Searching for Devices…" continuously even after initializing the selected
device. This allows additional devices to be quickly identified.
TIP 3. Be sure the USBXpress device driver is installed. See “ Appendix—Installing the USBXpress Device.”

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Rev. 0.2 11
7. Development Using Si4700/01 GUI
7.1. Registers Window
The "Registers" window can be easily accessed by clicking the registers window shortcut shown in Figure 8. The
“Registers” window provides visibility to the state of each register and associated bits of the selected chip. As
developers become more familiar with the registers and their functions, they may change the registers directly in
the registers window.
Figure 8. Registers Window Navigation Button
The data sheet provides an additional reference point for the register functionality. This is Appendix 2.
The Registers window provides Write and Read functionality. Pressing "Read" will query the chip and present the
current state of each register bit. The user may then change the bits as desired, and by pressing "Write", put the
chip into the desired state.
Any non-functional or non-desired state may be remedied by pressing the Chip Reset button on the Radio window,
which returns the chip to its default settings.
7.2. Radio Window
The "Radio" window presents all available control bits and/or their effects to the developer. Each control may be
used in optimizing the chip for the target system, and in exploring and optimizing performance of the chip.
Figure 9. Radio Window Navigation Button
Each control bit is called out with a number in Figure 10, with corresponding explanations in Table 2.

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Figure 10. Radio Window

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Rev. 0.2 13
Table 2. Control Bit Explanations
Number(s) Explanation(s)
1, 2, 3, 4 Navigation buttons for moving between GUI windows.
1 – Configuration Window
2 – Radio Window
3 – Registers Window
4 – Help button
5 Tuned frequency display. Tune the Si4700/01 to the desired frequency by either using
the tuning buttons (6), or by entering the desired frequency via number strokes and
pushing <enter>.
TIP: If the bus is actively querying and populating the Radio window at the moment
<Enter> is pushed, the user must enter the desired frequency again.
6 Tune Up, Tune Down buttons execute a single channel step according to the desired
channel spacing (19).
Seek Up, Seek Down buttons execute a seek up or down to the next received FM signal
meeting or exceeding the desired RSSI Threshold (20) within the selected band.
Scan button executes a seek until a signal is received at the specified RSSI Threshold,
pauses for a user-defined amount of time, and executes seek again until either end of
the FM band is reached. Scan functionality is host-based software and must be defined
by the developer to function on proto-type and production devices.
When the RSSI threshold is met in either Seek or Scan, bit 0Ah;14 is set high to acti-
vate STC (16).
7 Graphical representation of tuned frequency within available selected band. This bar
can also be used to adjust the desired frequency.
8 Received Signal Strength Indicator (RSSI) of signal. The RSSI slide is in logarithmic
scale (i.e. dB with respect to a reference value).
9 Tuned frequency preset buttons and stereo / mono indicator.
To store preset buttons, tune to desired frequency, press “Store” and then the desired
number button on the GUI. Preset functionality is host-based software and must be
defined by the developer to function on proto-type and production devices.
Mono or Stereo Indicator, will display as stereo if available at the tuned frequency, and
not suppressed by forced Mono operation. Stereo / Mono display is controlled by 0Ah;8
– high is Stereo, low is Mono. Mono operation can be forced with the MONO bit
(02H;13) through the Registers window or with the Mono button (25).
10 Chip Reset resets Si4700/01. Clicking the Chip Reset button will set the Si4700/01
RST pin low disabling analog and digital circuitry, resetting the registers to their default
settings, and disabling the bus. The user must powerup the Si4700/01 by clicking the
Powerup button (11), or reinitializing the chip through the Configuration screen.
Use the Chip Reset button if system is in non-desired state. The Si4700/01 EVB also
has a physical reset button.
11 Powerup button toggles between powerup and powerdown modes. Powerdown
reduces power consumption when the part is idle. Refer to the Si4700/01 Data Sheet
for additional information about powerup/powerdown modes.
*Note: Si4701 only.

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14 Rev. 0.2
12 Busmode selects the control interface between either 2-wire or 3-wire. A chip reset
occurs when changing the Busmode.
13 Automatic Gain Control (AGC) on / off button. AGC is controlled through bit 04h;10.
The default is AGC enabled and High-Z in the LNA impedance selector (14). This is the
recommended operating state and produces superior system sensitivity.
14 Reserved.
15*RDS Ready (RDSR) indicates an RDS error-corrected data group is available.
RDSR is set to Ready by 0Ah;15 high, and indicates a complete RDS group is error-
corrected and available in registers 0Ch, 0Dh, 0Eh, and 0Fh.
16 Seek Tune Complete (STC) illuminates when the RSSI threshold is met in tuning activi-
ties (Tune Up, Tune Down, Seek or Scan). STC bit 0Ah;14 is set high to indicate STC
operation is complete and successful.
17 Seek Fail (SF) illuminates when no channel on the user-selected band passes the RSSI
threshold. The Seek operation stops at either end of the available band. The RSSI
threshold is adjustable using the slide bar (20).
SF bit 0Ah;13 set high for failure to identify channel signal above RSSI threshold.
18 Band selector allows the developer to select the FM band between the US/European
FM band (87.5–108 MHz), and the Japan FM band (76–91 MHz).
Bit 03h;1 sets band. Low is US/Europe, default; high is Japan.
19 Channel Spacing selector allows the developer to set channel spacing according to reg-
ulated spacing between channels inthe frequency band. This affects Seek, Scan, Tune
Up, Tune Down.
Bit 03h;0 sets channel spacing. Low is 100 kHz spacing for Europe operation. High is
200 kHz spacing for US/Japan operation.
20 Seek Threshold sets desired RSSI for Seek Up, Seek Down, and Scan features.
21*RDS Enable
22*RDS monitor indicates RDS/RBDS data are being received and/or processed by the
system.
23 Mute button mutes the audio outputs.
Mute controlled by bit 02h;14. Low is Mute on (default). High is Mute off.
24 Bass Boost emphasizes lower frequency audio in the tuned channel signal.
Bass boost is controlled by bit 02h;12. Low is disabled.
25 Mono button forces mono audio output.
Mono output controlled with the MONO bit (02H;13) through the Registers window.
26 Volume selector and volume up and down slide bar.
27 De-emphasis selects the de-emphasis time constant for 75 µs in the US and 50 µs in
Europe.
De-emphasis bit is 04h;11. Low is 75 µs (default). High is 50 µs.
Table 2. Control Bit Explanations (Continued)
Number(s) Explanation(s)
*Note: Si4701 only.

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Rev. 0.2 15
28 GPIO1 is reserved for the purpose of firmware downloads.
29 GPIO2 drop down sets the GPIO2 pin state. This is independent of GPIO1 and GPIO3.
30 GPIO3 drop down sets the GPIO3 pin state. This is independent of GPIO1 and GPIO2.
31 Update button allows developer to stop automatic bus updates of the system.
Table 2. Control Bit Explanations (Continued)
Number(s) Explanation(s)
*Note: Si4701 only.

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APPENDIX—INSTALLING THE USBXPRESS DEVICE
Perform the following steps:
1. Be sure the preinstaller has already been run.
2. Connect the Si4700/01 EVB.
3. Launch the add/remove hardware wizard / application in the control panel. The wizard will search the host for newly added
items. The wizard will display the Si4700/01 EVB as "USB API".
4. Select "Install the software automatically (Recommended)" as shown in Figure 11.
Figure 11. Windows Hardware Update Wizard
5. Click "Continue Anyway" if prompted by the wizard as shown in Figure 12.

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Rev. 0.2 17
Figure 12. Windows Hardware Update Wizard
This should complete the USBXpress installation of the Si4700/01 EVB.

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18 Rev. 0.2
Troubleshooting
To check if the driver is correctly installed, open the “System Properties” on the “Control Panel.” Go to the
“Hardware” tab and click “Device Manager.” Under “Universal Serial Bus Controllers,” you should find “USBXpress”
listed without any “X” or “!” marks on it.
Figure 13. Device Manager

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Rev. 0.2 19
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
Added “wall transformer” bullet in "1. Introduction—Si4700/01 EVB" on page 1.
Updated Figure 3 on page 7.
Added note to step 1 on page 7.

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CONTACT INFORMATION
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Austin, TX 78735
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Internet: www.silabs.com
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