ST STDES-65ACFADP Specification sheet

Introduction
This document reports the functional, thermal, EMI, and efficiency measurements results for the STDES-65ACFADP 65 W
active clamp flyback adaptor reference design for USB Type-C™ PD source applications. This reference design meets CoC Tier
2 and DoE Level 6 efficiency requirements with a peak efficiency of 93.7% at full load.
The STDES-65ACFADP adopts the planar transformer technology, with an integrated GaN-based solution and digital control.
The reference design main devices are:
•ST-ONE: a programmable digital controller for the active clamp flyback primary high-low side GaN HEMT control plus a
secondary synchronous rectifier MOSFET control and USB-PD control;
•MASTERGAN2: a high-voltage enhancement mode GaN with a half-bridge configuration and integrated gate driver.
The STDES-65ACFADP is a fully assembled reference design developed for performance evaluation only, not available for sale.
STDES-65ACFADP test report
TN1402
Technical note
TN1402 - Rev 2 - November 2022
For further information contact your local STMicroelectronics sales office.
www.st.com

1Overview
The STDES-65ACFADP main features are:
• Universal input mains range: 90 Vac to 264 Vac - frequency 47 Hz to 63 Hz
• Output voltage range: 5 VDC - 20 VDC
• PD output:
– Five fixed PDOs: 5 V@3 A, 9 V@3 A, 12 V@3 A, 15 V@3 A, 20 [email protected] A
• Output power: 20 V - 3.25 A, 65 W max.
• Form factor: 54 mm (L)*31 mm (W)*25 mm (H)
• Efficiency: meets CoC Tier 2 and DoE Level 6 efficiency requirements, with a peak efficiency of 93.7% at
230 Vac 65 W
• Digital control for ACF primary and secondary sides
• Integrated GaN IC MASTERGAN2
• Compact, simplified PCB layout, and bill of material reduction
• EMC compliant: CISPR32B/EN55032B
• Planar transformer technology to achieve high-power density
Figure 1. STDES-65ACFADP architecture block diagram
Figure 2. STDES-65ACFADP reference design - top side
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Overview
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Figure 3. STDES-65ACFADP reference design - bottom side
Fully assembled board developed for
performance evaluation only,
not available for sale
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Overview
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2Specifications
Table 1. STDES-65ACFADP electrical specifications
Symbol Parameter Test conditions Minimum Nominal Maximum Unit
Input parameters
VIN Input line voltage 90 115/230 264 Vrms
fLINE Input line frequency 47 50/60 63 Hz
PSTBY No load input power (5 VOUT)
VIN = 115 VRMS, IOUT = 0 A
VIN = 230 VRMS, IOUT = 0 A
50
80 mW
PSTBY No load input power (9 VOUT)
VIN = 115 VRMS, IOUT = 0 A
VIN = 230 VRMS, IOUT = 0 A
170
180 mW
PSTBY
No load input power (12
VOUT)
VIN = 115 VRMS, IOUT = 0 A
VIN = 230 VRMS, IOUT = 0 A
220
260 mW
PSTBY
No load input power (15
VOUT)
VIN = 115 VRMS, IOUT = 0 A
VIN = 230 VRMS, IOUT = 0 A
280
290 mW
PSTBY
No load input power (20
VOUT)
VIN = 115 VRMS, IOUT = 0 A
VIN = 230 VRMS, IOUT = 0 A
180
220 mW
Output parameters - 5 V setting
VOUT Output voltage
VIN = 90 VRMS~264 VRMS
IOUT = 0 A~3 A 5 V
Vripple Output voltage ripple Peak-to-peak value with 20 MHz
bandwidth 180 250 mV
IOUT Output current 0 3 A
POUT Continuous output power 0 15 W
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 115 VAC and measured at the on-board
USB Type-C™ receptacle 90.2 %
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 230 VAC and measured at the on-board
USB Type-C™ receptacle 88.4 %
Output parameters - 9 V setting
VOUT Output voltage
VIN = 90 VRMS~264 VRMS
IOUT = 0 A~3 A 9 V
Vripple Output voltage ripple Peak-to-peak value with 20 MHz
bandwidth 152 250 mV
IOUT Output current 0 3 A
POUT Continuous output power 0 27 W
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 115 VAC and measured at the on-board
USB Type-C™ receptacle 91.2 %
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 230 VAC and measured at the on-board
USB Type-C™ receptacle 90.3 %
Output parameters - 12 V setting
VOUT Output voltage VIN = 90 VRMS~264 VRMS 12 V
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Specifications
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Symbol Parameter Test conditions Minimum Nominal Maximum Unit
IOUT = 0 A~3 A
Vripple Output voltage ripple Peak-to-peak value with 20 MHz
bandwidth 180 250 mV
IOUT Output current 0 3 A
POUT Continuous output power 0 36 W
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 115 VAC and measured at the on-board
USB Type-C™ receptacle 91.7 %
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 230 VAC and measured at the on-board
USB Type-C™ receptacle 91.5 %
Output parameters - 15 V setting
VOUT Output voltage
VIN = 90 VRMS~264 VRMS
IOUT = 0 A~3 A 15 V
Vripple Output voltage ripple Peak-to-peak value with 20 MHz
bandwidth 164 250 mV
IOUT Output current 0 3 A
POUT Continuous output power 0 45 W
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 115 VAC and measured at the on-board
USB Type-C™ receptacle 91.7 %
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 230 VAC and measured at the on-board
USB Type-C™ receptacle 91.8 %
Output parameters - 20 V setting
VOUT Output voltage
VIN = 90 VRMS~264 VRMS
IOUT = 0 A~3.25 A 20 V
Vripple Output voltage ripple Peak-to-peak value with 20 MHz
bandwidth 268 300 mV
IOUT Output current 0 3.25 A
POUT Continuous output power 0 65 W
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 115 VAC and measured at the on-board
USB Type-C™ receptacle 91.7 %
ηave
Four-point average efficiency
25%, 50%, 75%, and 100%
load
At 230 VAC and measured at the on-board
USB Type-C™ receptacle 92.1 %
Ambient and EMI parameters
TAMB Ambient temperature Free convection sea level 0 25 40 °C
EMI Conducted EMI Meets CISPR32B /EN55032
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Specifications
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3Test setup
3.1 Test conditions and equipment
• 1 x STDES-65ACFADP reference design
• 1 x 61604A programmable AC source by Chroma
• 1 x 63600-5 DC E-load by Chroma
• 1 x WT500 power analyzer by YOKOGAWA
• 1 x MSO44 mixed signal oscilloscope by Tektronix
• 1 x 8845A 6-1/2 digit precision multimeter by FLUKE
• 1 x P-NUCLEO-USB002 kit (sink emulator) to connect to the USB Type-C™ output to adjust the output
voltage
• Ambient temperature = 25°C
Figure 4. STDES-65ACFADP test setup
1
4
6
7
3
2
5
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Test setup
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3.2 Procedure
Follow the steps below to test the reference design.
Step 1. Connect the STDES-65ACFADP USB Type-C™ output to the P-NUCLEO-USB002 kit via a USB
Type-C™ cable.
Step 2. Connect the P-NUCLEO-USB002 to a PC computer via a USB Type-A cable.
Step 3. Connect the AC source to the STDES-65ACFADP AC input L/N cables.
Step 4. Power up the STDES-65ACFADP with a 110 VAC or 230 VAC input to start the test.
Step 5. Adjust the output voltage through the P-NUCLEO-USB002.
Step 6. Adjust the output current through the E-load.
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Procedure
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4Measurements/waveforms/test data
4.1 Efficiency test results
We tested the STDES-65ACFADP efficiency at 115 VAC and 230 VAC with different output voltages (5, 9, 12, 15,
and 20 V).
The obtained results show that our reference design meets the EU CoC Rev.05 Tier 2 and DoE Level 6
requirements with an adequate margin.
4.1.1 Efficiency at 115 VAC input
Figure 5. STDES-65ACFADP efficiency at 115 VAC input
Table 2. STDES-65ACFADP efficiency at 115 VAC input with different input voltages
Condition Percentage of full loading 5 V 9 V 12 V 15 V 20 V
EU CoC Rev.05-Tier2 limit for 10% loading - 72.48% 77.30% 78.30% 78.85% 78.85%
115 VAC 60 Hz input
10% 83.33% 84.92% 86.56% 86.45% 85.64%
25% 88.70% 89.83% 90.73% 90.73% 90.45%
50% 90.18% 91.32% 91.91% 91.89% 91.86%
75% 91.05% 91.39% 92.25% 92.21% 91.90%
100% 90.58% 91.90% 91.88% 91.95% 92.40%
Four-point average 90.13% 91.11% 91.69% 91.70% 91.65%
EU CoC Rev.05-Tier2 limit - 81.84% 87.30% 88.30% 88.85% 88.85%
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Measurements/waveforms/test data
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4.1.2 Efficiency at 230 VAC input
Figure 6. STDES-65ACFADP efficiency at 230 VAC input
Table 3. STDES-65ACFADP efficiency at 230 VAC input with different input voltages
Condition Percentage of full loading 5 V 9 V 12 V 15 V 20 V
EU CoC Rev.05-Tier2 limit for 10% loading - 72.48% 77.30% 78.30% 78.85% 78.85%
230 VAC 50 Hz input
10% 83.87% 84.14% 84.80% 84.07% 84.58%
25% 85.46% 87.90% 89.68% 90.00% 89.91%
50% 86.99% 89.74% 91.12% 91.43% 91.95%
75% 90.29% 91.20% 92.19% 92.42% 92.83%
100% 90.65% 92.11% 92.76% 93.01% 93.70%
Four-point average 88.35% 90.24% 91.44% 91.72% 92.10%
EU CoC Rev.05-Tier2 limit - 81.84% 87.30% 88.30% 88.85% 88.85%
4.2 Load and line regulation test results
Table 4. Load and line regulation at 5 VOUT
Loading (%) 115 VAC (V) 230 VAC (V) SPEC limit (V)
0 5.10 5.11
4.85 5.15
10 4.88 4.89
20 4.87 4.88
33 4.93 4.91
50 5.02 5.01
75 5.02 5.02
83 5.02 5.03
100 5.02 5.03
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Load and line regulation test results
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Table 5. Load and line regulation at 9 VOUT
Loading (%) 115 VAC (V) 230 VAC (V) SPEC limit (V)
0 9.08 9.09
8.73 9.27
10 9.07 9.08
25 9.06 9.09
50 9.07 9.07
75 9.06 9.05
100 9.02 9.02
Table 6. Load and line regulation at 12 VOUT
Loading (%) 115 VAC (V) 230 VAC (V) SPEC limit (V)
0 12.05 12.08
11.64 12.36
10 11.85 11.86
20 11.87 11.87
50 11.88 11.89
75 11.87 11.90
100 11.85 11.88
Table 7. Load and line regulation at 15 VOUT
Loading (%) 115 VAC (V) 230 VAC (V) SPEC limit (V)
0 15.08 15.08
14.55 15.45
10 15.06 15.09
25 15.05 15.04
50 15.06 15.06
75 15.05 15.06
100 15.02 15.00
Table 8. Load and line regulation at 20 VOUT
Loading (%) 115 VAC (V) 230 VAC (V) SPEC limit (V)
0 20.05 20.06
19.4 20.6
10 20.03 20.03
25 20.02 20.03
50 20.01 20.02
75 20.01 20.01
100 20.00 20.00
4.3 Ripple and noise
4.3.1 Test setup of the VOUT ripple and noise
To test the VOUT ripple and noise, we added a 10 µF electrolytic capacitor and a 100 nF ceramic capacitor at the
end of the USB Type-C™ cable, as shown below.
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Ripple and noise
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Figure 7. STDES-65ACFADP ripple and noise test setup
4.3.2 Ripple and noise test results
Figure 8. Ripple and noise at 115 VAC input: 5 VOUT/3 A Vpeak-peak = 180 mV
Figure 9. Ripple and noise at 230 VAC input: 5 VOUT/3 A Vpeak-peak = 140 mV
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Figure 10. Ripple and noise at 115 VAC input: 9 VOUT/3 A Vpeak-peak = 152 mV
Figure 11. Ripple and noise at 230 VAC input: 9 VOUT/3 A Vpeak-peak = 175 mV
Figure 12. Ripple and noise at 115 VAC input: 12 VOUT/3 A Vpeak-peak = 180 mV
Figure 13. Ripple and noise at 230 VAC input: 12 VOUT/3 A Vpeak-peak = 199 mV
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Figure 14. Ripple and noise at 115 VAC input: 15 VOUT/3 A Vpeak-peak = 184 mV
Figure 15. Ripple and noise at 230 VAC input: 15 VOUT/3 A Vpeak-peak = 203 mV
Figure 16. Ripple and noise at 115 VAC input: 20 VOUT/3.25 A Vpeak-peak = 268 mV
Figure 17. Ripple and noise at 230 VAC input: 20 VOUT/3.25 A Vpeak-peak = 263 mV
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Ripple and noise
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4.4 Typical waveforms
4.4.1 Startup
Figure 18. Startup waveform
• Yellow line: CH1 for low side GaN Vds
• Light blue line: CH2 for low side GaN Vgs
• Purple line: CH3 for clamp GaN Vgs
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Typical waveforms
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4.4.2 Normal operation
Figure 19. Primary side typical waveform: normal operation with 230 VIN 20 VOUT/1.5 A
• Yellow line: CH1 for low side GaN Vds
• Light blue line: CH2 for low side GaN Vgs
• Purple line: CH3 for clamp GaN Vgs
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Typical waveforms
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Figure 20. Secondary SR MOSFET Vds at 20 V 3.25 A
• Yellow line: CH1 for SR MOSFET Vds
• Light blue line: CH2 for low side GaN Vds
4.4.3 Normal operation, valley-skipping, and burst modes
To improve the efficiency at a medium load, the controller enters in valley-skipping mode when the switching
frequency increases above a programmable value.
While in valley-skipping mode, the output load further decreases. If the frequency drops below about 20 KHz, the
system enters the burst mode.
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Figure 21. Normal operation mode
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Figure 22. Valley-skipping mode
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Figure 23. Burst mode
4.4.4 Thermal performance
Table 9. Key components temperature at 20 VOUT/3.25 A, Ta = 25⁰C
Devices
115 VAC 230 VAC
Maximum temperature Maximum temperature
MASTERGAN2 86.5 84
ST-ONE 75.1 74.3
Transformer 78.6 79.4
SR MOS 83.2 79.4
Bridge diode 100 74.5
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Typical waveforms
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Figure 24. Thermal performance of the key components at 20 V/3.25 A, 115 VAC input
Figure 25. Thermal performance of the key components at 20 V/3.25 A, 230 VAC input
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