ST STEVAL-L6982CDR User manual

Introduction
The STEVAL-L6982CDR evaluation board is based on the L6982CDR synchronous monolithic step-down regulator capable of
delivering up to 2 A DC to the load.
Its wide input voltage range makes the device suitable for a broad range of applications.
The device implements peak current mode architecture in an SO 8L package with internal compensation to minimize design
complexity and size.
The L6982 is available in low consumption mode version (LCM) as L6982CDR and low noise mode version (LNM) as
L6982NDR.
LCM maximizes efficiency at light load with controlled output voltage ripple, making the device extremely suitable for battery-
powered applications.
LNM makes the switching frequency constant and minimizes the output voltage ripple overload current range, meeting the
specification for noise sensitive applications.
The EN pin manages the enable/disable function. The typical shutdown current is 2 μA when disabled. When the EN pin is
pulled up, the device is enabled and the internal 1.3 ms soft-start takes place.
Pulse-by-pulse current sensing on both power elements implements effective constant current protection while thermal
shutdown prevents thermal run-away.
Figure 1. STEVAL-L6982CDR evaluation board (top and bottom views)
Getting started with the STEVAL-L6982CDR synchronous step-down switching
regulator evaluation board based on the L6982CDR
UM2918
User manual
UM2918 - Rev 1 - September 2021
For further information contact your local STMicroelectronics sales office. www.st.com

1Getting started
1.1 Safety precautions
Caution: All operations involving transportation, installation, use and maintenance of the board must be performed
by skilled technical personnel who is familiar with the installation, use and maintenance of power electronic
systems.
A system architecture that supplies power to the evaluation board must be equipped with additional control
and protective devices in accordance with the applicable safety requirements (i.e., compliance with technical
equipment and accident prevention rules).
The electrical installation shall be completed in accordance with the appropriate requirements (e.g., cross-
sectional areas of conductors, fusing, and GND connections).
1.2 Overview
• 3.5 V to 38 V operating input voltage
• Programmable output voltage from 0.85 V to VIN
• 3.3 V and 5 V fixed output voltage versions
• 2 A DC output current
• Low operating quiescent current (LCM and fixed Vout part numbers)
• Internal compensation network
• Two different versions: LCM for high efficiency at light loads and LNM for noise sensitive applications
• 2 μA shutdown current
• Internal soft-start
• Enable function
• Overvoltage protection
• Output voltage sequencing
• Thermal protection
• SO 8L package
• Synchronization with external clock for LNM devices
1.3 Block diagram
Figure 2. STEVAL-L6982CDR functional block diagram
EMI
filter LOAD
Input
filter
Output
filter
Switching
regulator
Compensation
network
Enable/Clock
management
Enable
Clock
DC Input V
OUT
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Getting started
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1.4 Connectors and test points
•VIN - Tp3: connect to the positive terminal of a supply voltage (from 6 V to 38 V with default 5 V VOUT).
Input voltage is filtered (see Section 1.5 ) to decrease the EMI. Supply voltage should be set with a current
limitation compatible with the power board request. Typically, Ilimit>VOUT×IOUT/VIN.
•GND - Tp4, Tp3: return of terminal of input and output capacitors.
•VOUT - Tp6: connect to the positive terminal of the active load or to a power resistor between VOUT and
GND.
Important:
For all the above connections, short wires are recommended to avoid oscillation between the cable parasitic inductance and
the input capacitor.
•ENABLE: the device starts the switching activity once the Enable pin rises over the wake-up threshold
(1.2 V); thus, defining R4/R5 resistor ratio, it is possible to program the UVLO threshold. By default, the
STEVAL-L6982CDR Enable pin is pulled up to VIN with R4 = 10 K and R5 not mounted. Consequently, it is
possible to disable the output voltage regulation driving the Enable test point to GND. Vice versa the system
starts up once the Enable test point is left floating.
For further details, see L6982 datasheet.
•CLK_IN : using L6982NDR (low noise mode), it is possible to synchronize with an external clock. For further
details, see L6982 datasheet.
1.5
1.6
1.6.1
Input EMI filter
The STEVAL-L6982CDR is compliant with CISPR16-4-2.
An input filter helps to reduce EMI. The filter consists of a ferrite bead (L3), an inductor (L4) and three ceramic
capacitors (C11, C12 and C14).
An electrolytic capacitor is used for bulk energy storage and input damping.
VOUT settings
By default, the STEVAL-L6982CDR is with VOUT = 5 V but the output voltage can be managed from 0.85 V to a
higher voltage by selecting the right output partition resistors (R2 and R3):
VOUT = R2 + R3 /R3 × VFB
where VFB is the fix to 0.85 V.
Once VOUT has been changed, it is possible to increase the system performance in term of bandwidth.
We recommend eDesignSuite to select the compensation value (C8, R2 and R3), inductors and COUT value.
eDesignSuite
The eDesignSuite software tool developed by STMicroelectronics helps you configure ST products for power
conversion applications.
You can use it to customize your board for a specific application. After entering the main specifications for your
design, you can generate an automatic design or follow a sequential process to build a highly customized design.
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Connectors and test points
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2How to use the board
The STEVAL-L6982CDR is configured with L6982 LCM with adjustable VOUT. It is set to deliver a 5 V output
voltage with FSW = 400 KHz.
This board is best suited for applications where high efficiency at low current is preferred to output ripple.
Step 1. Connect the voltage supply between VIN and GND connectors.
Step 2. Connect the load (power resistor or active load) between VOUT and GND connectors.
Note: For Step 1 and Step 2 short wires are recommended.
Step 3. Set the supply voltage VIN from 6 V to 38 V.
Step 4. By default VOUT is set to 5 V. Increase or decrease the output power resistor or active load to reach the
suitable output current (max. 2 A).
Note: Using L6982CDR, from 0 A to 0.2 A the board works in PSK mode to guarantee high efficiency performance.
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How to use the board
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3PCB layout
Figure 3. STEVAL-L6982CDR evaluation board - PCB layout (top layer)
Figure 4. STEVAL-L6982CDR evaluation board - PCB layout (bottom layer)
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PCB layout
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4Schematic diagrams
Figure 5. STEVAL-L6982CDR circuit schematic
EN
VIN_L6982
R6
n.m.
C1
10uF
L3
MPZ2012S221A
L1 33uH
+C10
n.m.
C6
10uF
TP3
VIN
TP2
CLK_IN
R5
n.m.
L4
4.7uH
R1
0 Ohm
TP4
GND
J2
C8
10pF
C2
1uF
U1
L6982CDR
SW
1
BOOT
2
VCC
3
FB
4EN/SYNC 5
AGND 6
VIN 7
PGND 8
TP6
VOUT
J1
R2 402K
C5
10uF
C11
4.7uF
VIN_L6982
C14
4.7uF
C7
100nF
C13
n.m.
TP5
GND
C12
4.7uF
EMI FI l t er s. Opt i onal Component s
R4
10k
C9
n.m.
EN
C4
22uF
TP1
EN
L2
n.m.
R3
82.5K
C3
1uF 10V
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UM2918
Schematic diagrams

5Bill of materials
Table 1. STEVAL-L6982CDR bill of materials
Item Q.ty Ref. Part/Value Description Manufacturer Order code
1 1 C1
10µF,
1206(3216
Metric), 50V,
+/-10%
Input
capacitor TDK C3216X7R1H106K160AC
2 1 C2
1µF,
0805(2012
metric) 50V,
+/-10%
Input
capacitor TDK CGA4J3X7R1H105K125A
B
3 1 C3
1µF, 0603
(1608 metric),
10V, +/-10%
Vcc capacitor Any Any
4 1 C4
22µF, 1210
(3225 metric),
25V, +/-10%
Vout capacitor Murata GRJ32EC71E226KE11
5 2 C5, C6
10µF,
1206(3216
Metric), 50,
+/-10%
Vout
capacitors TDK C3216X7R1H106K160AC
6 1 C7
100nF, 0603
(1608 metric),
50V, +/-10%
Boot capacitor Any Any
7 1 C8
10pF, 0603
(1608 metric),
50V, +/-10%
Feed forward
capacitor Any Any
8 1 C9 0603 (1608
metric)
CLKIN
capacitor (not
mounted)
Any Any
9 1 C10 Electrolytic Cap Pi filter
capacitor (not
mounted)
Any Any
10 3 C11,C12,C14
4.7µF,
1206(3216
Metric), 50V,
+/-10%
Pi filter
capacitors Murata GRM31CR71H475KA12
11 1 C13 0603 (1608
metric)
Snubber
capacitor (not
mounted)
- -
12 1 L1
33µH, MSS
1038 family,
+/-20%
Main Inductor Coilcraft MSS1038T-333ML
13 1 L2 XAL4040
family
Main Inductor
(not mounted) Any Any
14 1 L3
220 Ω, 100
MHz,
0805(2012
metric),
+/-25%
Ferrite bead TDK MPZ2012S221AT000
15 1 L4
4.7µH,
XAL4040
family, +/-20%
Pi filter
Inductor Coilcraft XAL4030-472ME
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Bill of materials
UM2918 - Rev 1 page 7/15
10x10mm

Item Q.ty Ref. Part/Value Description Manufacturer Order code
16 1 R1 0 Ω, 0603
(1608 metric) Boot resistor Any Any
17 1 R2
402KΩ, 0603
(1608 metric),
+/-1%
FB partition
HS resistor Any Any
18 1 R3
82.5KΩ, 0603
(1608 metric),
+/-1%
FB partition
LS resistor Any Any
19 1 R4
10KΩ, 0603
(1608 metric),
+/-1%
EN partition
HS resistor Any Any
20 1 R5 0603 (1608
metric)
EN partition
LS resistor
(not mounted)
Any Any
21 1 R6 0805(2012
metric)
Snubber
resitor (not
mounted)
Any Any
22 1 TP1 EN, 1.3mm Test point ETTINGER -
23 1 TP2 CLKIN,
1.3mm Test point ETTINGER -
24 1 TP3 VIN, 1.3mm Test point ETTINGER -
25 1 TP4 GND, 1.3mm Test point ETTINGER -
26 1 TP5 GND, 1.3mm Test point ETTINGER -
27 1 TP6 VOUT, 1.3mm Test point ETTINGER -
28 1 U1 SO8 DCDC
converter ST L6982CDR
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Bill of materials
UM2918 - Rev 1 page 8/15

6Board versions
Table 2. STEVAL-L6982CDR versions
Finished good Schematic diagrams Bill of materials
STEVAL$L6982CDRA (1) STEVAL$L6982CDRA schematic diagrams STEVAL$L6982CDRA bill of materials
1. This code identifies the STEVAL-L6982CDR evaluation board first version.
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Board versions
UM2918 - Rev 1 page 9/15

7Regulatory compliance
Formal Notice Required by the U.S. Federal Communications Commission
FCC NOTICE:
This kit is designed to allow:
(1) Product developers to evaluate electronic components, circuitry, or software associated with the kit to
determine whether to incorporate such items in a finished product and
(2) Software developers to write software applications for use with the end product.
This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all
required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product
not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless
the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit
must operate under the authority of an FCC license holder or must secure an experimental authorization under
part 5 of this chapter 3.1.2.
The evaluation kit has been designed to comply with part 15 of the FCC Technical Rules. Operation is subject to
the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept
any interference received, including interference that may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part
15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference
in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation.
Standard applied: FCC CFR 47 Part 15 Subpart B. Test method applied: ANSI C63.4 (2014).
Formal Product Notice Required by Industry Canada Innovation, Science and Economic Development
Canada compliance:
For evaluation purposes only. This kit generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to Industry Canada (IC) rules.
À des fins d'évaluation uniquement. Ce kit génère, utilise et peut émettre de l'énergie radiofréquence et n'a pas
été testé pour sa conformité aux limites des appareils informatiques conformément aux règles d'Industrie Canada
(IC).
This device has been tested with Innovation, Science and Economic Development RSS standards. Operation is
subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device
must accept any interference received, including interference that may cause undesired operation.
Standard applied: ICES-003 Issue 7 (2020), Class B. Test method applied: ANSI C63.4 (2014).
Cet appareil a été testé pour les normes RSS d'Innovation, Science et Développement économique. L'utilisation
est soumise aux deux conditions suivantes: (1) cet appareil ne doit pas causer d'interférences nuisibles, et (2)
cet appareil doit accepter de recevoir tous les types d’interférence, y comprises les interférences susceptibles
d'entraîner un fonctionnement indésirable.
Norme appliquée: NMB-003, 7e édition (2020), Classe B. Méthode d'essai appliquée: ANSI C63.4 (2014).
Formal product notice required by EU
This device is in conformity with the essential requirements of the Directive 2014/30/EU (EMC) and of the
Directive 2015/863/EU (RoHS).
Standards applied: EN 55032:2015 + A11:2020, EN 55035:2017, EN 61000-6-1 (2007), EN 61000-6-3 (2007) +
A1 (2011), EN IEC 63000:2018
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Regulatory compliance
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Revision history
Table 3. Document revision history
Date Revision Changes
08-Sep-2021 1 Initial release.
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UM2918 - Rev 1 page 11/15

Contents
1Getting started ....................................................................2
1.1 Safety precautions .............................................................2
1.2 Overview .....................................................................2
1.3 Block diagram .................................................................2
1.4 Connectors and test points ......................................................3
1.5 Input EMI filter .................................................................3
1.6 VOUT settings..................................................................3
1.6.1 eDesignSuite............................................................3
2How to use the board ..............................................................4
3PCB layout ........................................................................5
4Schematic diagrams ...............................................................6
5Bill of materials....................................................................7
6Board versions ....................................................................9
7Regulatory compliance ...........................................................10
Revision history .......................................................................11
Contents ..............................................................................12
List of tables ..........................................................................13
List of figures..........................................................................14
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Contents
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List of tables
Table 1. STEVAL-L6982CDR bill of materials.......................................................7
Table 2. STEVAL-L6982CDR versions ...........................................................9
Table 3. Document revision history ............................................................. 11
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List of tables
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List of figures
Figure 1. STEVAL-L6982CDR evaluation board (top and bottom views) ...................................1
Figure 2. STEVAL-L6982CDR functional block diagram...............................................2
Figure 3. STEVAL-L6982CDR evaluation board - PCB layout (top layer) ...................................5
Figure 4. STEVAL-L6982CDR evaluation board - PCB layout (bottom layer) ................................5
Figure 5. STEVAL-L6982CDR circuit schematic ....................................................6
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List of figures
UM2918 - Rev 1 page 14/15

IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
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