Tektronix 7623A User manual

COMMITIED TO EXCELLENCE
WARNING
THE FOLLOWING SERVICING INSTRUCTIONS
ARE FOR USE BY QUALIFIED PERSONNEL ONLY.
TO AVOID PERSONAL INJURY, DO NOT
PERFORM ANY SERVICING OTHER THAN THAT
CONTAINED IN OPERATING INSTRUCTIONS
UNLESS YOU ARE QUALIFIED TO DO SO.
PLEASECHECK FOR CHANGE INFORMATION
AT THE
REAR OF THIS MANUAL.
STORAGE
OSCILLOSCOPE
WITH OPTIONS
SERVICE
INSTRUCTION MANUAL
Tektronix, Inc.
P.O. Box 500
Beaverton, Oregon 97077
070-1685-00
Product Group 42
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Serial Number
First Printing MAY 1974
Revised APR 1984

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Copyright @ 1974 Tektronix, Inc. All rights reserved.
Contents of this publicationmay not be reproduced in any
form without the written permission of Tektronix, Inc.
Productsof Tektronix, Inc. and its subsidiaries are covered
by U.S. and foreign patents and/or pending patents.
TEKTRONIX, TEK, SCOPE-MOBILE, and
@ are
registered trademarks of Tektronix, Inc. TELEQUIPMENT
is a registered trademark of Tektronix U.K. Limited.
Printed in U.S.A. Specification and price change privileges
are reserved.
INSTRUMENT SERIAL NUMBERS
Each instrument has a serial number on a panel insert, tag,
or stamped on the chassis. The first number or letter
designates the country of manufacture. The last five digits
of the serial number are assigned sequentially and are
unique to each instrument. Those manufactured in the
United States have six unique digits. The country of
manufacture is identified as follows:
6000000 Tektronix, Inc., Beaverton, Oregon, USA
100000 Tektronix Guernsey, Ltd., Channel Islands
200000 Tektronix United Kingdom, Ltd., London
300000 SonyPTektronix,Japan
700000 Tektronix Holland, NV, Heerenveen,
The Netherlands
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7623A/R7623A Service
TABLE OF CONTENTS
LlSTOF l LLUSTRATlONS
LlSTOF TABLES
SECTION
1 OPERATING INFORMATION
PRELIMINARY OPERATION
AC POWER SOURCES
AC POWER CORD
OPERATING VOLTAGE
OPERATING TEMPERATURE
RACKMOUNTING
PLUG-IN UNITS
PLUG-ININSTALLATIONAND REMOVAL
CONTROLS AND CONNECTORS
FRONT PANEL CONTROLS AND CONNECTORS
REAR PANEL CONTROLSAND CONNECTORS
GENERAL OPERATING INFORMATION
INTENSITY CONTROL
DISPLAY FOCUS
GRATICULE
LIGHT FILTER
BEAMFINDER
READOUTMODES
DISPLAY PHOTOGRAPHY
STORAGE
CARE OF STORAGE SCREEN
VERTICAL MODE
TRIGGER SOURCE
X-Y OPERATION
INTENSITY MODULATION
RASTER DISPLAY
CALIBRATOR
SIGNALS OUT
APPLICATIONS
SECTION 2 SPEC1FICATIONS
INTRODUCTION
STANDARD ACCESSORIES
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TABLE OF CONTENTS (cont.)
SECTION 3 THEORY OF OPERATION
LOGIC FUNDAMENTALS
SYMBOLS
LOGICPOLARITY
INPUTIOUTPUTTABLES
NON DIGITALDEVICES
BLOCK DIAGRAM
THEORY OF OPERATION
MAIN INTERFACE
@
LOGIC CIRCUIT 9
Z-AXIS LOGIC
CLOCK GENERATOR
VERTICAL CHOPPED BLANKING
CHOP COUNTER
VERTICAL MODE CONTROL
VERTICAL BINARY
PLUG-INBINARY
OUTPUT BUFFERS
TRIGGER SELECTOR
@
TRIGGER MODE AND ADD SIGNALS
TRIGGER CHANNELSWITCH
TRIGGER OUTPUT AMPLIFIER
VERTICALSIGNAL BUFFER
VERTICAL INTERFACE
@
VERTICAL CHANNEL SWITCH
AUXILIARY Y-AXIS INPUTAMPLIFIER
DELAY-LINE BUFFER
DELAY LINE
VERTICAL AMPLIFIER @
CENTERING AND READOUT AMPLIFIER
INPUTAMPLIFIER
BEAMFINDER NETWORK
OUTPUT AMPLIFIER
HORIZONTAL AMPLIFIER
@
HORIZONTAL CHANNEL SWITCH
RIGHT OUTPUT AMPLlFlER
LEFT OUTPUT AMPLIFIER
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7623AIR7623A Service
TABLE OF CONTENTS (cont.)
OUTPUT SIGNALS @
VERT SIG OUT
+ GATE OUT
+ SAWTOOTH OUT
CRT CIRCUIT
@
HIGHVOLTAGE REGULATION
AUTO FOCUS DC RESTORER
AUTO FOCUS
CONTROL GRID DC RESTORER
Z-AXISAMPLIFIER
CRT CONTROL CIRCUITS
LOW-VOLTAGEPOWER SUPPLY
@
POWER INPUT
-50-VOLT SUPPLY
-15-VOLT SUPPLY
+5-VOLT SUPPLY
+15-VOLT SUPPLY
+50-VOLT SUPPLY
+130-VOLTSUPPLY
GRATICULE LIGHT SUPPLY
CALIBRATOR
@
READOUT SYSTEM @
INTRODUCTION
THREE-COMPARTMENTMAINFRAMES
DISPLAY FORMAT
DEVELOPINGTHE DISPLAY
TIMER
TIME-SLOTCOUNTER
WORD TRIGGER
CHANNELCOUNTER
READOUT CONTROL
SINGLE-SHOT LOCKOUT
ENCODINGTHE DATA
COLUMN AND ROW DATASWITCHES
DISPLAY-SKIPGENERATOR
COLUMN AND ROW DECODERS
ZEROS LOGICAND MEMORY
iii
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TABLE OF CONTENTS (cont.)
CHARACTER GENERATORS 3-64
DECIMAL POINT LOGICAND CHARACTER POSITION COUNTER3-64
FORMAT GENERATOR 3-65
Y-OUTPUTAMPLlFlER 3-67
X-OUTPUTAMPLlFlER 3-67
DISPLAY SEQUENCE 3-67
STORAGE SYSTEM
@ 3-68
LOG
l C 3-68
OPERATIONAL AMPLIFIERS 3-73
SECTION 4 MAINTENANCE
PRELIMINARY INFORMATION
PANEL REMOVAL
POWER UNIT REMOVAL
PREVENTIVE MAINTENANCE
CLEANING
LUBRICATION
VISUAL INSPECTION
SEMICONDUCTOR CHECKS
RECALIBRATION
TROUBLESHOOTING
TROUBLESHOOTING AIDS
TROUBLESHOOTING EQUIPMENT
TROUBLESHOOTINGTECHNIQUES
CORRECTIVE MAINTENANCE
OBTAINING REPLACEMENTPARTS
SOLDERINGTECHNIQUES
COMPONENT REPLACEMENT
SEMICONDUCTOR REPLACEMENT
CATHODE-RAYTUBE REPLACEMENT
SWITCH REPLACEMENT
GRATICULE-BULB REPLACEMENT
POWER TRANSFORMER REPLACEMENT
HIGHVOLTAGE COMPARTMENT
FUSE REPLACEMENT
RECALIBRATIONAFTER REPAIR
INSTRUMENTREPACKAGING
SELECTED COMPONENT CRITERIA
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7623AlR7623A Service
TABLE OF CONTENTS (cont.)
SECTION 5 PERFORMANCE CHECKICALIBRATION
PRELIMINARY INFORMATION
CALIBRATION INTERVAL
TEKTRONIX FIELD SERVICE
USING THIS PROCEDURE
TEST EQUIPMENT REQUIRED
SPECIAL CALIBRATION FIXTURES
CALIBRATION EQUIPMENTALTERNATIVES
SIGNAL CONNECTIONS
WARM-UPAND TEMPERATURE REQUIREMENTS
PART I-PERFORMANCE CHECK
INTRODUCTION
OUTLINE FOR PART I-PERFORMANCE CHECK
PART II-CALIBRATION
INTRODUCTION
OUTLINE FOR PART II-CALIBRATION
SECTION 6 OPTIONS
SECTION
7 ELECTRICAL PARTS LIST
SECTION 8 DIAGRAMS
SECTION
9 MECHANICAL PARTS LIST
CHANGE INFORMATION
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LIST OF ILLUSTRATIONS
PAGE
Frontispiece
Figure 1-1. Location of voltage-selectorjumper.
Figure1-2. Front panel controls and connectors.
Figure 1-3. Rear panel controls and connectors.
Figure 1-4. Definitionof measurementlinesonthe graticule.
Figure 1-5. Location of Readout Modeswitch.
Figure 1-6. Location of Calibratorjumper on Storagecircuit board.
Figure3-1. Block diagram 7623A.
Figure3-2. Logic circuit block diagram.
Figure3-3. 2-Axis logic block diagram.
Figure3-4. (A)Clock Generator stage of U55A. (B)ldealizedwaveforms from Clock
Generator stage.
Figure3-5. (A) lnput and output pinsfor Vertical Chopped Blankingstage. (B) ldealized
waveformsfor Vertical Chopped Blankingstage.
Figure3-6. (A) Logicdiagramfor Vertical Chopped Blankingstage. (B)Table of input/output
combinationsfor Vertical Chopped Blankingstage.
Figure3-7. Detailedlogicdiagram of Chop Counter stage.
Figure 3-8. ldealized inputand output waveforms for Chop Counter stage
Figure 3-9. Logic diagramof Vertical ModeControl and Vertical Mode Buffer Amplifier
stages.
Figure 3-10. Logic diagramof Vertical Binary stage.
Figure3-11. ldealizedwaveforms showing relationshipbetween input and output waveforms
for Vertical Binary and Plug-InBinary stages when operating inALT mode.
Figure3-12. Logic diagram of Plug-InBinary and Plug-InAlternate Buffer stage.
Figure3-13. Detailed block diagram of Trigger Selector circuit along with simplified diagram
of trigger source selection circuitry.
Figure3-14. lnput levelsat pin4 of U324.
Figure3-15. I nputloutput table for Trigger Channel Switch stage.
Figure 3-16. Vertical Interfacedetailed block diagram.
Figure 3-17. Input/output table for Vertical Channel Switch.
Figure3-18. Vertical Amplifier detailed block diagram.
Figure3-19. Horizontal Amplifier detailed block diagram.
Figure3-20. CRT circuit detailed block diagram.
Figure3-21. Low-VoltagePower Supply detailed block diagram.
Figure3-22. Schematic illustrating voltage drop betweenpower supply output and load due
to resistance of interconnectingwire.
Figure 3-23. Calibratordetailed block diagram.
Figure3-24. Location of readoutwords on the crt identifyingthe originatingplug-inunit
and channel (onecomplete frame shown).
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LIST OF ILLUSTRATIONS (cont.)
Figure 3-25. Character SelectionMatrix for 7623A Readout System.
Figure 3-26. Typical readoutdisplay where only channel
2 of the Right Vertical and
Horizontal units
is displayed.
Figure3-27. Detailed block diagram of the ReadoutSystem.
Figure3-28. Output waveforms of Timer stage.
Figure 3-29. Detailof output at pins 12, 13, 14, and 16 of U2126.
Figure3-30. Timer stage operationwhen Display-Skipcondition occurs.
Figure3-31. Time relationshipof the time-slot (TS)pulses producedby U2159.
Figure 3-32. Typical encoding scheme for voltage-sensingamplifier plug-inunit. Coding
shownfor deflection factor of 100microvolts.
Figure3-33. Idealizedcurrent waveforms of: (A)Row analog data, (6)Columnanalog data.
Figure 3-34. Block representationof memory sequence inU2232.
Figure 3-35. Typical output waveformsfor Zeros Logic and Memory stage operation(atpin
7 of U2232).
Figure3-36. Readout word relating10possiblecharacter locationsto the decimal point
instructionsthat can be encoded, and the resultantcrt display.
Figure 3-37. Flow chart for character generation by the Readout System.
Figure3-38. Storage circuit simplified block diagram.
Figure 3-39. Time relationshipof Storage logic pulses.
Figure 3-40. BISTABLE modeStorage waveforms.
Figure3-41. VAR PERSIST mode Storage waveforms.
Figure3-42. FAST BISTABLE mode Storage waveforms.
Figure3-43. FAST VAR PERSIST modeStorage waveforms.
Figure4-1. Power Unit removal.
Figure4-2. Location of circuit boards inthe 7623A.
Figure4-3. Location of circuit boards inthe R7623A.
Figure4-4. Circuit isolation troubleshootingchart.
Figure4-5. Location of screws holding Low Voltage sub-chassis.
Figure4-6. Location of screws holdingSignals Out rear panel.
Figure 5-1. Typical crtdisplay when checking
X-Y phase shift.
Figure5-2. Location of Calibrator ACIDC jumper.
Figure5-3. Location of High-VoltageTest Point.
Figure5-4. Location of adjustments in High-Voltagecover.
Figure5-5. Typical crt display when checking
X-Y phase shift.
Figure5-6. Location of CalibratorACIDC jumper.
PAGE
Section8 figuresare located near their associateddiagrams on the foldout pages.
REV B MAR 1980
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