
2.3.3.1 I2C
J2 and J3 are the main header pins that connect the digital and power pins to the SCB Controller or other EVMs.
J3 connects to the EVM/SCB on the top, while J2 connects to more EVMs on the bottom. R5 and R6 are used
as pullup resistors for the main digital IO pins.
SW0 (sets A0 pin) and SW1 (sets A1 pin) set the I2C address of the device. This can be useful when using
the EVM with a custom controller (other than the SCB Controller), or when connecting multiple EVMs together.
Currently the SCB Controller and GUI are set up to use four EVMs at a time.
R8 is used as a pullup resistor for the ALERT pin, which is routed to both J2 and J3. LED D2 and current limiting
resistor R7 are used to indicate when the ALERT has triggered.
General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
Always follow TI's set-up and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help ensure
your personal safety and those working around you. Contact TI's Product Information Center http://ti.com/
customer support for further information.
Save all warnings and instructions for future reference.
WARNING
Failure to follow warnings and instructions can result in personal injury, property damage or death
due to electrical shock and burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed printed
circuit board assembly. It is intended strictly for use in development laboratory environments, solely for qualified
professional users having training, expertise and knowledge of electrical safety risks in development and
application of high voltage electrical circuits. Any other use and/or application are strictly prohibited by Texas
Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM.
1. Work Area Safety:
a. Keep work area clean and orderly.
b. Qualified observers must be present anytime circuits are energized.
c. Effective barriers and signage must be present in the area where the TI HV EVM and the interface
electronics are energized, indicating operation of accessible high voltages can be present, for the
purpose of protecting inadvertent access.
d. All interface circuits, power supplies, evaluation modules, instruments, meters, scopes, and other related
apparatus used in a development environment exceeding 50Vrms/75VDC must be electrically located
within a protected Emergency Power Off EPO protected power strip.
e. Use stable and non-conductive work surface.
f. Use adequately insulated clamps and wires to attach measurement probes and instruments. No
freehand testing whenever possible.
2. Electrical Safety:
a. As a precautionary measure, a good engineering practice is to assume that the entire EVM can have
fully accessible and active high voltages.
b. De-energize the TI HV EVM and all the inputs, outputs and electrical loads before performing any
electrical or other diagnostic measurements. Re-validate that TI HV EVM power has been safely de-
energized.
c. With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment hook-ups and other application needs, while still assuming the EVM circuit and
measuring instruments are electrically live.
www.ti.com Hardware
SBOU302A – JUNE 2023 – REVISED DECEMBER 2023
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