Texas Instruments MSP430FG4618 User manual

SLAU213A
October 2007 Mixed Signal Products
MSP430FG4618/F2013 Experimenter’s Board
User's G uide
User's Guide

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Copyright © 2007, Texas Instruments Incorporated

If You Need Assistance
Support for the MSP430 device and the experimenter’s board
is provided by the Texas Instruments Product Information
Center (PIC). Contact information for the PIC can be found on
the TI web site at www.ti.com. Additional device-specific
information can be found on the MSP430 web site at
www.ti.com/msp430.
Note: IAR KickStart is supported by Texas Instruments
Although IAR KickStart is a product of IAR, Texas Instruments provides
the support for it. Therefore, please do not request support for KickStart
from IAR. Please consult the extensive documentation provided with
KickStart before requesting assistance.
FCC Warning
This equipment is intended for use in a laboratory test
environment only. It generates, uses, and can radiate radio
frequency energy and has not been tested for compliance with
the limits of computing devices pursuant to subpart J of part 15
of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of
this equipment in other environments may cause interference
with radio communications, in which case the user at his own
expense will be required to take whatever measures may be
required to correct this interference.

1
1. Getting Started
The MSP430FG4618/F2013 experimenter’s board is a comprehensive
development target board that can be used for a number of applications. The
MSP-EXP430FG4618 kit comes with one MSP430FG4618/F2013 experimenter’s
board shown in Figure 1 and two AAA 1.5 V batteries.
Figure 1: MSP430FG4618/F2013 Experimenter’s Board
2. Devices Supported
The MSP430FG4618/F2013 experimenter’s board is based on the Texas
Instruments ultra-low power MSP430 family of microcontrollers [1, 2]. Residing on
this board are the MSP430FG4618 [3] and the MSP430F2013 [4] microcontrollers.
3. Tools Requirement
An MSP430 Flash Emulation Tool (MSP-FET430UIF) is required to download
code and debug the MSP430FG4618 and MSP430F2013. Two separate JTAG
headers are available, supporting independent debug environments. The
MSP430FG4618 uses the standard 4-wire JTAG connection while the
MSP430F2013 uses the Spy-Bi-wire (2-wire) JTAG interface allowing all port pins
to be used during debug. For more details on the Flash Emulation Tool, refer to
the MSP430 Flash Emulation Tool (FET) User’s Guide [5], which covers two
different debug environments: IAR Embedded Workbench and TI Code Composer
Essentials (CCE). Detailed information of their use is included in Appendix A.

2
4. Functional Overview
The MSP430FG4618/F2013 experimenter’s board supports various applications
through the use of the on-chip peripherals connecting to a number of on-board
components and interfaces as shown in Figure 2.
LCD
FG4618
F2013
Wireless
CC1100/
2420/2500
EMK
Interface
JTAG2 JTAG1
Buzzer
Microphone
Analog
Out
Capacitive
Touch
Pad
Buttons
RS-232
Figure 2: Experimenter’s Board Block Diagram
Wireless communication is possible through the expansion header which is
compatible with all Chipcon Wireless Evaluation Modules from Texas Instruments.
Interface to a 4-mux LCD, UART connection, microphone, audio output jack,
buzzer, and single touch capacitive touch pad enable the development of a variety
of applications. Communication between the two on-board microcontrollers is also
possible. In addition, all pins of the MSP430FG4618 are made available either via
headers or interfaces for easy debugging. Sample code for this board is available
online at www.ti.com/msp430.

3
5. Hardware Installation
Power may be provided locally from two on-board AAA batteries, externally from a
Flash emulation tool (FET), or an external supply. The power source is selected
by configuring jumpers VCC_1, VCC_2, and BATT. PWR1 and PWR2 will supply
power to each MSP430 independently. Appendix B has information on the exact
location of these jumpers. Figure 3 shows the jumper hierarchy and configuration
options.
Figure 3: Jumper Settings for Power Selection
The battery jumper BATT is used to select the on-board batteries to power the
system, independent of the FET connections. The user must ensure that this
voltage meets the requirement for proper functionality of the MSP430.
The power selection jumpers VCC_1 and VCC_2 select the power connections
between the board and each FET interface. These jumpers are two rows of 3-pin
headers, one for each MSP430 on-board. VCC_1, the bottom row, is for the
MSP430FG4618 and, VCC_2 on the top row, is for the MSP430F2013. A jumper
placed on the rightmost 2-pins (FET) selects the JTAG FET as the power source.
A jumper placed on the leftmost 2-pins (LCL) would enable local power (either
from the batteries or an external supply) to be applied to each FET for proper logic
threshold level matching during program/debug.
Headers PWR1 and PWR2 have been provided to enable power to the individual
MSP430s. A jumper placed on PWR1 provides power to the MSP430FG4618 and
a jumper placed on PWR2 provides power to the MSP430F2013. Individual device
current consumption can be measured via each of these jumpers. Care should be
taken that MSP430 interconnections are not made that could influence such a
measurement.
Once the required power selections have been made the experimenter’s board is
ready to be used. Both the MSP430FG4618 and MSP430F2013 are factory
programmed. After power up, the MSP430FG4618 executes an ultra-low power
real-time clock displayed on the LCD. The MSP430F2013 pulses LED3 from
LPM3 using the VLO as a periodic wake-up time base.

4
6. Functional Overview
This section contains information about the various on-board interfaces and their
functionality and about the various peripherals enabling these interfaces. Wireless
applications are facilitated using the MSP430’s capabilities to interface with the
Chipcon wireless evaluation modules (CCxxxxEMK) from Texas Instruments. The
on-board LEDs and LCD display are used for visual feedback. Audio applications
leveraging the MSP430FG4618’s full analog signal chain can be implemented
using the microphone and the audio output jack. In addition, communication
across components on and off the board has been integrated.
6.1 Interfaces
Some of these interfaces have the option of being inactive when not in use to
conserve power. This is made possible by MSP430 port pin configurations and/or
hardware jumpers on-board. Appendix B gives complete details of these jumper
configurations and their positions.
6.1.1 4-Mux LCD Display
The integrated SoftBaugh SBLCDA4 LCD display supports 4-MUX
operation and interfaces to the LCD driver peripheral of the
MSP430FG4618. More information on the LCD can be obtained from the
manufacturer’s datasheet.
6.1.2 Momentary-On Push Buttons
Two external push buttons, S1 and S2, are connected to the interrupt
capable MSP430FG4618 digital I/O port, P1.
6.1.3 Light Emitting Diodes (LEDs)
The experimenter board has a total of four LEDs, three connected to the
MSP430FG4618 and one connected to the MSP430F2013. The LEDs are
primarily used for display purposes. Two of the LEDs can be disconnected
using jumpers to reduce the overall power consumption of the board.
6.1.4 Buzzer
A buzzer is connected to a digital I/O port of the MSP430FG4618. It is
driven via a port pin of the MSP430. The buzzer can be completely
disconnected by using jumper JP1.
6.1.5 Single-Touch Sensing Interface
A capacitive touch sensing interface in the shape of a “4” is provided on-
board. This touchpad is connected to the digital I/O ports of the
MSP430F2013. A total of 16 individual segments form the touchpad,and
activity is monitored by the MSP430F2013. The resulting data is
communicated to the MSP430FG4618 via the MSP430 inter-
communication connections provided on-board.

5
6.2 Communication Peripherals
The experimenter’s board supports numerous communication interfaces for on-
and off-board connections.
6.2.1 Chipcon Wireless Evaluation Module Interface
Interface to the wireless world is accomplished via the Wireless Evaluation
Module header supporting the CCxxxxEMK boards from TI. The
transceiver modules are connected to the USART of the MSP430FG4618
configured in SPI mode. Libraries [6] that interface the MSP430 to these
transceivers are available at www.ti.com/msp430. The CC2420EMK
supports the 802.15.4/Zigbee standard. The CC1100EMK may be
configured to work at an RF carrier frequency of up to 868 MHz and the
CC2500EMK/CC2420EMK at an RF carrier frequency of 2.4 GHz.
6.2.2 RS-232
For a serial interface to a PC, the MSP430FG4618 supports the standard
RS-232 9-pin interface via its USCI peripheral configured in UART mode.
Standard baud rates for transmission and reception can be configured
using in software
6.2.3 I2C/SPI
The MSP430FG4618 and the MSP430F2013 have support for I2C and
SPI protocols using the USCI and the USI peripherals. This protocol is
used for inter-processor communication The link can be disconnected in
hardware allowing these peripherals to be used for other communication
purposes.
6.3 Analog Signal Chain
The experimenter’s board is capable of forming a complete analog signal chain
using the MSP430FG4618. This board can be used for numerous audio
applications and is capable of recording and playback of audio signals without the
use of additional external components.
1ST Order
Active HPF
Filter
Using OA0
SAMPLING FREQ
Analog IN
Analog OUT
Digital IN
2ND Order
Active LPF
Filter
Using OA1
Active
Voltage
Follower
Using OA2
12-bit
Analog-to-
digital
Converter
Data
Processing
12-bit
Digital-to-
analog
Converter
Output Jack
MIC
Figure 4: MSP430 Analog Signal Chain

6
6.3.1 Microphone
The microphone is connected to the MSP430FG4618 and may be used
for various applications. The microphone is enabled/disabled via a port pin
connected to the MSP430FG4618.
6.3.2 Analog Filters
An active first order high-pass filter (HPF) with a cut-off frequency set at
approximately 340Hz follows the microphone to eliminate extremely low
input frequencies. An optional 2nd order Sallen-Key active low-pass filter
(LPF) with a cut-off frequency set to approximately 4 kHz removes the
high-frequency noise on the analog output of the 12-bit DAC. The filter
setup is shown in Figure 5. These filters use the integrated Op-Amps of
the MSP430. The Op-Amps OA0 & OA1 facilitate the filtering processes.
The grayed dashed blocks in Figure 5 identify those elements which are
internal to the MSP430FG4618.
R29
1K
C18
470nF
OA0O
MIC
R24
1.4K C16
22nF
OA1I0
OA1I1 OA1O
R25
15.4K
C17
3.3nF
OA2I0 OA2O
1st Order
Active HPF
SALLEN-KEY 2nd
Order Active LPF
Unity Gain
Buffer
12-bit
ADC12 12-bit DAC12
R30 150K
C21 15pF
OA0I0
OA0I1
OA2I1
MSP430
Internal
OA0O
-
+OA0
-
+OA1 - +OA2
Figure 5: Active Analog Filter setup
6.3.3 Analog Output
Analog output can be brought out of the board via a mono 3.5mm jack
connected to the integrated Op-Amp OA2. The input to this amplifier can
be internally connected to the DAC12 output of the MSP430FG4618.
Several attenuation options are provided internally and in hardware using
jumper JP4.

7
6.4 System Clocks
The experimenter’s board has various system clock options that support low and
high frequencies. Each MSP430 has integrated clock sources as well as support
for external connections.
6.4.1 MSP430F2013 Clock Sources
The MSP430F2013 uses the internal VLO operating at ~12kHz for an
ultra-low power standby wake up time base. The integrated DCO is
internally programmable at frequencies up to 16MHz for high speed CPU
and system clocking.
6.4.2 MSP430FG4618 Clock Sources
A standard 32.768kHz watch crystal is populated at footprint X2 and
sources source ACLK of the MSP430FG4618 for low frequency, ultra-low
power standby operation and RTC functionality. The integrated FLL+ clock
module provides a programmable internal high frequency clock source for
the CPU and other peripherals on-chip. In addition to the FLL+, an
external high frequency crystal or resonator up to 8MHz can be added via
footprint X1.
6.5 Jumper Configurations
The board supports various peripherals and components to be enabled when
required and disabled when not in use to reduce overall power consumption. This
is achieved either by software or directly in hardware. Some of the jumpers are
mandatory for the board to function correctly. Refer to Appendix B for detailed
information regarding the exact locations of these jumpers and their functionality.

8
7. Frequently Asked Questions
1) What devices can be programmed with the experimenter’s board?
The experimenter’s board is designed to develop applications using the
MSP430FG4618 and MSP430F2013. These devices can be replaced by
MSP430FG461x and MSP430F20xx device derivatives, respectively.
2) How is power supplied to the experimenter’s board?
Three supply options exist: 2xAAA battery power, JTAG and external power
supplies are supported.
3) Can I use the Parallel FET (MSP-FET430PIF) to program/debug the
MSP430?
The MSP4304618 supports the USB and Parallel Port FETs. The
MSP430F2013 is supported by the USB FET (MSP-FET430UIF) only. The
Parallel Port FET does not support the Spy Bi-Wire program/debug mode
used.
4) I have erased and reprogrammed the MSP430; can I restore the factory
programmed-firmware on the device(s)?
The software source files are available at the MSP-EXP430FG4618
documentation page at www.ti.com/msp430.
5) The MSP430FG4618 is no longer accessible via JTAG, is something
wrong with the device?
- Verify that the target device is powered properly
- If the target is powered locally, verify Vcc is applied to pin 4 of the JTAG
header
- If communication and power are correctly applied to the target and the issue
persists, it may be due to the MSP430FG4618 accidentally being
programmed with MSP430F2xx source code. In some conditions ‘F2xx
source code loaded onto the ‘FG4618 can configure the SVS module to
monitor SVSIN (P6.7) and reset the device in case of a low voltage condition
externally applied. Temporarily connecting P6.7 of the ‘FG4618 to Vcc and
reprogramming the target device with the valid source code will eliminate this
issue.
6) Does the experimenter’s board protect against blowing the JTAG fuse of
the target devices?
No. Fuse blow capability is inherent to all Flash-based MSP430 devices in
order to protect user’s intellectual property. Care must be taken to avoid the
enabling of the fuse blow option during programming that would prevent
further access to the MSP430 device(s) via JTAG.
7) I am measuring system current in the range of 30mA, is this normal?
Current consumption of the system is dependent on the functions and
operation of the hardware being performed. The RF connectivity and isolated
UART communication support, when used, can reach these current
consumption levels. Take care that these elements are not accidentally
enabled, specifically the isolated UART, if such system currents are not
expected.

9
8) Can I use two FETs to perform simultaneous access of the FG4618 and
F2013 during program/debug?
Yes, independent flash emulation tools (either USB or Parallel for ‘FG4618
and USB only for ‘F2013) can be simultaneously used to program the MSP430
target devices. When supplying power via the FET, it is recommended to use
only one FET to source power. The second FET can sense this voltage level
instead of supplying power, to avoid any voltage conflicts in-system. Refer to
section 5 Hardware Installation for details regarding supported power supply
configurations.
9) I cannot properly open the workspace and projects provided in the .zip
file with IAR, how can I open the sample code?
The IAR workspace/projects included for the sample code provided has been
created using IAR Embedded Workbench Version 3.42A. These projects are
not backward compatible with older IAR releases and will not open using prior
versions. New workspace/projects can be created and the sample code
source files can be added manually in order to build these samples with older
versions. Instruction for setting up a project in IAR are described in the MSP-
FET430 Flash Emulation Tool (FET) (for use with IAR v3.x) User's Guide,[5].
10) I have loaded the ‘FG4618 and ‘F2013 sample code for the capacitive
touch sensing application. It doesn’t seem to be working, what is wrong?
Verify that the correct jumper settings are used for H1 enabling the I2C
communication link between MSP430s. Make sure jumper JP2 is removed,
disconnecting LED3 from the touchpad circuitry. When connected, the LED
causes the measurement of the capacitive touch element on P1.0 to fail.
8. References
1. MSP430x4xx Family User's Guide, Texas Instruments literature number SLAU056
2. MSP430x2xx Family User's Guide, Texas Instruments literature number SLAU144
3. MSP430xG461x device data sheet, Texas Instruments literature number SLAS508
4. MSP430x20x3 Device datasheet, Texas Instruments literature number SLAS491
5. MSP-FET430 Flash Emulation Tool (FET) (for use with IAR v3.x) User's Guide, Texas Instruments
literature number SLAU138
6. MSP430 Interface to CC1100/2500 Code Library, Texas Instruments literature number SLAA325

10
Appendix A Configuring an IAR Embedded Workbench Project
IAR Embedded Workbench may be used to program/debug the on-board MSP430
devices with custom firmware or provided sample code available at
www.ti.com/msp430. Programming and debug is done using JTAG1 and JTAG2
providing access to the MSP430FG4618 and MSP430F2013 respectively. Steps
to program each of these devices are shown in this section. It is assumed that the
USB FET tool has been installed using the instructions provided in the FET User’s
guide. Please note that the Parallel port FET tool can also be used to
program/debug the MSP430FG4618.
MSP430FG4618 Programming
1. Connect the 14-pin cable to the JTAG1 header on the board.
2. Create a new project or load a valid existing project on the IAR Embedded
Workbench.
3. In IAR Embedded Workbench under the Project drop-down choose Options;
this brings up the menu shown in Figure A-1. Under the General
OptionsÆTarget choose MSP430FG4618 from the MSP430x4xx Family
option.
Figure A-1: Device selection in IAR

11
4. From the same menu under the Debugger option, select the FET Debugger
shown as a snapshot in Figure A-2.
Figure A-2: Selecting the FET Debugger
5. Then proceed to the FET Debugger option and choose the Texas Instrument
USB-IF as shown in Figure A-3. The default setting of Automatic needs no
change.
Figure A-3: Selection of the USB interface

12
MSP430F2013 Programming
1. Connect the 14-pin cable to JTAG2 header on the board.
2. Create a new project or load a valid existing project on the IAR Embedded
Workbench.
3. In IAR Embedded Workbench under the Project drop-down choose Options;
this brings up the menu shown in Figure A-1. Under the General
OptionsÆTarget choose MSP430F2013 from the MSP430x2xx Family
option.
4. From the same menu under the Debugger option select the FET Debugger
shown as a snapshot in Figure A-2.
5. Then proceed to the FET Debugger option and choose the Texas Instrument
USB-IF as shown in Figure A-3. The default setting of Automatic needs no
change.
6. For a new project created, the Spy-Bi-Wire interface is the default setting for
the MSP430F2013. If this selection needs modification, under the FET
Debugger menu as shown in Figure A-4, check the Override default box and
then make the Spy-Bi-Wire selection instead of the 4-Wire JTAG. It is to be
noted that the Parallel FET does not support the Spy-Bi-Wire interface and
cannot be used to debug/program the MSP430F2013.
Figure A-4: Selection of the Spy-Bi-Wire interface for MSP430F2013

13
Appendix B Jumper Locations and Settings
Figure B-1 represents the location and name of each jumper on the experimenter’s
board.
Figure B-1: Jumper Locations

14
Table B-1 Jumper Settings and Functionality
Header Functionality when
jumper present Functionality when jumper absent Requirement
PWR1
Provides power to MSP430FG4618
Also used to measure current
consumption of the MSP430FG4618
MSP430FG4618 is
not powered
Required for
MSP430FG4618
use
PWR2
Provides power to MSP430F2013
Also used to measure current
consumption of the MSP430F2013
MSP430F2013 is
not powered
Required for
MSP430F2013
use
BATT On-board batteries provide power Also
used to measure current consumption
Batteries will not
provide power to
either MSP430
Required for use with
AAA batteries
JP1 Buzzer enabled and connected
to P3.5 of the MSP430FG4618 Buzzer muted Optional
JP2 LED3 enabled and connected
to P1.0 of the MSP430F2013
LED3 connection
disabled
Optional / Required for
LED3 use
JP3 LED4 enabled and connected
to P5.1 of MSP430FG4618
LED4 connection
disabled
Optional / Required for
LED4 use
JP4 Attenuation set to approximately
69% of the DAC12 audio output
98% attenuation of
the DAC12 audio
output
Optional
Header H1
(Pins 1-2, 3-4)
I2C Configuration
1-2: SDA – UCB0SDA
3-4: SCL – UCB0SCL
No communication
possible via I2C
Required for
inter-processor
communication
Header H1
(Pins 1-2, 3-4,
5-6, 7-8)
SPI Configuration
1-2: SDI – UCB0SIMO
3-4: SDO – UCB0SOMI
5-6: P1.4 – P3.0 (CS)
7-8: SCLK – UCB0CLK
No communication
possible via SPI
Required for
inter-processor
communication
Table B-1 breaks down the function of each jumper shown in Figure B-1.

Audio output jack
MSP430FG4618/F2013 Experimenter's Board
RF Daughter Card Connect Isolated RS232 Communication
Breadboard
Sallen-Key 2nd Order OA1 Active LPF
(For opt. F2013 programming)
0-00
SoftBaugh SBLCDA4
(A4/OA1I0)
(A3/OA1O)
(A7/DAC1)
(A0/OA0I0) (A5/OA2O) (A1/OA0O) (A2/OA0I1)
(Mic Supply)
MSP430FG4618 Pin Access Power Supply Configuration
(Output Attn.)
VCC_1: FG4618 Supply Config Pos 1-2: FET Powered VCC_2: F2013 Supply Config Pos 2-3: Battery Powered
Buzzer Mute
Mic Input Circuitry and 1st Order OA0 Active HPF
MSP-EXP430FG4618 PCB Ver 0-00 Document Number:
Date: 26-Oct-2006 Sheet: 1/1
VER:
+
+
+
+
A1
C9 C10
C8
C13
C6
C2
12
H2
34 56 78 12
H3
34 56 78 12
H4
34 56 78
12
H7
34 56 78 12
H6
34 56 78
12
H8
34 56 78
C12
1
BATT
2
P1.0/TACLK/ACLK/A0+ 2
P1.1/TA0/A0-/A4+ 3 P1.2/TA1/A1+/A4- 4
P1.3/VREF/A1- 5
P1.4/SMCLK/A2+/TCK 6
P1.5/TA0/A2-/SCLK/TMS 7
P1.6/TA1/A3+/SDO/SCL/TDI/TCLK 8
P1.7/A3-/SDI/SDA/TDO/TDI 9
VCC
1
VSS
14
TEST/SBWTCK
11
XIN/P2.6/TA1
13
XOUT/P2.7
12
NMI/RST/SBWTDIO
10
U4
LED3
LED4
1
JP3
2
1
JP2
2
21
SP1
1
JP1
2
1 2 3
VCC_1
C18
12
H5
34
C19
C21
1
JP4
2
C1
12
H9
34 56
12
M1
+-
B1
7F_7G_7E_DP7
P$1 7A_7B_7C_7D P$2 6F_6G_6E_DP6 P$3 6A_6B_6C_6D P$4 5F_5G_5E_COL5 P$5 5A_5B_5C_5D P$6 4F_4G_4E_DP4 P$7 4A_4B_4C_4D P$8 3F_3G_3E_COL3 P$9 3A_3B_3C_3D
P$10 2F_2G_2E_DP2 P$11 2A_2B_2C_2D P$12 1F_1G_1E_DP1 P$13 1A_1B_1C_1D P$14
COM3 P$15 COM2 P$16 COM1 P$17 COM0 P$18
F5_PR_P4_P3 P$19
F1_F2_F3_F4 P$20
PL_P0_P1_P2 P$21
AU_AR_AD_AL P$22
BT_B1_B0_BB P$23
ANT_A2_A1_A0 P$24
ENV_TX_RX_8BC P$25
DOL_ERR_MINUS_MEM P$26
1 3 5 7 9
JTAG2
11 13
2 4 6 12 14 8 10
1 3 5 7 9
JTAG1
11 13
2 4 6
12 14
8
10
1
62 73 84 95
RS232
G1 G2
C3
D2
D1
2 3
7 8 5 6
U2
2 3
7 8 5 6
U1
Q1
12
S1
12
S2
R33 R31
R26R27R34
R29 R32
R30
R19
R18
R20
R13
R14
R15
R16
R23
R8
R3
R10
R1
R2
R5
R9
R4
R11
R12
R17
1
PWR2
2
1
PWR1
2
80
79
78
77
76
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
25 24 23 22 21
20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
60 59 58 57 56 55 54 53 52 51
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
LED1
R6
LED2
R7
R28
C4
D3
X1
X2
C15
12
BB3
34 56 78 910 1112 1314 1516 1718
C5 C7
12
BB1
34 56 78 910 1112 1314 1516 1718
12
BB2
34 56 78 910 1112 1314 1516 1718
BAND
P$4
TIP
P$1
RING
P$2
12
H1
34 56 78
11 11 12 12 13 13 14 14
11 22
15 15 16 16
4
4
5
5
6
6
7
7
8
8
9
910
10
33
INNER_GND
INNER_GND
C11
C16 C17
R24 R25
1 2 3
VCC_2
R21 R22
C14
C20
1 3 5
2 4 6
7 9
8 10
11 13 15
12 14 16
17 19
RF1
18 20
1 3 5
2 4 6
7 9
8 10
11 13 15
12 14 16
17 19
RF2
18 20
GND
S0
S0
S1
S1
S2
S2
S3
S3
S5
S5
S6
S6
S7
S7
S8
S8
S9
S9
S10
S10
S11
S11
S12
S12
S13
S13
S14
S14
S4
S4
S15
S15
S16
S16
S17
S17
S18
S18
S19
S19
S20
S20
COM3
COM3
COM2
COM2
COM1
COM1
COM0
COM0
UCB0SDA
UCB0SDA
UCB0SDA
UCB0SCL
UCB0SCL
UCB0SCL
DVCC_4618
DVCC_4618
DVCC_4618
DVCC_4618
DVCC_4618
DVCC_4618
DVCC_4618
SIMO1
SIMO1
SIMO1
SOMI1 SOMI1
SOMI1
UCLK1
UCLK1
UCLK1
S21
S21
GDO2
GDO2
GDO2
GDO0
GDO0
GDO0
P3.0
P3.0
P3.0
UTXD1
UTXD1
URXD1
URXD1
P7.5
P7.5
2013_P1.2 2013_P1.3 2013_P1.4 2013_P1.5
SCL SDA2013_P2.7
2013_P2.6
SBWTCK
SBWTCK
SBWTDIO
SBWTDIO
P6.0
P6.0
P6.0
P6.1
P6.1
P6.1
P6.2
P6.2
P6.2
P6.5
P6.5
P6.5
LCDCAP
LCDCAP
P10.7
P10.7
P5.1
P5.1
VEREF+
VEREF+
RESETCC
RESETCC
RESETCC
VREG_EN
VREG_EN
VREG_EN
FIFO
FIFO
FIFO
FIFOP
FIFOP
FIFOP
PC_GND
2013_P1.1 2013_P1.0
P2.0
P2.0
P2.2
P2.2
P2.6
P2.6
UCB0CLK
UCB0CLK
UCB0CLK
P3.4
P3.4
P3.5
P3.5 P3.5
P3.7
P3.7
P5.6
P5.6
P7.4
P7.4
P7.6
P7.6
P7.7
P7.7
VREF
VREF
P5.0
P5.0
P10.6
P10.6
P6.4
P6.4
P6.4
P6.6
P6.6
P6.3
P6.3
P6.3
P6.7
P6.7
P6.7
VEREF-
VEREF-
SW1
SW1
SW1
SW2
SW2
SW2
P2.1
P2.1
P2.3
P2.3
P2.3
P2.7
P2.7 UCA0TXD
UCA0TXD UCA0TXD
UCA0RXD
UCA0RXD UCA0RXD
P3.6
P3.6 P5.7
P5.7
P5.5
P5.5
P4.2
P4.2
P4.2
P7.0
P7.0
UCA0SIMO
UCA0SIMO
UCA0SOMI
UCA0SOMI
UCA0CLK
UCA0CLK
P4.7
P4.7
P4.6
P4.6
LCL_PWR1
LCL_PWR1
FET_PWR1
FET_PWR1
FET_PWR2
FET_PWR2
LCL_PWR2
LCL_PWR2
AVCC_4618
AVCC_4618
0.1uF 10uF
0.1uF
0.1uF
0.1uF
GND
GND
VCC
0.1uF
GND
GND
0.1uF
GND
VCC
GND
MSP430F2013PW
GND
GND
GND
AL60P
470n
GND
10uF
15p
GND
VCC
0.1uF
GND
GND
10uF
1N4148
1N4148
PS8802
PS8802
MMBT5088
GND
GND
VCC
GNDGND
10k 470k
4701k3k3
1k
0
150k
10
47k
470
5M1
5M1
5M1
5M1
470
10
47k
10
1k
2k2
100
2k2
2k2
100k
100k
470
GND
VCC_2013
GND
470
GND
470
22k
10uF
1N4148
10uF
10uF 10uF
VCC
VCC
1uF
22nF 3.3nF
1.4k 15.4k
0-DNP 0-DNP
DNP
470n
GND
GND
GND

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