Texas Instruments SimpleLink CC1312PSIP User manual

CC1312PSIP SimpleLink™ Sub-1-GHz Wireless System-in-Package
1 Features
Wireless microcontroller
• Powerful 48 MHz Arm® Cortex®-M4F processor
• 352KB flash program memory
• 256KB of ROM for protocols and library functions
• 8KB of cache SRAM
• 80KB of ultra-low leakage SRAM with parity for
high-reliability operation
• Programmable radio includes support for 2-
(G)FSK, 4-(G)FSK, MSK, OOK, IEEE 802.15.4
PHY and MAC
• Supports over-the-air upgrade (OTA)
Ultra-low power sensor controller
• Autonomous MCU with 4KB of SRAM
• Sample, store, and process sensor data
• Fast wake-up for low-power operation
• Software defined peripherals; capacitive touch,
flow meter, LCD
Low power consumption
• MCU consumption:
– 2.9 mA active mode, CoreMark®
– 60 μA/MHz running CoreMark®
– 0.9 μA standby mode, RTC, 80KB SRAM
– 0.1 μA shutdown mode, wake-up on pin
• Ultra low-power sensor controller consumption:
– 30 μA in 2 MHz mode
– 808 μA in 24 MHz mode
• Radio Consumption:
– 5.8 mA RX at 868 MHz
– 28.7 mA TX at +14 dBm at 868 MHz
– 62 mA TX at +19 dBm at 915 MHz
– 86 mA TX at +20 dBm at 915 MHz
Wireless protocol support
•Wi-SUN®
•mioty®
•Wireless M-Bus
•SimpleLink™ TI 15.4-stack
• 6LoWPAN, Proprietary systems
High-performance radio
• –119 dBm for 2.5 kbps long-range mode
• –108 dBm at 50 kbps, 802.15.4, 868 MHz
• Output power up to +20 dBm with temperature and
voltage compensation
Regulatory compliance
• Certified module for:
– FCC CFR47 Part 15
– ISED Certified (Canada)
• Suitable for systems targeting compliance with:
– ETSI EN 300 220 Receiver Cat. 1.5 and 2, EN
303 131, EN 303 204
– ARIB STD-T108
MCU peripherals
• Digital peripherals can be routed to 30 GPIOs
• Four 32-bit or eight 16-bit general-purpose timers
• 12-bit ADC, 200 kSamples/s, 8 channels
• 8-bit DAC, two comparators
• Programmable current source
• Two UART, two SSI, I2C, I2S
• Real-time clock (RTC)
• Integrated temperature and battery monitor
Security enablers
• AES 128- and 256-bit cryptographic accelerator
• ECC and RSA public key hardware accelerator
• SHA2 Accelerator (full suite up to SHA-512)
• True random number generator (TRNG)
Development tools and software
•LP-CC1312PSIP Development Kit
•SimpleLink Low Power F2 SDK
•SmartRF™ Studio for simple radio configuration
•Sensor Controller Studio for building low-power
sensing applications
•SysConfig system configuration tool
Operating range
• 1.8 V to 3.8 V single supply voltage
• –40 to +105°C (+14 dBm PA)
• –40 to +95°C (+20 dBm PA)
All necessary components integrated
• 48-MHz crystal: RF accuracy ±10 ppm initial and
over temperature
• 32-kHz crystal: RTC accuracy ±50 ppm initial and
over temperature
• DC/DC converter components and decoupling
• Single-RF pin for RX/TX with 50 Ohm impedance.
Package
• 7-mm × 7-mm MOT (30 GPIOs)
• Pin-to-pin compatible with CC2652RSIP and
CC2652PSIP
• RoHS-compliant package
CC1312PSIP
SWRS293 – NOVEMBER 2023
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

2 Applications
• 868 and 902 to 928 MHz ISM and SRD systems 1
with down to 4 kHz of receive bandwidth
•Building automation
– Building security systems – motion detector,
electronic smart lock, door and window sensor,
garage door system, gateway
– HVAC – thermostat, wireless environmental
sensor, HVAC system controller, gateway
– Fire safety system – smoke and heat detector,
fire alarm control panel (FACP)
– Video surveillance – IP network camera
– Elevators and escalators – elevator main
control panel for elevators and escalators
•Grid infrastructure
– Smart meters – water meter, gas meter,
electricity meter, and heat cost allocators
– Grid communications – wireless
communications – long-range sensor
applications
– EV Charging infrastructure – AC charging (pile)
station
– Solar Energy - Micro inverter
– Other alternative energy – energy harvesting
•Industrial transport – asset tracking
•Factory automation and control
•Medical
•Communication equipment
–Wired networking – wireless LAN or Wi-Fi
access points, edge router
3 Description
The SimpleLink™ CC1312PSIP device is an RF certified System-in-Package (SiP) Sub-1 GHz wireless
module supporting Wi-SUN®, Wireless M-Bus, IEEE 802.15.4, IPv6-enabled smart objects (6LoWPAN), mioty,
proprietary systems, including the TI 15.4-Stack. The CC1312PSIP microcontroller (MCU) is based on an Arm®
Cortex® M4F main processor and optimized for low-power wireless communication and advanced sensing in grid
infrastructure, building automation, retail automation and medical applications.
The CC1312PSIP has a low sleep current of 0.9 μA with RTC and 80KB RAM retention. In addition to the main
Cortex® M4F processor, the device also has an autonomous ultra-low power Sensor Controller CPU with fast
wake-up capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at average 1-μA
system current.
The CC1312PSIP has Low SER (Soft Error Rate) FIT (Failure-in-time) for long operational lifetime. Always-on
SRAM parity minimizes risk for corruption due to potential radiation events. Consistent with many customers’ 10
to 15 years or longer life cycle requirements, TI has a product life cycle policy with a commitment to product
longevity and continuity of supply including dual sourcing of key components in the SIP.
The CC1312PSIP device is part of the SimpleLink™ MCU platform, which consists of Wi-Fi®, Bluetooth® Low
Energy, Thread, Zigbee, Wi-SUN®, Amazon Sidewalk, mioty, Sub-1 GHz MCUs, and host MCUs. CC1312PSIP
is part of a portfolio that includes pin-compatible 2.4-GHz SIPs for easy adaption of a wireless product
to multiple communication standards. The common SimpleLink Low Power F2 SDK and SysConfig system
configuration tool supports migration between devices in the portfolio. A comprehensive number of software
stacks, application examples and SimpleLink™ Academy training sessions are included in the SDK. For more
information, visit wireless connectivity.
Device Information
PART NUMBER(1) PACKAGE BODY SIZE (NOM)
CC1312PSIPMOT QFM 7.00 mm × 7.00 mm
(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section
13, or see the TI website.
1See RF Core for additional details on supported protocol standards, modulation formats, and data rates.
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4 Functional Block Diagram
48-MHz
Crystal
32.768-kHz
Crystal
CC1312P
DCDC
Passives
+20-dBm
IPC
+14-dBm/RX
IPC
RF
Switch
JTAG
(1.8 V to 3.8 V) VDSS_PU
RESET_N
User DIO_0-31
(1.8 V to 3.8 V) VDSS
GND
RF (50 Ω)
DIO_3
DIO_0
Figure 4-1. CC1312PSIP Block Diagram
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Main CPU
Up to
352KB
Flash
with 8KB
Cache
Sensor Interface
cJTAG
Up to
80KB
SRAM
with Parity
Arm®Cortex®-M4F
Processor
LDO, Clocks, and References
Optional DC/DC Converter
RF Core
Arm®Cortex®-M0
Processor
DSP Modem
16KB
SRAM
ROM
ULP Sensor Controller
Low-Power Comparator
12-bit ADC, 200 ks/s
Constant Current Source
SPI-I2C Digital Sensor IF
4KB SRAM
Time-to-Digital Converter
ADC
ADC
48 MHz
60 µA/MHz (3.6 V)
Digital PLL
256KB
ROM
4× 32-bit Timers
2× SSI (SPI)
Watchdog Timer
Temperature and
Battery Monitor
RTC
I2C and I2S
2× UART
32 ch. µDMA
32 GPIOs
AES-256, SHA2-512
ECC, RSA
TRNG
50 Ohm
Sensor Interface
ULP Sensor Controller
2x Low-Power Comparator
12-bit ADC, 200 ks/s
Capacitive Touch IF
SPI-I2C Digital Sensor IF
4KB SRAM
Time-to-Digital Converter
8-bit DAC
14-dBm
RF Balun
CC1312PSIP
RF Switch
20-dBm
RF Balun
General Hardware Peripherals and Modules
48-MHz
Crystal with load
capacitors
32.768-kHz
Crystal with load
capacitos
DC/DC
Components
Decoupling
capacitors
Figure 4-2. CC1312PSIP Hardware Overview
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 2
3 Description.......................................................................2
4 Functional Block Diagram.............................................. 3
5 Revision History.............................................................. 5
6 Device Comparison......................................................... 6
7 Pin Configuration and Functions...................................9
7.1 Pin Diagram – MOT Package (Top View)................... 9
7.2 Signal Descriptions – MOT Package........................ 10
7.3 Connections for Unused Pins and Modules.............. 11
8 Specifications................................................................ 12
8.1 Absolute Maximum Ratings...................................... 12
8.2 ESD Ratings............................................................. 12
8.3 Recommended Operating Conditions.......................12
8.4 Power Supply and Modules...................................... 12
8.5 Power Consumption - Power Modes........................ 13
8.6 Power Consumption - Radio Modes......................... 14
8.7 Nonvolatile (Flash) Memory Characteristics............. 14
8.8 Thermal Resistance Characteristics......................... 14
8.9 RF Frequency Bands................................................ 15
8.10 861 MHz to 1054 MHz - Receive (RX)....................16
8.11 861 MHz to 1054 MHz - Transmit (TX) .................. 21
8.12 861 MHz to 1054 MHz - PLL Phase Noise
Wideband Mode.......................................................... 22
8.13 861 MHz to 1054 MHz - PLL Phase Noise
Narrowband Mode.......................................................23
8.14 Timing and Switching Characteristics..................... 23
8.15 Peripheral Characteristics.......................................27
8.16 Typical Characteristics............................................ 35
9 Detailed Description......................................................44
9.1 Overview................................................................... 44
9.2 System CPU............................................................. 44
9.3 Radio (RF Core)........................................................45
9.4 Memory..................................................................... 46
9.5 Sensor Controller...................................................... 47
9.6 Cryptography............................................................ 48
9.7 Timers....................................................................... 49
9.8 Serial Peripherals and I/O.........................................50
9.9 Battery and Temperature Monitor............................. 50
9.10 µDMA......................................................................50
9.11 Debug......................................................................50
9.12 Power Management................................................51
9.13 Clock Systems, production calibration and
temperature compensation..........................................52
9.14 Network Processor..................................................53
9.15 Device Certification and Qualification..................... 54
9.16 Module Markings.....................................................56
9.17 End Product Labeling..............................................56
9.18 Manual Information to the End User....................... 56
10 Application, Implementation, and Layout................. 57
10.1 Application Information........................................... 57
10.2 Device Connection and Layout Fundamentals....... 58
10.3 PCB Layout Guidelines...........................................58
10.4 Reference Designs................................................. 62
11 Environmental Requirements and SMT
Specifications ...............................................................63
11.1 PCB Bending...........................................................63
11.2 Handling Environment.............................................63
11.3 Storage Condition................................................... 63
11.4 PCB Assembly Guide..............................................63
11.5 Baking Conditions................................................... 64
11.6 Soldering and Reflow Condition..............................65
12 Device and Documentation Support..........................66
12.1 Device Nomenclature..............................................66
12.2 Tools and Software................................................. 66
12.3 Documentation Support.......................................... 68
12.4 Support Resources................................................. 69
12.5 Trademarks.............................................................69
12.6 Electrostatic Discharge Caution..............................69
12.7 Glossary..................................................................69
13 Mechanical, Packaging, and Orderable
Information.................................................................... 70
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION NOTES
November
2023
* Initial Release
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6 Device Comparison
DEVICE,
Wireless MCU
RADIO SUPPORT
FLASH (KB) RAM + Cache (KB) GPIO
PACKAGE SIZE
Sub-1 GHz Prop. 2.4GHz Prop.
Wireless M-Bus mioty
Wi-SUN® Sidewalk Bluetooth® LE
ZigBee Thread
Multiprotocol +20 dBm PA 4 × 4 mm VQFN (24) 4 × 4 mm VQFN (32) 5 × 5 mm VQFN (32) 5 × 5 mm VQFN (40) 7 × 7 mm VQFN (48)
8 × 8mm VQFN (48)
CC1310 X X X 32-128 16-20 + 8 10-30 X X X
CC1311R3 X X X 352 32 + 8 22-30 X X
CC1311P3 X X X X 352 32 + 8 26 X
CC1312R X X X X 352 80 + 8 30 X
CC1312R7 X X X X X X 704 144 + 8 30 X
CC1352R X X X X X X X X X 352 80 + 8 28 X
CC1352P X X X X X X X X X X 352 80 + 8 26 X
CC1352P7 X X X X X X X X X X X 704 144 + 8 26 X X
CC1314R10 X X X X X X 1024 256 + 8 30-46 X X
CC1354R10 X X X X X X X X X X 1024 256 + 8 28-42 X X
CC1354P10 X X X X X X X X X X X 1024 256 + 8 26-42 X X
CC2340R2 X X X 256 28 12 X
CC2340R5 X X X X 512 36 12-26 X X
CC2340R5-Q1 X 512 36 19 X
CC2640R2F X 128 20 + 8 10-31 X X X
CC2642R X 352 80 + 8 31 X
CC2642R-Q1 X 352 80 + 8 31 X
CC2651R3 X X X 352 32 + 8 23-31 X X
CC2651P3 X X X X 352 32 + 8 22-26 X X
CC2652R X X X X X 352 80 + 8 31 X
CC2652RB X X X X X 352 80 + 8 31 X
CC2652R7 X X X X X 704 144 + 8 31 X
CC2652P X X X X X X 352 80 + 8 26 X
CC2652P7 X X X X X X 704 144 + 8 26 X
CC2662R-Q1 X 352 80 + 8 31 X
CC2674R10 X X X X X 1024 256 + 8 31-42 X X
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DEVICE,
Wireless MCU
RADIO SUPPORT
FLASH (KB) RAM + Cache (KB) GPIO
PACKAGE SIZE
Sub-1 GHz Prop. 2.4GHz Prop.
Wireless M-Bus mioty
Wi-SUN® Sidewalk Bluetooth® LE
ZigBee Thread
Multiprotocol +20 dBm PA 4 × 4 mm VQFN (24) 4 × 4 mm VQFN (32) 5 × 5 mm VQFN (32) 5 × 5 mm VQFN (40) 7 × 7 mm VQFN (48)
8 × 8mm VQFN (48)
CC2674P10 X X X X X X 1024 256 + 8 26-42 X X
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DEVICE,
Wireless
System-in-
Package
ANTENNA RADIO SUPPORT CERTIFICATIONS
FLAS
H (KB)
RAM +
Cache (KB) GPIO
PACKAGE
SIZE
External
Integrated Sub-1GHz Prop. 2.4 GHz Prop. Wireless M-Bus mioty
Wi-SUN®
Bluetooth® LE ZigBee +10 dBm PA +20 dBm PA FCC/IC
CE
RER (UK) Japan 7 × 7 QFM (73) 7 × 7 QFM (59)
CC2651R3SIP
A
X X X X X X X X352 32 + 8 32 X
CC2652RSIP XX X X X X X352 80 + 8 32 X
CC2652PSIP X X X X X X X X 352 80 + 8 30 X
CC1312PSIP XX X X X XX X X352 80 + 8 30 X
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7 Pin Configuration and Functions
7.1 Pin Diagram – MOT Package (Top View)
CC1312PSIP
DIO_28
DIO_25
2
1
DIO_26
DIO_27
DIO_31 DIO_18 DIO_19 DIO_20 DIO_21
DIO_22 DIO_23
DIO_24
VDDS
VDDS_PU
DIO_4
DIO_1
DIO_2
GND RF GND GND
NC NC
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23
24
25
36
37
35
34
33
32
31
30
29
28
27
26
48 47 46 45 44 43 42 41 40 39
38
GND
nRESET
DIO_29
NC
GND
DIO_30
GND
GND
GND
GND
JTAG_TCKC
DIO_17
DIO_16
DIO_15
JTAG_TMSC
DIO_13
DIO_14
DIO_11
DIO_12
DIO_9
DIO_10
DIO_7
DIO_8
DIO_6
DIO_5
49
54
59
64
69
50
55
60
65
70
51
56
61
66
71
52
57
62
67
72
53
58
63
68
73
Figure 7-1. MOT (7-mm × 7-mm) Pinout, 0.5-mm Pitch (Top View)
The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:
• Pin 23, DIO_5
• Pin 24, DIO_6
• Pin 25, DIO_7
• Pin 34, JTAG_TMSC
• Pin 36, DIO_16
• Pin 37, DIO_17
The following I/O pins marked in Figure 7-1 in italics have analog capabilities:
• Pin 1, DIO_26
• Pin 2, DIO_27
• Pin 3, DIO_28
• Pin 7, DIO_29
• Pin 8, DIO_30
• Pin 44, DIO_23
• Pin 45, DIO_24
• Pin 48, DIO_25
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7.2 Signal Descriptions – MOT Package
Table 7-1. Signal Descriptions – SIP Package
PIN I/O TYPE DESCRIPTION
NAME NO.
NC 14 I/O Digital No Connect, this pin is internally connected to the RF switch
DIO_1 21 I/O Digital GPIO
DIO_10 28 I/O Digital GPIO
DIO_11 29 I/O Digital GPIO
DIO_12 30 I/O Digital GPIO
DIO_13 31 I/O Digital GPIO
DIO_14 32 I/O Digital GPIO
DIO_15 33 I/O Digital GPIO
DIO_16 36 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 37 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 39 I/O Digital GPIO
DIO_19 40 I/O Digital GPIO
DIO_2 20 I/O Digital GPIO
DIO_20 41 I/O Digital GPIO
DIO_21 42 I/O Digital GPIO
DIO_22 43 I/O Digital GPIO
DIO_23 44 I/O Digital or Analog GPIO, analog capability
DIO_24 45 I/O Digital or Analog GPIO, analog capability
DIO_25 48 I/O Digital or Analog GPIO, analog capability
DIO_26 1 I/O Digital or Analog GPIO, analog capability
DIO_27 2 I/O Digital or Analog GPIO, analog capability
DIO_28 3 I/O Digital or Analog GPIO, analog capability
DIO_29 7 I/O Digital or Analog GPIO, analog capability
NC 15 I/O Digital No Connect, this pin is internally connected to the RF switch
DIO_30 8 I/O Digital or Analog GPIO, analog capability
DIO_31 38 I/O Digital Supports only peripheral functionality. Does not support general
purpose I/O functionality.
DIO_4 22 I/O Digital GPIO
DIO_5 23 I/O Digital GPIO, high-drive capability
DIO_6 24 I/O Digital GPIO, high-drive capability
DIO_7 25 I/O Digital GPIO, high-drive capability
DIO_8 26 I/O Digital GPIO
DIO_9 27 I/O Digital GPIO
GND 5 — — GND
GND 9 — — GND
GND 10 — — GND
GND 11 — — GND
GND 12 — — GND
GND 13 — — GND
GND 16 — — GND
GND 17 — — GND
GND 19 — — GND
GND 49-73 — — GND
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Table 7-1. Signal Descriptions – SIP Package (continued)
PIN I/O TYPE DESCRIPTION
NAME NO.
NC 6 — — No Connect
nRESET 4 I Digital Reset, active low. Internal pullup resistor and internal 100 nF to
VDDS_PU
RF 18 — RF 50 ohm RF port
JTAG_TCKC 35 I Digital JTAG_TCKC
JTAG_TMSC 34 I/O Digital JTAG_TMSC, high-drive capability
VDDS 46 — Power 1.8-V to 3.8-V main SIP supply
VDDS_PU 47 — Power Power to reset internal pullup resistor
7.3 Connections for Unused Pins and Modules
Table 7-2. Connections for Unused Pins
FUNCTION SIGNAL NAME PIN NUMBER ACCEPTABLE PRACTICE
(1)
PREFERRED
PRACTICE (1)
GPIO DIO_n
1-3
7-8
20-33
36-45
48
NC or GND NC
No Connects NC 6, 14-15 NC NC
(1) NC = No connect
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN MAX UNIT
VDDS (1) Supply voltage –0.3 4.1 V
Voltage on any digital pin(3) –0.3 VDDS + 0.3, max 4.1 V
Vin Voltage on ADC input
Voltage scaling enabled –0.3 VDDS
VVoltage scaling disabled, internal reference –0.3 1.49
Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9
10 dBm
Tstg Storage temperature –40 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime
(2) All voltage values are with respect to ground, unless otherwise noted.
(3) Including analog capable DIOs.
8.2 ESD Ratings
VALUE UNIT
VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins ±1000 V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) All pins ±500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Operating ambient temperature(1) (2) –40 105 °C
Operating ambient temperature(1) (2)
Maximum operating temperature with transmit
output power above +15 dBm (using the +20 dBm
PA)(2)
–40 95 °C
Operating supply voltage (VDDS) 1.8 3.8 V
Operating supply voltage (VDDS), boost mode VDDR = 1.95 V
+14 dBm RF output power 2.1 3.8 V
Rising supply voltage slew rate 0 100 mV/µs
Falling supply voltage slew rate 0 20 mV/µs
(1) Operation at or near maximum operating temperature for extended durations will result in a reduction in lifetime.
(2) For thermal resistance characteristics refer to Section 8.8.
8.4 Power Supply and Modules
over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
VDDS Power-on-Reset (POR) threshold 1.1 - 1.55 V
VDDS Brown-out Detector (BOD) (1) Rising threshold 1.77 V
VDDS Brown-out Detector (BOD), before initial boot (2) Rising threshold 1.70 V
VDDS Brown-out Detector (BOD) (1) Falling threshold 1.75 V
(1) For boost mode (VDDR =1.95 V), TI drivers software initialization will trim VDDS BOD limits to maximum (approximately 2.0 V)
(2) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the RESET_N pin
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8.5 Power Consumption - Power Modes
When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.6 V with DC/DC enabled unless
otherwise noted.
PARAMETER TEST CONDITIONS TYP UNIT
Core Current Consumption
Icore
Reset Reset. RESET_N pin asserted or VDDS below power-on-reset threshold (4) 36 µA
Shutdown Shutdown. No clocks running, no retention 150 nA
Standby
without cache retention
RTC running, CPU, 80KB RAM and (partial) register retention.
RCOSC_LF 0.9
µA
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF 1.0
Standby
with cache retention
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF 2.8
µA
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF 2.9
Idle Supply Systems and RAM powered
RCOSC_HF 590 µA
Icore Active MCU running CoreMark at 48 MHz
RCOSC_HF 2.89 mA
Peripheral Current Consumption
Iperi
Peripheral power
domain Delta current with domain enabled 82
µA
Serial power domain Delta current with domain enabled 5.5
RF Core Delta current with power domain enabled,
clock enabled, RF core idle 179
µDMA Delta current with clock enabled, module is idle 54
Timers Delta current with clock enabled, module is idle(3) 68
I2C Delta current with clock enabled, module is idle 8.2
I2S Delta current with clock enabled, module is idle 22
SSI Delta current with clock enabled, module is idle(2) 70
UART Delta current with clock enabled, module is idle(1) 141
CRYPTO (AES) Delta current with clock enabled, module is idle 21
PKA Delta current with clock enabled, module is idle 71
TRNG Delta current with clock enabled, module is idle 30
Sensor Controller Engine Consumption
ISCE
Active mode 24 MHz, infinite loop 808 µA
Low-power mode 2 MHz, infinite loop 30.1
(1) Only one UART running
(2) Only one SSI running
(3) Only one GPTimer running
(4) CC1312PSIP integrates a 100 kΩ pull-up resistor on nRESET
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8.6 Power Consumption - Radio Modes
When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.6 V with DC/DC enabled unless
otherwise noted.
Using boost mode (increasing VDDR up to 1.95 V), will increase system current by 15% (does not apply to TX +14 dBm
setting where this current is already included).
Relevant Icore and Iperi currents are included in below numbers.
PARAMETER TEST CONDITIONS TYP UNIT
Radio receive current, 868 MHz 5.8 mA
Radio transmit current
Regular PA
0 dBm output power setting
868 MHz 9.4 mA
+10 dBm output power setting
868 MHz 17.3 mA
Radio transmit current
Boost mode, regular PA
+14 dBm output power setting
868 MHz 28.7 mA
Radio transmit current
High-power PA
Transmit (TX), +19 dBm output power setting
915 MHz, VDDS = 3.3 V 62 mA
Radio transmit current
High-power PA
Transmit (TX), +20 dBm output power setting
915 MHz, VDDS = 3.3 V 86 mA
8.7 Nonvolatile (Flash) Memory Characteristics
Over operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Flash sector size 8 KB
Supported flash erase cycles before failure, single-bank(1) (5) 30 k Cycles
Supported flash erase cycles before failure, single sector(2) 60 k Cycles
Maximum number of write operations per row before sector
erase(3) 83 Write Operations
Flash retention 105 °C 11.4 Years at 105
°C
Flash sector erase current Average delta current 10.7 mA
Flash sector erase time(4) Zero cycles 10 ms
30k cycles 4000 ms
Flash write current Average delta current, 4 bytes at a time 6.2 mA
Flash write time(4) 4 bytes at a time 21.6 µs
(1) A full bank erase is counted as a single erase cycle on each sector.
(2) Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k
cycles
(3) Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum
per write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum
number of write operations per row is reached.
(4) This number is dependent on Flash aging and increases over time and erase cycles
(5) Aborting flash during erase or program modes is not a safe operation.
8.8 Thermal Resistance Characteristics
THERMAL METRIC (1)
PACKAGE
UNIT
MOT
(SIP)
73 PINS
RθJA Junction-to-ambient thermal resistance 48.7 °C/W(2)
RθJC(top) Junction-to-case (top) thermal resistance 12.4 °C/W(2)
RθJB Junction-to-board thermal resistance 32.2 °C/W(2)
ψJT Junction-to-top characterization parameter 0.40 °C/W(2)
ψJB Junction-to-board characterization parameter 32.0 °C/W(2)
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
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(2) °C/W = degrees Celsius per watt.
8.9 RF Frequency Bands
Over operating free-air temperature range (unless otherwise noted).
PARAMETER MIN TYP MAX UNIT
Frequency band 863 930 MHz
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8.10 861 MHz to 1054 MHz - Receive (RX)
When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high
power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General Parameters
Digital channel filter programmable receive
bandwidth 4 4000 kHz
Data rate step size 1.5 bps
Spurious emissions 25 MHz to 1 GHz 868 MHz
Conducted emissions measured according to ETSI EN 300 220
< -57 dBm
Spurious emissions 1 GHz to 13 GHz < -47 dBm
802.15.4, 50 kbps, ±25 kHz deviation, 2-GFSK, 100 kHz RX Bandwidth
Sensitivity BER = 10–2, 868 MHz –108 dBm
Saturation limit BER = 10–2, 868 MHz 10 dBm
Selectivity, ±200 kHz BER = 10–2, 868 MHz(1) 44 dB
Selectivity, ±400 kHz BER = 10–2, 868 MHz(1) 48 dB
Blocking, ±1 MHz BER = 10–2, 868 MHz(1) 57 dB
Blocking, ±2 MHz BER = 10–2, 868 MHz(1) 62 dB
Blocking, ±5 MHz BER = 10–2, 868 MHz(1) 68 dB
Blocking, ±10 MHz BER = 10–2, 868 MHz(1) 76 dB
Image rejection (image compensation
enabled) BER = 10–2, 868 MHz(1) 39 dB
RSSI dynamic range Starting from the sensitivity limit 95 dB
RSSI accuracy Starting from the sensitivity limit across the given dynamic range ±3 dB
802.15.4, 100 kbps, ±25 kHz deviation, 2-GFSK, 137 kHz RX Bandwidth
Sensitivity 100 kbps 868 MHz, 1% PER, 127 byte payload -101 dBm
Selectivity, ±200 kHz 868 MHz, 1% PER, 127 byte payload. Wanted signal at -96 dBm 38 dB
Selectivity, ±400 kHz 868 MHz, 1% PER, 127 byte payload. Wanted signal at -96 dBm 45 dB
Co-channel rejection 868 MHz, 1% PER, 127 byte payload. Wanted signal at -79 dBm -9 dB
802.15.4, 200 kbps, ±50 kHz deviation, 2-GFSK, 311 kHz RX Bandwidth
Sensitivity BER = 10–2, 868 MHz –103 dBm
Sensitivity BER = 10–2, 915 MHz –103 dBm
Selectivity, ±400 kHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 41 dB
Selectivity, ±800 kHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 47 dB
Blocking, ±2 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 55 dB
Blocking, ±10 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 67 dB
802.15.4, 500 kbps, ±190 kHz deviation, 2-GFSK, 655 kHz RX Bandwidth
Sensitivity 500 kbps 916 MHz, 1% PER, 127 byte payload -90 dBm
Selectivity, ±1 MHz 916 MHz, 1% PER, 127 byte payload. Wanted signal at -88 dBm 11 dB
Selectivity, ±2 MHz 916 MHz, 1% PER, 127 byte payload. Wanted signal at -88 dBm 43 dB
Co-channel rejection 916 MHz, 1% PER, 127 byte payload. Wanted signal at -71 dBm -9 dB
SimpleLink™ Long Range 2.5 kbps or 5 kbps (20 ksym/s, 2-GFSK, ±5 kHz Deviation, FEC (Half Rate), DSSS = 1:2 or 1:4, 34 kHz RX Bandwidth
Sensitivity 2.5 kbps, BER = 10–2, 868 MHz -119 dBm
Sensitivity 5 kbps, BER = 10–2, 868 MHz -117 dBm
Saturation limit 2.5 kbps, BER = 10–2, 868 MHz 10 dBm
Selectivity, ±100 kHz 2.5 kbps, BER = 10–2, 868 MHz(1) 49 dB
Selectivity, ±200 kHz 2.5 kbps, BER = 10–2, 868 MHz(1) 50 dB
Selectivity, ±300 kHz 2.5 kbps, BER = 10–2, 868 MHz(1) 51 dB
Blocking, ±1 MHz 2.5 kbps, BER = 10–2, 868 MHz(1) 63 dB
Blocking, ±2 MHz 2.5 kbps, BER = 10–2, 868 MHz(1) 68 dB
Blocking, ±5 MHz 2.5 kbps, BER = 10–2, 868 MHz(1) 78 dB
Blocking, ±10 MHz 2.5 kbps, BER = 10–2, 868 MHz(1) 87 dB
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When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high
power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Image rejection (image compensation
enabled) 2.5 kbps, BER = 10–2, 868 MHz(1) 45 dB
RSSI dynamic range Starting from the sensitivity limit 97 dB
RSSI accuracy Starting from the sensitivity limit across the given dynamic range ±3 dB
Wireless M-Bus
Receiver sensitivity, wM-BUS C-mode,
100 kbps ±45 kHz Receiver Bandwidth 236 kHz, BER 1% -104 dBm
Receiver sensitivity, wM-BUS T-mode,
100 kbps ±50 kHz Receiver Bandwidth 236 kHz, BER 1% -103 dBm
Receiver sensitivity, wM-BUS S2-mode,
32.768 kbps ±50 kHz Receiver Bandwidth 196 kHz, BER 1% -109 dBm
Receiver sensitivity, wM-BUS S1-mode,
32.768 kbps ±50 kHz Receiver Bandwidth 311 kHz, BER 1% -107 dBm
OOK, 4.8 kbps, 39 kHz RX Bandwidth
Sensitivity BER = 10–2, 868 MHz -112 dBm
Sensitivity BER = 10–2, 915 MHz -112 dBm
Narrowband, 9.6 kbps ±2.4 kHz deviation, 2-GFSK, 868 MHz, 17.1 kHz RX Bandwidth
Sensitivity 1% BER -115 dBm
Adjacent Channel Rejection 1% BER. Wanted signal 3 dB above the ETSI reference
sensitivity limit (-104.6 dBm). Interferer ±20 kHz 39 dB
Alternate Channel Rejection 1% BER. Wanted signal 3 dB above the ETSI reference
sensitivity limit (-104.6 dBm). Interferer ±40 kHz 40 dB
Blocking, ±1 MHz
1% BER. Wanted signal 3 dB above the ETSI reference
sensitivity limit (-104.6 dBm).
65 dB
Blocking, ±2 MHz 69 dB
Blocking, ±10 MHz 85 dB
1 Mbps, ±350 kHz deviation, 2-GFSK, 2.2 MHz RX Bandwidth
Sensitivity BER = 10–2, 868 MHz -94 dBm
Sensitivity BER = 10–2, 915 MHz -93 dBm
Blocking, +2 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 44 dB
Blocking, -2 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 27 dB
Blocking, +10 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 59 dB
Blocking, -10 MHz BER = 10–2, 915 MHz. Wanted signal 3 dB above sensitivity limit. 54 dB
Wi-SUN, 2-GFSK
Sensitivity 50 kbps, ±12.5 kHz deviation, 2-GFSK, 866.6 MHz, 68 kHz RX
BW, 10% PER, 250 byte payload -104 dBm
Selectivity, -100 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz
50 kbps, ±12.5 kHz deviation, 2-GFSK, 68 kHz RX Bandwidth,
866.6 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
32 dB
Selectivity, +100 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz 33 dB
Selectivity, ±100 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz 30 dB
Selectivity, -200 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz 36 dB
Selectivity, +200 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz 38 dB
Selectivity, ±200 kHz, 50 kbps, ±12.5 kHz
deviation, 2-GFSK, 866.6 MHz 37 dB
Sensitivity 50 kbps, ±25 kHz deviation, 2-GFSK, 98 kHz RX Bandwidth,
918.2 MHz, 10% PER, 250 byte payload -104 dBm
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When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high
power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Selectivity, -200 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz
50 kbps, ±25 kHz deviation, 2-GFSK, 98 kHz RX Bandwidth,
918.2 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
34 dB
Selectivity, +200 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz 35 dB
Selectivity, ±200 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz 34 dB
Selectivity, -400 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz 40 dB
Selectivity, +400 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz 40 dB
Selectivity, ±400 kHz, 50 kbps, ±25 kHz
deviation, 2-GFSK, 918.2 MHz 40 dB
Sensitivity 100 kbps, ±25 kHz deviation, 2-GFSK, 866.6 MHz, 135 kHz RX
BW, 10% PER, 250 byte payload -102 dBm
Sensitivity 100 kbps, ±25 kHz deviation, 2-GFSK, 918.2 MHz, 135 kHz RX
BW, 10% PER, 250 byte payload -101 dBm
Selectivity, -200 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz
100 kbps, ±25 kHz deviation, 2-GFSK, 135 kHz RX Bandwidth,
866.6 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
37 dB
Selectivity, +200 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz 38 dB
Selectivity, ±200 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz 37 dB
Selectivity, -400 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz 45 dB
Selectivity, +400 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz 45 dB
Selectivity, ±400 kHz, 100 kbps, ±25 kHz
deviation, 2-GFSK, 866.6 MHz 45 dB
Sensitivity 100 kbps, ±50 kHz deviation, 2-GFSK, 920.9 MHz, 196 kHz RX
BW, 10% PER, 250 byte payload -100 dBm
Selectivity, -400 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz
100 kbps, ±50 kHz deviation, 2-GFSK, 196 kHz RX Bandwidth,
920.9 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
40 dB
Selectivity, +400 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz 40 dB
Selectivity, ±400 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz 40 dB
Selectivity, -800 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz 46 dB
Selectivity, +800 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz 52 dB
Selectivity, ±800 kHz, 100 kbps, ±50 kHz
deviation, 2-GFSK, 920.9 MHz 48 dB
Sensitivity 150 kbps, ±37.5 kHz deviation, 2-GFSK, 918.4 MHz, 273 kHz RX
BW, 10% PER, 250 byte payload -96 dBm
Selectivity, -400 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 918.4 MHz
150 kbps, ±37.5 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth,
918.4 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
41 dB
Selectivity, +400 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 918.4 MHz 42 dB
Selectivity, -800 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 918.4 MHz 46 dB
Selectivity, +800 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 918.4 MHz 49 dB
Sensitivity -96 dBm
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When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high
power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Selectivity, -400 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz
150 kbps, ±37.5 kHz deviation, 2-GFSK, 273 kHz RX Bandwidth,
920.9 MHz, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
40 dB
Selectivity, +400 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz 42 dB
Selectivity, ±400 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz 40 dB
Selectivity, -800 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz 46 dB
Selectivity, +800 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz 49 dB
Selectivity, ±800 kHz, 150 kbps, ±37.5 kHz
deviation, 2-GFSK, 920.9 MHz 46 dB
Sensitivity 200 kbps, ±50 kHz deviation, 2-GFSK, 918.4 MHz, 273 kHz RX
BW, 10% PER, 250 byte payload -97 dBm
Selectivity, -400 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz
200 kbps, ±50 kHz deviation, 2-GFSK, 273 kHz RX
Bandwidth, 918.4 MHz, 10% PER, 250 byte payload. Wanted
signal 3 dB above sensitivity level
40 dB
Selectivity, +400 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz 43 dB
Selectivity, ±400 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz 41 dB
Selectivity, -800 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz 46 dB
Selectivity, +800 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz 50 dB
Selectivity, ±800 kHz, 200 kbps, ±50 kHz
deviation, 2-GFSK, 918.4 MHz 48 dB
Sensitivity 200 kbps, ±100 kHz deviation, 2-GFSK, 920.8 MHz, 273 kHz RX
BW, 10% PER, 250 byte payload -96 dBm
Selectivity, -600 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz
200 kbps, ±100 kHz deviation, 2-GFSK, 273 kHz RX
Bandwidth, 920.8 MHz,, 10% PER, 250 byte payload. Wanted
signal 3 dB above sensitivity level
43 dB
Selectivity, +600 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz 47 dB
Selectivity, ±600 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz 44 dB
Selectivity, -1200 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz 51 dB
Selectivity, +1200 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz 54 dB
Selectivity, ±1200 kHz, 200 kbps, ±100 kHz
deviation, 2-GFSK, 920.8 MHz 51 dB
Sensitivity 300 kbps, ±75 kHz deviation, 2-GFSK, 917.6 MHz, 576 kHz RX
BW, 10% PER, 250 byte payload -94 dBm
Selectivity, -600 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 917.6 MHz
300 kbps, ±75 kHz deviation, 2-GFSK, 576 kHz RX Bandwidth,
917.6 MHz,, 10% PER, 250 byte payload. Wanted signal 3 dB
above sensitivity level
27 dB
Selectivity, +600 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 917.6 MHz 45 dB
Selectivity, ±600 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 917.6 MHz 35 dB
Selectivity, -1200 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 917.6 MHz 46 dB
Selectivity, +1200 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 920.8 MHz 50 dB
Selectivity, ±1200 kHz, 300 kbps, ±75 kHz
deviation, 2-GFSK, 917.6 MHz 48 dB
WB-DSSS, 240/120/60/30 kbps (480 ksym/s, 2-GFSK, ±195 kHz Deviation, FEC (Half Rate), DSSS = 1/2/4/8, 622 kHz RX BW)
Sensitivity 240 kbps, DSSS = 1, BER = 10–2, 915 MHz -101 dBm
Sensitivity 120 kbps, DSSS = 2, BER = 10–2, 915 MHz -103 dBm
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When measured on the CC1312PSIP-EM reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled and high
power PA connected to VDDS unless otherwise noted.
All measurements are performed at the antenna input. All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Sensitivity 60 kbps, DSSS = 4, BER = 10–2, 915 MHz -105 dBm
Sensitivity 30 kbps, DSSS = 8, BER = 10–2, 915 MHz -106 dBm
Blocking ±1 MHz 240 kbps, DSSS = 1, BER = 10–2, 915 MHz 49 dB
Blocking ±2 MHz 240 kbps, DSSS = 1, BER = 10–2, 915 MHz 53 dB
Blocking ±5 MHz 240 kbps, DSSS = 1, BER = 10–2, 915 MHz 58 dB
Blocking ±10 MHz 240 kbps, DSSS = 1, BER = 10–2, 915 MHz 67 dB
(1) Wanted signal 3 dB above the reference sensitivity limit according to ETSI EN 300 220 v. 3.1.1
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