Texas Instruments DAC7731 User manual

DAC7731 Evaluation Module
March 2003 DAP EVMs
User’s Guide
SLAU099

IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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Use of such information may require a license from a third party under the patents or other intellectual property
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Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated

EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Should this evaluation kit not meet the specifications indicated in the EVM User’s Guide, the kit may be returned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction
of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumesno liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’s Guide prior to handling the product. This notice contains important safety information about temperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage ranges specified in the EVM user’s
guide. The DC power supply for the digital section should not exceed +5 V. The DC power
supply for the analog section should not exceed +15 V to –15V. If used, the external reference
voltage input should not exceed 10 V.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than
60°C. The EVM is designed to operate properly with certain components above 60°C as long
as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated

Information About Cautions and Warnings
iii
Preface
Read This First
About This Manual
This user’s guide describes the characteristics, operation, and use of the
DAC7731 evaluation module. It covers all pertinent areas involved in properly
using this EVM board along with the devices that it supports. The physical PCB
layout, schematic diagram, and circuit descriptions are included.
How to Use This Manual
This document contains the following chapters:
Chapter 1—EVM Overview
Chapter 2—PCB Design and Performance
Chapter 3—EVM Operation
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.

Trademarks
iv
Related Documentation From Texas Instruments
To obtain a copy of any of the following TI documents, call the Texas
Instruments Literature Response Center at [phone] or the Product
Information Center (PIC) at [phone]. When ordering, identify this
manual by its title and literature number. Updated documents can also be
obtained through our website at www.ti.com.
Data Sheets: Literature Number:
DAC7731 SBAS249
REF102 SBCS022
OPA627 SBOS165
Questions about this or other Data Converter EVM’s?
If you have questions about this or other Texas Instruments Data Converter
evaluation modules, please feel free to e-mail the Data Converter Application
Team at dataconvap[email protected].Include in the subject heading the
product you have questions or concerns with.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
The TI Logo is a trademark of Texas Instruments.
SPI and QSPI are trademarks of Motorola, Inc.

Contents
v
Contents
1 EVM Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.1 Supply Voltage 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2 Reference Voltage 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 EVM Basic Functions 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 PCB Design and Performance 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 EVM Performance 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Bill of Materials 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 EVM Operation 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Factory Default Settings 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Host Processor Operation 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1 Unity Gain Output 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.2 Output Gain of Two 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.3 Capacitive Load Drive 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Jumper Setting 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Schematic 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
vi
Figures
1-1 EVM Block Diagram 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-1 Top Silkscreen 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-2 Layer 1 (Top Signal Plane) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-3 Layer 2 (Ground Plane) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-4 Layer 3 (Power Plane) 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-5 Layer 4 (Bottom Signal Plane) 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-6 Bottom Silkscreen 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-7 Drill Drawing 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-8 DAC7731EVM Test Parameters 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-9 INL and DNL Characterization Graphs 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
2-1 Parts Lists 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-1 Factory Default Jumper Setting 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-2 Unity Gain Output Jumper Settings 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-3 Gain of Two Output Jumper Settings 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-4 Capacitive Load Drive Output Jumper Settings 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-5 Jumper Setting Functions 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
EVM Overview
EVM Overview
This chapter gives a general overview of the DAC7731 evaluation module
(EVM) and describes some of the factors that must be considered when using
the module.
Topic Page
1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Power Requirements 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 EVM Basic Functions 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

Features
1-2
1.1 Features
This EVM features the DAC7731 digital-to-analog converter. The
DAC7731EVM is a simple evaluation module designed for a quick and easy
way to evaluate the functionality and performance of the high resolution,
single-channel, and serial input DAC. This EVM features a serial interface to
communicate with any host microprocessor or TI DSP (with SPI capability)
base system.
1.2 Power Requirements
The following sections describe the power requirements of the EVM.
1.2.1 Supply Voltage
The dc power-supply requirement for the digital section of the EVM is typically
5 V connected to the J3-1 or via J6-10 terminal (when plugged in with another
EVM board or interface card) and is referenced to ground through the J3-2
and J6-5 terminal. The dc power-supply requirement for the analog section
(VCC and VSS) of this EVM range is from 15.75 V to -15.75 V maximum. The
analog section connects through J1-3 and J1-1 respectively, or through J6-1
and J6-2 terminals and are referenced to analog ground through J1-2 and
J6-6 terminals.
The VCC supply source is also used to provide the positive rail of the external
output op amp while the negative rail can be selected between VSS and AGND
via the W5 jumper. The external op amp is installed as an option to provide
output signal conditioning or boost capacitive load drive and for other output
mode requirements.
To avoid potential damage to the EVM board, make sure that the
correct cables are connected to their respective terminals as
labeled on the EVM board.
Stresses above the maximum listed voltage ratings may cause
permanent damage to the device.
1.2.2 Reference Voltage
Although the DAC7731 has a built-in 10-V reference, an external reference
circuit is provided in the EVM board. The external reference circuit can be
isolated if the internal reference voltage is selected.
The 10-V precision voltage reference is provided to supply the external voltage
reference for the DAC through REF102, U3, via jumper W4 by shorting
pins 1 and 2. An adjustable 100-kΩpotentiometer, R11, is installed in series
with 20 kΩ, R10, to allow the user to adjust the reference voltage to its desired
settings. TP1 and TP2 are also provided, as well as J4-20, to allow the user
to connect other external reference source if the onboard reference circuit is
not desired. The external voltage reference must not exceed 10 V dc.

EVM Basic Functions
1-3
EVM Overview
The REF102 precision reference is powered by VCC (15 V) supply through
J1-3 or J6-1 terminal.
The DAC7731 has a REFEN_ pin to enable the internal reference circuit or to
disable it and select an external reference source. The REFEN_ pin can be
hardware-driven through W2 jumper. Likewise, it can also be software-driven
through J2-19 terminal via W2 jumper by shorting pins 1 and 2. The REFOUT
pin of the DAC7731 must be connected to the REFIN pin to use the internal
voltage reference. This can be done through W3 jumper by shorting pins 1 and
2. Shorting pins 2 and 3 of W3 selects the external voltage reference source.
The on-chip reference buffer output is channeled out through VREF pin, which
is used to set up the DAC7731 output amplifier into one of three voltage output
modes (refer to the data sheet). VREF can also be used to drive other system
components that require external voltage reference.
When applying an external voltage reference through TP1 or J4-20,
make sure that it does not exceed 10 V maximum. Otherwise, this
can permanently damage the DAC7731, U1, device under test.
1.3 EVM Basic Functions
The DAC7731 EVM is designed primarily as a functional evaluation platform
to test certain functional characteristics of the DAC7731 digital-to-analog
converter. Functional evaluation of the DAC device can be accomplished with
the use of any microprocessor, TI DSP (with SPI capability), or some sort of
a waveform generator.
The headers J2 and P2 are the connectors provided which allow control
signals and data required to interface a host processor or a waveform
generator using a customized cable.
A specific adapter interface card is also available for most of TI’s DSP starter
kits (DSK) and the card model depends on the type of the TI DSP starter kit
used. Specify the DSP with which you are interfacing to ensure acquiring the
right adapter interface card. In addition, an MSP430 microprocessor-based
motherboard platform is available for connection and interface with this EVM,
provided a 5-V level shifter is used for stable operation. The 5-V level shifter
is also available upon request. For more details or information regarding the
adapters mentioned above or the MSP430 motherboard platform, call or email
Texas Instruments. Use email address dataco[email protected] for fast
response.
The output of the DAC can be monitored via W13. The 6-pin header, W13,
provides different options of the DAC output, but requires the output op amp,
U2, to be configured correctly first for the desired waveform characteristic.
Because of the headroom issue with the op amp, the reference voltage must
be adjusted to prevent the output from clipping. If the internal reference voltage

EVM Basic Functions
1-4
of the DAC is used, then the output op amp can only be configured for unity
gain. Shorting pins 1 and 2 of W13 allows the user to monitor the raw output
of the DAC7731. The J4 header is also used to monitor the output signal
through the external op amp for cascading or daisy-chaining up to three
DAC7731 EVMs. This can be done by properly configuring the W13 header
to route the DAC output of each respective EVM so that the output signal does
not stack up on top of the other. Of course it is also possible to stack more than
three EVMs as long as the W13 is left open and the output signal is monitored
through this same header in each respective EVM.
A block diagram of the EVM is shown in Figure 1-1.
Figure 1-1.EVM Block Diagram
DAC Module
(J4)
Output
Buffer
Module
VCC
VSS VCC
+REFIN
Ext. Ref
Input
VCC
GND
GND
VDD
DAC Out
W13
W3
(J1)
(J3)
(J6)
External
Reference
Module
VDD
(J2)
(P2)
REFEN
RSTSEL
CS
SCLK
RST
LDAC
TP2
W4
TP1
VSS
REFin REFout
VSS
SDI

2-1
PCB Design and Performance
PCB Design and Performance
The layout design of the PCB, describing the physical and mechanical
characteristics of the EVM, is presented in this chapter. This section also
shows the resulting performance of the EVM, which can be compared to the
device specification listed in the data sheet. The list of components used on
the module is also included in this section.
Topic Page
2.1 PCB Layout 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 EVM Performance 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Bill of Materials 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

PCB Layout
2-2
2.1 PCB Layout
The DAC7731 EVM is designed to preserve the performance quality of the
DAC under test, as specified in the data sheet. Carefully analyzing the EVM
physical restrictions and knowing the elements that contribute to the EVM
performance degradation are keys to a successful design implementation.
These obvious EVM performance degraders can be alleviated during the
schematic design phase by properly selecting the right components and
building the circuit correctly. The circuit should include adequate bypassing,
identifying and managing the analog and digital signals, and knowing and
understanding the components mechanical attributes.
The obscure part of the design is the layout process, where lack of knowledge
and inexperience can present a problem. The main concern here is primarily
with the placement of components and the proper routing of signals. The
bypass capacitors should be placed as close as possible to the pins and the
analog and digital signals must be properly separated from each other. The
power and ground plane is very important and are carefully considered in the
layout process. A solid plane is ideally preferred but sometimes impractical,
so when solid planes are not possible, a split plane does the job as well. When
considering a split-plane design, analyze the component placement and
carefully split the board into its analog and digital sections, starting from the
device under test. The ground plane plays an important role in controlling the
noise and other effects that otherwise contribute to the error of the DAC output.
To ensure that the return currents are handled properly, route the appropriate
signals only in their respective sections—meaning the analog traces should
only lay directly above or below the analog section and the digital traces in the
digital section. Minimize the length of the traces, but maximize trace widths
where possible in the design. This can be seen in the layout figures presented
on the following pages.
The DAC7731 EVM board is constructed on a four-layer printed-circuit board
using a copper-clad FR-4 laminate material. The printed-circuit board has a
dimension of 42,8625 mm (1.6875 inch) ×80,9625 mm (3.1875 inch), and the
board thickness is 1,57 mm (0.062 inch). Figure 2-1 through Figure 2-5 show
the individual artwork layers.

PCB Layout
2-3
PCB Design and Performance
Figure 2-1.Top Silkscreen
Figure 2-2.Layer 1 (Top Signal Plane)
Figure 2-3.Layer 2 (Ground Plane)

PCB Layout
2-4
Figure 2-4.Layer 3 (Power Plane)
Figure 2-5.Layer 4 (Bottom Signal Plane)
Figure 2-6.Bottom Silkscreen

PCB Layout
2-5
PCB Design and Performance
Figure 2-7.Drill Drawing
Notes: 1) PWB to be fabricated to meet or exceed IPC-6012, Class 3 standards and workmanship shall conform to IPC-A-600,
Class 3—Current revisions
2) Board material and construction to be UL approved and marked on the finished board.
3) Laminate material: Copper-clad FR-4
4) Copper weight: 1 oz. finished
5) Finished thickness: 0.062 ±0.010
6) MIN plating thickness in through holes 0.001”
7) SMCBC/HASL
8) LPI soldermask both sides using appropriate layer artwork: color = green
9) LPI silkscreen as required: color = white
10)Vender information to be incorporated on back side whenever possible
11)Minimum copper conductor width is 10 mils; minimum conductor spacing is 8 mils
12)Number of finished layers: 4

EVM Performance
2-6
2.2 EVM Performance
The EVM performance test is conducted using a high-density DAC bench test
board, an Agilent 3458A digital multimeter, and a PC running the LABVIEW
software. The EVM board is tested for all codes of 65535 and the device under
test (DUT) is allowed to settle for 1ms before the meter is read. This process
is repeated for all codes to generate the INL and DNL results and is shown in
Figure 2-9.
The parameters and results of the DAC7731 EVM characterization test can be
seen in Figure 2-8 and Figure 2-9.
Figure 2-8.DAC7731EVM Test Parameters

EVM Performance
2-7
PCB Design and Performance
Figure 2-9.INL and DNL Characterization Graphs

Bill of Materials
2-8
2.3 Bill of Materials
Table 2-1.Parts Lists
Item # Qty Designator Manufacturer Part Number Description
1 1 C8 Panasonic ECUV1H105JCH 1 µF, 1206 Multilayer ceramic
capacitor
2 2 C9 C10 Panasonic ECUV1H103KBM Ceramic capacitor
3 5 C1 C2 C3 C7 C13 Panasonic ECJ3VB1C104K Ceramic capacitor
4 1 C12 Panasonic ECUV1H102JCH Ceramic capacitor
5 5 C4 C5 C6 C11
C14 Kemet C1210C106K8PAC 10 µF, 1210 Multilayer ceramic X5R capacitor
6 1 R8 Panasonic ERJ-8GEY0R00V 0 Ω, 1/4W 1206 chip resistor
7 2 R7 R10 Panasonic ERJ-8ENF2002V Chip resistor
8 5 R4 R5 R6 R12
R13 Panasonic ERJ-8ENF1002V Chip resistor
9 2 R1 R2 Bourns 3214W-103E 10 kΩ, Bourns_32X4W series 5T
Pot
10 1 R11 Bourns 3214W-104E 100 kΩ, Bourns_32X4W series
5T Pot
11 1R3 Panasonic ERJ-8GEYJ104V Chip resistor
12 1 J6 Samtec TSM-105-01-T-DV 5X2X0.1
10-pin 3A isolated power socket
13 2 J2 J4 Samtec TSM-110-01-S-DV-M 10X2X.1, 20 Pin .025”sq SMT
socket
14 2 J1 J3 On-Shore
Technology ED555/3DS 3-Pin terminal connector
15 1 U1 Texas Instruments DAC7731 16-bit, voltage output, serial input
DAC, SSOP-24
16 1 U2 Texas Instruments OPA627AU 8-SOP(D) precision op amp
17 1 U3 Texas Instruments REF102AU +10 V , 8-SOP(D) precision
voltage reference
18 4 TP1 TP2 TP3
TP4 Mill-max 2348-2-01-00-00-07-0 Turret terminal test point
19 1 W13 Samtec TSW-103-07-L-D 3X2X0.1, 6-Pin IDC header
20 2 P2 P4 (see Note) Samtec SSW-110-22-S-D-VS-P 20 pin 0.025”sq SMT terminal
strips
21 1 P6 (see Note) Samtec SSW-105-F-D-VS-K 3A Isolated 10-pin power header
22 11 W6 W7 W8 W9
W10 W14 W15
W16 W17 W18
W19
Molex 22-03-2021 2 Position jumper_ 0.1”spacing
23 5 W1 W2 W3 W4
W5 Molex 22-03-2031 3 Position jumper_ 0.1”spacing
24 1 R9 Bourns 3214W-203E 20 kΩ, Bourns_32X4W series 5T
Pot
Note: P2, P4 & P6 parts are not shown in the schematic diagram. All the P designated parts are installed in the bottom side of the
PC Board opposite the J designated counterpart. Example, J2 is installed on the topside while P2 is installed in the bottom
side opposite of J2.