Texas Instruments PGA112 User manual

User's GuideSBOU073 – February 2009
PGA112 Evaluation Module
This user’s guide describes the characteristics, operation, and use of the PGA112 evaluation module(EVM). It covers all pertinent areas involved to properly use this EVM board. The document includes thephysical printed circuit board layout, schematic diagrams, and circuit descriptions.
Contents1 Overview ...................................................................................................................... 22 System Setup ................................................................................................................ 43 PGA112EVM Hardware Setup ............................................................................................. 94 PGA112 Software Overview .............................................................................................. 165 Bill of Materials ............................................................................................................. 23
List of Figures
1 Hardware Included with the PGA112EVM ................................................................................ 32 PGA112EVM Hardware Setup ............................................................................................. 43 PGA112_Test_Board Block Diagram ..................................................................................... 54 PGA112_Test_Board Schematic .......................................................................................... 65 USB_DAQ_Platform Block Diagram ...................................................................................... 96 Typical Hardware Connections ........................................................................................... 107 Connecting the Two EVM PCBs ......................................................................................... 118 Connecting Power to the EVM ........................................................................................... 129 Connecting the USB Cable ............................................................................................... 1310 PGA112EVM Default Jumper Settings .................................................................................. 1411 PGA112EVM Software—Functioning Properly ......................................................................... 1612 PGA112EVM Software—No Communication With the USB DAQ Platform ........................................ 1713 Scaled Inputs to PGA112/113 ............................................................................................ 1814 Selection of Internal Reference or DAC Reference .................................................................... 1815 PGA112/113 Bit Read Tables ............................................................................................ 1916 PGA112 Measurement Module Tab ..................................................................................... 2017 PGA112/113 Self-Test Function .......................................................................................... 22
List of Tables
1 Signal Definition of J1 (25-Pin Male DSUB) on PGA112_Test_Board ............................................... 72 Signal Definition of J2 (25-Pin Female DSUB) on PGA112_Test_Board ............................................ 83 PGA112_Test_Board Jumper Functions ................................................................................ 154 USB DAQ Platform Jumper Settings .................................................................................... 155 PGA112_Test_Board Parts List .......................................................................................... 23
Microsoft, Windows are registered trademarks of Microsoft Corporation.SPI is a trademark of Motorola Inc.I
2
C is a trademark of NXP Semiconductors.All other trademarks are the property of their respective owners.
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1 Overview
1.1 PGA112EVM Hardware
1.2 Related Documentation from Texas Instruments
1.3 If You Need Assistance
Overview www.ti.com
This document provides the information needed to set up and operate the PGA112EVM evaluationmodule, a test platform for the PGA112 and PGA113 programmable gain amplifiers . For a more detaileddescription of the PGA112 family, please refer to the product data sheet (SBOS424 ) available from theTexas Instruments web site at http://www.ti.com . Additional support documents are listed in the section ofthis guide entitled Related Documentation from Texas Instruments .
The PGA112EVM is an evaluation module that is used to fully evaluate the PGA112 and PGA113programmable gain amplifiers. The PGA112EVM consists of two printed circuit boards (PCBs). One board(the USB DAQ Platform) generates the digital signals required to communicate with the PGA112, which ispart of the second board (PGA112_Test_Board), as well as support and configuration circuitry.
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous withthe PGA112EVM.
Figure 1 shows the hardware included with the PGA112EVM kit. Contact the factory if any component ismissing. It is highly recommended that you check the TI web site at http://www.ti.com to verify that youhave the latest software. It is also recommended that you watch the QuickStart Video (included on thecompact disk) before using the PGA112EVM.
The complete kit includes the following items:•PGA112 test PCB•USB DAQ platform PCB•USB cable•CD-ROM containing this user's guide, product software, and a demonstration video
The following document provides information regarding Texas Instruments integrated circuits used in theassembly of the PGA112EVM. This user's guide is available from the TI web site under literature numberSBOU073 . Any letter appended to the literature number corresponds to the document revision that iscurrent at the time of the writing of this document. Newer revisions may be available from the TI web siteat http://www.ti.com/ , or call the Texas Instruments Literature Response Center at [phone] or theProduct Information Center at [phone]. When ordering, identify the document by both title andliterature number.
Document Literature Number
PGA112 Product Data Sheet SBOS424USB DAQ Platform Users Guide SBOU056OPA333 Product Data Sheet SBOS351ADS1100 Product Data Sheet SBAS239
If you have questions about the PGA112 evaluation module, send an e-mail to the Linear ApplicationTeam at [email protected] . Include PGA112EVM as the subject heading.
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www.ti.com Overview
Figure 1. Hardware Included with the PGA112EVM
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1.4 Information About Cautions and Warnings
2 System Setup
USB DAQ
Platform
PGA112/113
Test Board
EVM
Power
Optional External DC and AC
source connection
AC DC
Optional DVM or
Oscilloscope
connection
System Setup www.ti.com
This document contains caution statements.
CAUTION
This is an example of a caution statement. A caution statement describes asituation that could potentially damage your software or equipment.
The information in a caution or a warning is provided for your protection. Please read each cautioncarefully.
Figure 2 shows the system setup for the PGA112EVM. The PC runs software that communicates with theUSB DAQ Platform. The USB DAQ Platform generates the analog and digital signals used tocommunicate with the PGA112_Test_Board. Connectors on the PGA112_Test_Board allow the user toconnect the system power, precise analog inputs, and digital controls that select these analog inputs.
Figure 2. PGA112EVM Hardware Setup
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2.1 Theory of Operation for PGA112_Test_Board Hardware
PGA112/
PGA113
V Supply
Switched 5.0V Power
DUT
·
·
·
General-Purpose Digital I/O
SPI Communication
MUX Logic Control
·
·
Analog DAC settings
for the inputs
Analog-to-digital
inputs for precision
measurements
Connection to
Optional External
Source
25-Pin
Male DSUB Signals
From USB DAQ Platform
25-Pin
Female DSUB Signals
From USB DAQ Platform
Optional
External SPI
Address
Jumpers
www.ti.com System Setup
Figure 3 presents a block diagram of the PGA112_Test_Board. The functionality of this PCB is relativelysimple. It provides connections to the I
2
C™ and general-purpose input/outputs (GPIO) on the USB DAQPlatform board. It also provides connection points for external connections of the shunt voltage, busvoltage, and GND.
Figure 3. PGA112_Test_Board Block Diagram
See Figure 4 for an illustration of the PGA112_Test_Board schematic. The J1 connector ports theanalog-to-digital converters (ADCs), digital-to analog converters (DACs), and SPI™ control. The J2connector ports the control bits for the input and output switches.
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System Setup www.ti.com
Figure 4. PGA112_Test_Board Schematic
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2.2 Signal Definitions of J1 (25-Pin Male DSUB)
www.ti.com System Setup
Table 1 lists the different signals connected to J1 on the PGA112_Test_Board. This table also identifiessignals connected to pins on J1 that are not used on the GA112_Test_Board.
Table 1. Signal Definition of J1 (25-Pin Male DSUB) on PGA112_Test_Board
J1 Pin Signal Used On This EVM? PGA112 Pin
1 DAC A Yes DAC12 DAC B Yes DAC23 DAC C Yes DAC34 DAC D Yes V
REF
_DAC5 ADS1+ Yes ADS1+6 ADS1– Yes ADS1–7 ADS2+ Yes ADS2+8 ADS2– Yes ADS2–9 I2C_SCK No —10 I2C_SDA2 No —11 ONE_WIRE No —12 I2C_SCK_ISO No —13 I2C_SDA_ISO No —14 XTR_LOOP+ No —15 XTR_LOOP– No —16 INA– No —17 V
DUT
Yes V
DUT
18 V
CC
No V
CC
19 +15V No —20 –15V No —21 GND Yes GND22 SPI_SCK Yes SPI_SCK23 SPI_CS1 Yes SPI_CS124 SPI_DOUT Yes SPI_DOUT25 SPI_DIN1 Yes SPI_DIN1
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2.3 Signal Definition of J2 (25-Pin Female DSUB)
System Setup www.ti.com
Table 2 summarizes the different signals connected to J2 on the PGA112_Test_Board. This table alsoidentifies signals connected to pins on J2 that are not used on the PGA112_Test_Board.
Table 2. Signal Definition of J2 (25-Pin Female DSUB) on PGA112_Test_Board
J2 Pin Signal Used On This EVM? PGA112 Pin
1 NC No —2 CTRL1 Yes CTRL13 CTRL2 Yes CTRL24 CTRL3 Yes CTRL35 CTRL4 Yes CTRL46 CTRL5 Yes CTRL57 CTRL6 Yes CTRL68 CTRL7 Yes CTRL79 CTRL8 Yes CTRL810 MEAS1 No —11 MEAS2 No —12 MEAS3 No —13 MEAS4 No —14 MEAS5 No —15 MEAS6 No —16 MEAS7 No —17 MEAS8 No —18 SPI_SCK Yes SPI_SCK19 SPI_CS2 Yes SPI_CS220 SPI_DOUT2 Yes SPI_DOUT221 SPI_DIN2 Yes SPI_DIN222 V
DUT
Yes V
DUT
23 V
CC
Yes V
CC
24 GND Yes GND25 GND Yes GND
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2.4 Theory of Operation For USB_DAQ_Platform
TUSB3210
8052 C
with USB Interface
and UART
m
USB Bus
From Computer
3.3V
Regulator
Adjustable
Regulator
V
(2.7V to 5.5V)
CC
VmC
3.3V
S
V_USB
5V
8Kx8 Byte
EEPROM
Buffers and
Latches
Power
Switching
V
(2.7V to 5.5V)
DUT
Switched Power
I C, SPI
Control Bits, and
Measure Bits
2
External
Power
Reset Button
and
Power-On Reset
USB DAQ
Platform
3 PGA112EVM Hardware Setup
3.1 Electrostatic Discharge Warning
www.ti.com PGA112EVM Hardware Setup
Figure 5 shows the block diagram for the USB DAQ Platform. This platform is a general-purpose dataacquisition system that is used on several different Texas Instruments evaluation modules. The details ofits operation are included in a separate document (available for download at www.ti.com). The blockdiagram shown in Figure 5 gives a brief overview of the platform. The primary control device on the USBDAQ Platform is the TUSB3210 .
Figure 5. USB_DAQ_Platform Block Diagram
The PGA112EVM hardware setup involves connecting the two PCBs of the EVM together, applyingpower, connecting the USB cable, and setting the jumpers. This section presents the details of thisprocedure.
Many of the components on the PGA112EVM are susceptible to damage by electrostatic discharge (ESD).Customers are advised to observe proper ESD handling precautions when unpacking and handling theEVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures may result in damage to EVMcomponents.
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3.2 Typical Hardware Connections
PGA112EVM Hardware Setup www.ti.com
The PGA112EVM hardware setup involves connecting the two PCBs of the EVM together, applyingpower, and connecting an external shunt and load. The external connections may be the real-worldsystem that the PGA112 will be incorporated into. Figure 6 shows the typical hardware connections.
Figure 6. Typical Hardware Connections
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3.3 Connecting the Hardware
www.ti.com PGA112EVM Hardware Setup
To connect the two PCBs of the PGA112EVM together, gently push on both sides of the D-SUBconnectors (as shown in Figure 7 ). Make sure that the two connectors are completely pushed together;that is, loose connections may cause intermittent operation.
Figure 7. Connecting the Two EVM PCBs
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3.4 Connecting Power
PGA112EVM Hardware Setup www.ti.com
After the two parts of the PGA112 EVM are connected, as shown in Figure 8 , connect the power to theEVM. Always connect power before connecting the USB cable. If you connect the USB cable beforeconnecting the power, the computer will attempt to communicate with an unpowered device that will not beable to respond.
Figure 8. Connecting Power to the EVM
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3.5 Connecting the USB Cable to the PGA112EVM
www.ti.com PGA112EVM Hardware Setup
Figure 9 shows the typical response to connecting the USB DAQ platform to a PC USB port for the firsttime. Note that the EVM must be powered on before connecting the USB cable. Typically, the computerwill respond with a Found New Hardware, USB Device pop-up. The pop-up typically changes to FoundNew Hardware, USB Human Interface Device. This pop-up indicates that the device is ready to be used.The USB DAQ platform uses the Human Interface Device Drivers that are part of the Microsoft
®
Windows
®operating system.
In some cases, the Windows Add Hardware Wizard will pop up. If this prompt occurs, allow the systemdevice manager to install the Human Interface Drivers by clicking Yes when requested to install drivers.
Figure 9. Connecting the USB Cable
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3.6 PGA112 Jumper Settings
PGA112EVM Hardware Setup www.ti.com
Figure 10 shows the default jumpers configuration for the PGA112EVM. In general, the jumper settings ofthe USB DAQ Platform will not need to be changed. You may want to change some of the jumpers on thePGA112_Test_Board to match your specific configuration. For instance, the PGA112/113 has an internalreference jumper, JP_112 that is connected to ground (by default). You may choose to connect thisjumper to the V
REF
_PGA pin; doing so will allow you to use higher gains because the voltage at the V
REFpin of the PGA112/113 will subtract from your input voltage. Also, you may want to debug your own SPIcommands. You can easily do this debugging by moving the DIO_112/113, CS_112/113, and SCK pinsfrom the default INT positions to the external position EXT. Likewise, you can evaluate the output eitherwith a BNC connector or a wire connector. You can also choose between the two output types with theJPO_112/113 jumpers.
Figure 10. PGA112EVM Default Jumper Settings
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www.ti.com PGA112EVM Hardware Setup
Table 3 explains the function of the jumpers on the PGA112_Test_Board.
Table 3. PGA112_Test_Board Jumper Functions
Jumper Default Purpose
Allows the user to select between an internal fixed 2.5VVin_Ref V
REF_DAC
reference (V
REF_INT
) and a variable DAC reference (V
REF_DAC
)for the OPA333 difference amplifier input.This jumper allows the user to select between an internal fixedJP_Ref V
REF_DAC
2.5V reference and a variable DAC reference (V
REF_DAC
) for thePGA112 or the PGA113.This jumper allows the user to reference the PGA112 orJP_112/JP_113 GND
PGA113 to ground or a variable voltage reference.JP0_112/JP0_113 112_Strip/113_Strip User-selectable output as BNC or wire strip.DIO_112/DIO_113 INT Internal or external select of data input and output for SPI.SCK INT Internal or external select of clock for SPI.CS_112/CS_113 INT Internal or external select of chip select for SPI.
Table 4 summarizes the function of the USB DAQ platform jumpers. For most applications, the defaultjumper position should be used. A separate document (SBOU056 ) gives details regarding the operationand design of the USB DAQ platform.
Table 4. USB DAQ Platform Jumper Settings
Jumper Default Purpose
This jumper selects external power or bus power. Externalpower is applied on J5 or T3 (9V dc). Bus power is 5V from theJUMP1 EXT
USB. External power is typically used because the USB power isnoisy.JUMP2 EXT Same as JUMP1.This jumper determines where the PGA112 gets its powersupply. In the V
DUT
position, the EVM provides power. TheJUMP3 EE ON
default setting is the V
DUT
position. In the V
S_EXT
position, thepower is connected externally.This jumper sets the address for the USB_DAQ board. The onlyJUMP4, JUMP5 L, L reason to change this jumper from the default setting is whenmultiple boards are being used.This jumper selects the voltage of the device under test supplyJUMP9 5V
(V
DUT
= 5V or 3V)JUMP10 WP ON This jumper write-protects the firmware EEPROM.JUMP11 WP ON This jumper write-protects the calibration EEPROMUses the regulator output to generate the V
DUT
supply. The USBJUMP13 Reg
can be used as the V
DUT
supply.JUMP14 9V Uses the external power (9V as opposed to the bus)While in the BUS position, V
DUT
operation is normal. While in theV
RAW
position the V
DUT
supply is connected to an externalJUMP17 BUS
source. This option allows for any value of V
DUT
between 3V and5V.
Connects the pull-up on GPIO to the V
DUT
supply or the V
CCJUMP18 Vdut
supply.
CAUTION
Adjusting the V
DUT
voltage beyond the 3V to 5V range will damage the EVM.
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4 PGA112 Software Overview
4.1 Operating Systems for PGA112 Software
4.2 PGA112EVM Software Install
4.3 Starting the PGA112EVM Software
PGA112 Software Overview www.ti.com
This section discusses how to install and use the PGA112 software.
The PGA112EVM software has been tested on the Microsoft Windows XP operating system (OS) withUnited States and European regional settings. The software should also function on other Windowsoperating systems. Please report any OS compatibility issues to [email protected] .
Follow these steps to install the PGA112EVM software:Step 1. Software can be downloaded from the PGA112EVM web page, or from the disk included withthe PGA112EVM, which contains a folder called Install_software/.Step 2. Find the file called setup.exe. Double-click the file to start the installation process.Step 3. Follow the on-screen prompts to install the software.Step 4. To remove the application, use the Windows Control Panel utility, Add/Remove Software.
The PGA112 software can be operated through the Windows Start menu. From Start, select All Programs;then select the PGA112EVM program. Figure 11 shows how the software should appear if the EVM isfunctioning properly.
Figure 11. PGA112EVM Software—Functioning Properly
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4.4 Using the PGA112 Software
www.ti.com PGA112 Software Overview
Figure 12 shows an error that pops up if the computer cannot communicate with the EVM. If you receivethis error, first check to see that the USB cable is properly connected. This error can also occur if youconnect the USB cable before the USB DAQ Platform 9V power. A second possible reason for thisproblem is that there may be a problem with your computer USB Human Interface Device Driver. Makesure that when you plug the in the USB cable, the computer recognizes the device. If the sound is on, youwill hear the distinctive sound that you expect when a USB device is properly connected to the PC.
Figure 12. PGA112EVM Software—No Communication With the USB DAQ Platform
The PGA112EVM software has four different tabs that allow you to access different features of thePGA112 or PGA113. The Scaled Inputs tab allows the user to select which input will be used to evaluatethe PGA112/113. The PGA112/113 tabs allow you to individually configure the gain and select thechannels to read at the output of either the PGA112 or PGA113. The Bit Read Tables tab shows (in red)which channels and gains are enabled.
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4.4.1 Scaled Inputs Tab
PGA112 Software Overview www.ti.com
Figure 13 illustrates the Scaled Inputs tab.
Figure 13. Scaled Inputs to PGA112/113
This tab has the following controls:•Diff Amp Input allows user to program a very small voltage input to the PGA112/113 device, so thathigher gains can be more easily evaluated•The Resistor Divider Input allows the user to create a unique input from an external source and theinternal 2.5V reference with a 0V to 5V output.•The External Input allows the user to input a sine wave or a precision external input.•The Reference Input field allows the user to read the actual value of the onboard 2.5V reference. Thedefault jumper connection for this onboard reference is to the internal V
REF_INT
; however, the referenceDAC that controls the output shift on the OPA333 operational amplifier may also be selected as thereference. When the internal 2.5V reference is selected, the reference input appears as shown inFigure 14 . If the user wants to change the reference jumper setting (JP_Ref) to V
REF_DAC
, chooseExternal on the reference input setting.
Figure 14. Selection of Internal Reference or DAC Reference
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4.4.2 PGA112/113 Read Tables Tab
www.ti.com PGA112 Software Overview
Figure 15 shows the Read Tables tab.
Figure 15. PGA112/113 Bit Read Tables
This tab has the following controls:•Show the selection of either the PGA112 or the PGA113•Indicate which SPI bits are enabled for the selected device with a '1'•Translation tables at the bottom of the window show the corresponding scope and binary gain
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4.4.3 PGA112/113 Measurement Module Tabs
PGA112 Software Overview www.ti.com
The PGA112 Measurement Module tab is shown in Figure 16 . (The PGA113 tab has the same features,but is used when the EVM is populated with a PGA113 device.)
Figure 16. PGA112 Measurement Module Tab
This tab has these controls:•Choose the input source with the Scaled Inputs radio buttons•Select the desired PGA112 (or PGA113) internal MUX channel•Select the internal binary or scope gain•Displays the values of the inputs that will be placed on each MUX channel•Select either a 3V or 5V supply, and cycle the power for the ADS1100 measurement ADC•Select the PGA112 (or PGA113) output, 2.5V reference, CH0 input, or CH1 input to be read using theADS1100
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