Texas Instruments ADS1298RECG-FE User manual

ADS1298RECG-FE
ECG Front-End Performance Demonstration Kit
User's Guide
Literature Number: SBAU181B
March 2011–Revised Janurary 2016

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Table of Contents
Contents
1 ADS1298R Overview............................................................................................................. 7
1.1 Important Disclaimer Information....................................................................................... 7
1.2 Introduction................................................................................................................ 8
1.3 Supported Features...................................................................................................... 8
1.4 Features Not Supported in Current Version .......................................................................... 9
1.5 ADS1298R Hardware.................................................................................................... 9
2 Quick Start ........................................................................................................................ 10
2.1 Default Jumper/Switch Configuration ................................................................................ 10
2.2 ADS1298RECG-FE Operation........................................................................................ 12
3 Using the ADS1298RECG-FE Software.................................................................................. 13
3.1 Application User Menu................................................................................................. 14
3.2 Top-Level Application Controls ....................................................................................... 14
3.3 About Tab................................................................................................................ 15
3.4 ADC Register Tab...................................................................................................... 16
3.5 Analysis Tab............................................................................................................. 24
3.6 Save Tab................................................................................................................. 33
4 ADS1298RECG-FE Input Signals .......................................................................................... 35
4.1 Input Short Testing ..................................................................................................... 35
4.2 Internal Test Signals Input ............................................................................................ 35
4.3 Temperature Sensor ................................................................................................... 36
4.4 Normal Electrode Input ................................................................................................ 37
4.5 MVDD Input, RLD Measurement, RLD Positive Electrode Driver, and RLD Negative Electrode Driver...... 37
4.6 Lead Derivation ......................................................................................................... 38
4.7 Wilson Center Terminal (WCT) ....................................................................................... 38
4.8 Right Leg Drive ......................................................................................................... 38
4.9 PACE Detection......................................................................................................... 39
5 Evaluation of the ADS1298R Respiration Function ................................................................. 41
5.1 Introduction.............................................................................................................. 41
5.2 Testing with Onboard Circuitry........................................................................................ 41
5.3 Testing with Patient Simulator ........................................................................................ 44
6 ADS1298R Daughter Card Hardware Details .......................................................................... 46
6.1 Jumper Description..................................................................................................... 46
6.2 Power Supply ........................................................................................................... 48
6.3 Clock ..................................................................................................................... 49
6.4 Reference................................................................................................................ 49
6.5 Analog Output Signals ................................................................................................. 49
6.6 Digital Signals........................................................................................................... 50
6.7 Analog Input Signals ................................................................................................... 50
Appendix A BOM, Layout, and Schematics.................................................................................... 52
A.1 ADS1298R Front-End Board Schematics.......................................................................... 52
A.2 Printed Circuit Board Layout......................................................................................... 53

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Contents
A.3 ECG Cable Details.................................................................................................... 53
A.4 Bill of Materials ........................................................................................................ 55
Appendix B External Optional Hardware ....................................................................................... 57
B.1 Optional External Hardware (Not Included)........................................................................ 57
B.2 ADS1298R Power-Supply Recommendations .................................................................... 59
Appendix C Software Installation ................................................................................................. 60
C.1 Minimum Requirements .............................................................................................. 60
C.2 Installing the Software ................................................................................................ 60
Revision History.......................................................................................................................... 61

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List of Figures
List of Figures
1 ADS1298R Kit................................................................................................................ 9
2 ADS1298RECG-FE Default Jumper Locations......................................................................... 10
3 Software Start Screen/About Tab........................................................................................ 13
4 User Menu - File Item...................................................................................................... 14
5 User Menu - Help Item .................................................................................................... 14
6 Top Level Controls......................................................................................................... 14
7 Lead-Off Status Registers Display Window............................................................................. 15
8 Channel Registers Tab.................................................................................................... 16
9 Internal Reference and Buffer Connections ............................................................................ 17
10 Lead-Off Excitation Options............................................................................................... 17
11 Input Multiplexer for a Single Channel .................................................................................. 18
12 LOFF and RLD Tab........................................................................................................ 19
13 LOFF_STATP and LOFF_STATN Comparators....................................................................... 20
14 GPIO and OTHER Register Tab ......................................................................................... 21
15 Wilson Central and Augmented Lead Routing Diagrams............................................................. 22
16 Device Registers Settings................................................................................................. 23
17 Scope Tool Features....................................................................................................... 24
18 Scope Analysis Tab (Noise Levels for Each Channel Shown)....................................................... 24
19 Zoom Tool Options......................................................................................................... 25
20 Histogram Bins for 12-Lead ECG Signal................................................................................ 26
21 Statistics for the Signal Amplitude of Eight ECG Channels .......................................................... 26
22 FFT Graph of Normal Electrode Configuration......................................................................... 27
23 AC Analysis Parameters: Windowing Options.......................................................................... 27
24 FFT Analysis: Input Short Condition..................................................................................... 28
25 Changing the User-Defined Dynamic Range for Channel 1.......................................................... 28
26 FFT Plot Using Zoom Tool................................................................................................ 29
27 ECG Display Tab Showing LEAD I-III and Augmented Leads....................................................... 31
28 ECG Signal Zoom Feature for Six Leads ............................................................................... 32
29 ECG Signal Zoom Feature for Lead 1................................................................................... 32
30 Save Tab .................................................................................................................... 34
31 Example of Internal Test Signals Viewed on the ECG Display Tab................................................. 35
32 Internal Temperature Sensor ............................................................................................. 36
33 Eight-Channel Read of Internal Temperature .......................................................................... 36
34 Normal Electrode ECG Connection in ECG Display Tab ............................................................. 37
35 Digitization of PACE Signal Using ADS1298R......................................................................... 40
36 Respiration Evaluation with Onboard Circuitry ......................................................................... 41
37 Channel 1 ΔImpedance Measurement ................................................................................. 42
38 Results After Low-Pass Filtering ......................................................................................... 42
39 Channel 1 Result for RB= 500Ωand ΔR = 1Ω.......................................................................... 45
40 Channel 1 Result for RB= 500Ωand ΔR = 0.1Ω........................................................................ 45
41 ADS1298R Front-End Block Diagram................................................................................... 46
42 Fluke Simulator Configuration ............................................................................................ 51
43 Top Component Placement............................................................................................... 53
44 Bottom Component Placement and Routing ........................................................................... 53
45 Internal Ground Plane (Layer 2).......................................................................................... 53
46 Internal Power Plane (Layer 3)........................................................................................... 53
47 ECG Cable Schematic..................................................................................................... 54

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List of Figures
48 15-Pin, Shielded Connector from Biometric Cables ................................................................... 57
49 15-Pin, Twisted Wire Cable to Banana Jacks.......................................................................... 57
50 15-Pin, Twisted Wire Cable............................................................................................... 57
51 Cardiosim ECG Simulator Tool........................................................................................... 58
52 Recommended Power Supply for ADS1298R.......................................................................... 59
53 Initialization of ADS1298R ................................................................................................ 60
54 License Agreement ........................................................................................................ 60
55 Installation Process ........................................................................................................ 61
56 Completion of ADS1298R Software Installation........................................................................ 61

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List of Tables
List of Tables
1 ADS1298RECG-FE Default Jumper/Switch Configuration ........................................................... 11
2 ADS1298R Lead Measurements......................................................................................... 38
3 Derived Lead Calculations ................................................................................................ 38
4 RLD Jumper Options ...................................................................................................... 39
5 ADS1298RECG-FE Default Jumper/Switch Configuration ........................................................... 46
6 Power-Supply Test Points................................................................................................. 48
7 Analog Supply Configurations (AVDD/AVSS).......................................................................... 48
8 Digital Supply Configurations (DVDD/DGND) .......................................................................... 49
9 CLK Jumper Options....................................................................................................... 49
10 External Reference Jumper Options..................................................................................... 49
11 Test Signals................................................................................................................. 50
12 Serial Interface Pinout ..................................................................................................... 50
13 Bill of Materials: ADS1298R ............................................................................................. 55

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ADS1298R
Pentium III, Celeron are registered trademarks of Intel Corporation.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola Inc.
All other trademarks are the property of their respective owners.
User's Guide
SBAU181B–March 2011–Revised Janurary 2016
ADS1298R
This user's guide describes the characteristics, operation, and use of the ADS1298R. This EVM is an
evaluation module for the ADS1298R device, an eight-channel, 24-bit, low-power, integrated analog front-
end (AFE) designed for patient monitoring and portable and high-end electrocardiogram (ECG) and
electroencephalogram (EEG) applications. The ADS1298R is intended for prototyping and evaluation. This
user's guide includes a complete circuit description, schematic diagram, and bill of materials.
The following related documents are available through the Texas Instruments web site at www.ti.com.
Device Literature Number
ADS1298R, ADS1296R,
ADS1294R SBAS495
1 ADS1298R Overview
1.1 Important Disclaimer Information
CAUTION
NOTICE: The ADS1298R is intended for feasibility and evaluation testing only
in laboratory and development environments. This product is not for diagnostic
use. This product is not for use with a defibrillator.
The ADS1298R is to be used only under these conditions:
• The ADS1298R is intended only for electrical evaluation of the features of the ADS1298R device in a
laboratory, simulation, or development environment.
• The ADS1298R is not intended for direct interface with a patient, patient diagnostics, or with a
defibrillator.
• The ADS1298R is intended for development purposes ONLY. It is not intended to be used as all or
part of an end equipment application.
• The ADS1298R should be used only by qualified engineers and technicians who are familiar with the
risks associated with handling electrical and mechanical components, systems, and subsystems.
• You are responsible for the safety of yourself, your fellow employees and contractors, and your co-
workers when using or handling the ADS1298R. Furthermore, you are fully responsible for the contact
interface between the human body and electronics; consequently, you are responsible for preventing
electrical hazards such as shock, electrostatic discharge, and electrical overstress of electric circuit
components.

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1.2 Introduction
The ADS1298R is intended for evaluating the ADS1298R low-power, 24-bit, simultaneously sampling,
eight-channel front-end for ECG and EEG applications. The digital SPI™ control interface is provided by
the MMB0 Modular EVM motherboard (Rev. C or higher) that connects to the ADS1298R ECG FE
evaluation board (Rev. A). The ADS1298R is NOT a reference design for ECG and EEG applications;
rather, its purpose is to expedite evaluation and system development. The output of the ADS1298R yields
a raw, unfiltered ECG signal.
The MMB0 motherboard allows the ADS1298R to be connected to the computer via an available USB
port. This manual shows how to use the MMB0 as part of the ADS1298R, but does not provide technical
details about the MMB0 itself.
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with
the ADS1298RECG-FE.
1.3 Supported Features
Hardware Features:
• Configurable for bipolar or unipolar supply operation
• Configurable for internal and external clock and reference via jumper settings
• Configurable for AC- or DC-coupled inputs
• Configurable for up to 12 standard ECG leads
• External Right Leg Drive (RLD) Reference (VCC – VEE)/2
• External shield drive amplifier
• External Wilson central voltage
• Easy connectivity to popular ECG simulators
• On-board respiration circuitry for Impedance Pneumography evaluation
Software Features:
• Designed to display 12 lead ECG data
• Analysis tools including a virtual oscilloscope, histogram, FFT, and ECG display
• File printing for post-processing of raw ECG data
• Sets the ADS1298R register settings via easy-to-use graphic user interface (GUI) software

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1.4 Features Not Supported in Current Version
• Real-time data processing
• AC lead-off detection filters
• QRS detection algorithms
• Software PACE detection algorithms
1.5 ADS1298R Hardware
Figure 1 shows the hardware included in the ADS1298R kit. Contact the factory if any component is
missing. The latest software is available on the TI website at http://www.ti.com; you should verify that you
have the latest software before using the device.
Figure 1. ADS1298R Kit
The complete kit includes the following items:
• ADS1298R ECG FE printed circuit board (PCB), Rev A
• MMB0 (Modular EVM motherboard, Rev C or higher)

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ADS1298R
2 Quick Start
This section provides a QuickStart guide to quickly begin evaluating the EVM using the ADS1298RECG-
FE software.
2.1 Default Jumper/Switch Configuration
Figure 2 shows the jumpers found on the ADS1298RECG-FE EVM and the respective factory default
conditions for each.
Figure 2. ADS1298RECG-FE Default Jumper Locations
Table 1 lists the jumpers and switches and the factory default conditions.

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Table 1. ADS1298RECG-FE Default Jumper/Switch Configuration
Jumper Default Position Description
JP1 Installed RLD feedback
JP2 Installed 1-2 AVDD selected for bipolar supply operation selected (AVDD = +2.5V)
JP3 Header Not Installed External Vref buffer not connected
JP4 Installed EVM +5V provided from J4 (power header)
JP5 Open PWDN pin controlled from J5 header (pulled up to DVDD)
JP6 to JP14 Header Not Installed (Pins 1-2
shorted on PCB) DC-coupled input signals
JP15 Installed 2-3 Shield drive is open
JP16 Installed Wilson Central Terminal (WCT) connected to INM for CH1 and CH4-8
JP17 Header Not Installed ECG shield drive is connected to AGND
JP18 Installed 2-3 CLK connected to OSC1
JP19 Installed 1-2 OSC1 enabled
JP20 Installed 2-3 AVSS selected for bipolar supply operation (AVSS = -2.5V)
JP21 Installed 1-2 CS connected to DSP via J3.1
JP22 Installed 2-3 START comes from J3.14
JP23 Installed 1-2 CLKSEL set to 0
JP24 Installed 2-3 DVDD supply = 3.3V
JP25 Header Not Installed No external reference selected
JP26 Installed 1-2 (top) WCT connected to CH8- input
Installed 3-4 (bottom) ECG_V1 connected to CH8+ input
JP27 Installed 1-2 (top) WCT connected to CH7- input
Installed 3-4 (bottom) ECG_V5 connected to CH7+ input
JP28 Installed 1-2 (top) WCT connected to CH6- input
Installed 3-4 (bottom) ECG_V4 connected to CH6+ input
JP29 Installed 1-2 (top) WCT connected to CH5- input
Installed 3-4 (bottom) ECG_V3 connected to CH5+ input
JP30 Installed 1-2 (top) WCT connected to CH4- input
Installed 3-4 (bottom) ECG_V2 connected to CH4+ input
JP31 Installed 1-2 (top) ECG_RA connected to CH3- input
Installed 3-4 (bottom) ECG_LL connected to CH3+ input
JP32 Installed 1-2 (top) ECG_RA connected to CH2- input
Installed 3-4 (bottom) ECG_LA connected to CH2+ input
JP33
Open 1-2 (top) Not connected
Open 3-4 Not connected
Installed 5-6 CH1- input connected to source of JP35
Installed 7-8 (bottom) CH1+ input connected to source of JP36
JP34 Installed 1-2 Connected onboard RESP circuit to CH1- signal input mux (RESPMOD-)
JP35 Installed 1-2 Connected onboard RESP circuit to CH1+ signal input mux (RESPMOD+)
JP36 Installed 1-2 RESP control signal for U11/U12 controlled by MSP430 (U14)

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2.2 ADS1298RECG-FE Operation
To prepare to evaluate the ADS1298R with the ADS1298RECG-FE, complete the following steps:
1. Verify the jumpers on the ADS1298RECG-FE are as shown in Figure 2 (note that these settings are
the factory-configured settings for the board).
2. Verify that the jumpers on the MMB0 motherboard are configured as shown below:
• MMB0 J13A →Open
• MMB0 J13B →Open
• Refer to Appendix B2 for details about the MMB0 power supply
3. Install the ADS1298RECG-FE software using the latest software version. The latest software can be
downloaded from the ADS1298RECG-FE product page. Double click the installer and follow the
instruction to complete the software installation. For detailed installation information and screenshots,
see Appendix C.

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3 Using the ADS1298RECG-FE Software
The ADS1298RECG-FE software provides complete control over all the settings of the ADS1298R. By
using the user interface (UI), the ADS1298R control registers can be manipulated to evaluate the various
options available on the device. Figure 3 shows the starting UI screen of the software. The UI consists of
a user menu (Section 3.1), a few top-level controls (Section 3.2), and a tabbed interface, with different
functions available on the different tabs. The tabs are:
• About (Section 3.3)
• ADC Register (Section 3.4.3)
• Analysis (Section 3.5)
• Save (Section 3.6)
Figure 3. Software Start Screen/About Tab
The user can adjust the settings when the software is not acquiring data. During acquisition, all controls
are disabled and settings may not be changed. When a setting is changed via a control, the settings are
immediately updated on the device and EVM. Settings in the software correspond to settings described in
the ADS1298R product data sheet.

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3.1 Application User Menu
The application user menu is located along the top of the application menu. It consists of two items: File
and Help.
File Menu (see Figure 4)
The File menu provides several options:
•Capture Screen takes a screen capture of the current view of the application and saves it as to a
file specified by the user.
•Save Configuration Settings saves the current states of the ADS1298R control registers for
reloading at a later time. This file is different from the save register on the Save tab (see
Section 3.6), which saves the current register map to a tab-delimited text file.
•Load Configuration Settings loads a previously save configuration setting file and initializes the
hardware and software to the settings within the configuration file. The configuration file must be a
file saved previously from this application using the Save Configuration Settings command, not a
file from the Save tab.
•Exit closes the application.
Help Menu (see Figure 5)
The Help menu provides the About option, which display the software and firmware version that is
currently being used. Please have this information if you need to request assistance or have a question
regarding the software or hardware.
Figure 4. User Menu - File Item Figure 5. User Menu - Help Item
3.2 Top-Level Application Controls
Several controls/indicators are located along the top of the UI screen (see Figure 6). The controls and
indicators are described below.
Figure 6. Top Level Controls
The Data Rate indicator displays the current data rate of the ADS1298R. The data rate can be configured
in CONFIG1 control register (see Section 3.4.2.1).
The Progress indicator will display the current progress of data transfer to the PC during acquisition
cycles.
The Samples/CH control allows for the selection of the number of points, per channel, to collect during an
acquisition cycle. Keep in mind the value entered into this control in relation to the current data rate. Large
numbers of samples, coupled with slower data rates, can take time to acquire.
The ACQUIRE control starts the acquisition process. When pressed, the software will collect the
requested number of samples from the ADS1298R. All points collected during an acquisition process will
be contiguous points.

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ADS1298R
The CONTINUOUS control starts a repeated acquisition process. This function acquires the requested
samples and repeats the data acquisition until the button is turned off. Within a single acquisition cycle,
the points will be contiguous, but from acquisition to acquisition, there may be points missing.
The Analysis Data input referred checkbox changes the displayed data that is read from the ADC.
Checking the box displays the data input referred, while not checking displays the data as converted.
The Show/Poll Lead Off Status displays a window (see Figure 7) that shows the status of the Lead-Off
status registers, LOFF STATP and LOFF STATN, of the ADS1298R. When the lead for the channel is
disconnected, the corresponding channel LED changes from green to red.
Figure 7. Lead-Off Status Registers Display Window
3.3 About Tab
The About tab provides software information to the user. Important safety warning, restrictions, and
disclaimers for the software and hardware are shown and should be followed during the evaluation of this
product. Additional indicators are present to provide device information (Device ID and Rev) and software
information (Firmware Version). The About tab should be the first screen displayed at startup (see
Figure 3).

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3.4 ADC Register Tab
The ADC Register tab provides controls to manipulate ADC control registers of the ADS1298R. Details of
the control registers are provided in the product datasheet. The ADC Register tab consists of a few
controls and several sub-tabs that further divide the control registers into different functions groups. The
sub-tabs are:
• Channel Registers tab (Section 3.4.2)
• LOFF and RLD tab (Section 3.3)
• GPIO and Other Registers tab (Section 3.4.4)
• Register Map tab (Section 3.4.5)
Figure 8. Channel Registers Tab
3.4.1 Standby and Reset Controls
The Standby control allows the user to place the ADS1298R in standby.
The Reset control allows the user to reset the ADS1298R. The Reset Mode determines which mode is
executed when the Reset control is pressed. Device Defaults resets the device to the device defaults;
Programmed Defaults resets the device, then writes the default values for using this software application.

a) Pull-Up/Pull-Down Resistors b) Current Source
PGA
10MW
10MW
AVDD
INP
INN
PGA
AVDD
INP
INN
ADS129xADS129x
22 Fm
To ADC Reference Inputs
VCAP1
10 Fm
VREFP
VREFN
Bandgap 2.4V or 4V
AVSS
R1(1)
R3(1)
R2(1)
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3.4.2 Channel Registers Tab (ADC Register)
The Channel Register tab provides access to control registers that control different properties/settings for
the ADC channels. The control register are grouped into two groups: Global Channel Registers and
Channel Control Registers.
3.4.2.1 Global Channel Registers
The Global Channel Registers box includes Configuration Register 1 (CONFIG1), Configuration Register 2
(CONFIG2), Configuration Register 3 (CONFIG3), and Lead Off Control Register (LOFF). The upper half
of Figure 8 shows the section of the UI panel that allows manipulation and control of these registers.
Configuration Register 1 enables the user to control the resolution mode, enable the daisy-chain
configuration options, and program the data rate.
Configuration Register 2 enables the user to select an internal square wave test source amplitude of
±1mV or ±2mV and a frequency of DC, 2Hz (fCLK/221), or 4Hz (fCLK/220).
Configuration Register 3 controls the bandgap reference (illustrated in Figure 9) and right leg drive
(RLD) options. This register enables the user to select between an external or internal reference voltage,
enable/disable the internal reference buffer, toggle between a 2.4V or a 4.0V output voltage, and to
enable/disable the RLD as well as choose whether the RLD voltage is provided internally or externally.
Figure 9. Internal Reference and Buffer Connections
The Lead-Off Control Register allows the user to configure the threshold for the lead-off comparator,
resistive pull-up or current-source excitation, the lead-off current magnitude, and DC or AC detection.
Figure 10 illustrates a simplified diagram of the resistive pull-up and excitation options for the lead-off
detect feature.
Figure 10. Lead-Off Excitation Options

MUX[2:0] = 101
TempP MUX[2:0] = 100
MvddP(1) MUX[2:0] = 011
From LoffP
MUX[2:0] = 000
MUX[2:0] = 110
MUX[2:0] = 001
To PgaP
To PgaN
MUX[2:0] = 001
RLDIN
MUX[2:0] = 010
RLD_MEAS
AND
MUX[2:0] = 111
VINP
VINN MUX[2:0] = 000
From LoffN
RLD_REF
MUX[2:0] = 010
RLD_MEAS
AND
MvddN(1)
TempN MUX[2:0] = 100
MUX[2:0] = 101
ADS129x
MUX
TestP
TestN
TESTP_PACE_OUT1
INT_TEST
INT_TEST
TESTN_PACE_OUT2
INT_TEST
INT_TEST
MUX[2:0] = 011
EMI
Filter
(AVDD + AVSS)
2
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3.4.2.2 Channel Control Registers
The Channel Control Registers box allows the user to uniquely configure the front-end MUX for each ADC
channel. Additionally, at the top of the Channel Control Registers box (see Figure 8) is the option to
globally set all channels to the same setting. The channel-specific MUX is illustrated in Figure 11.
Figure 11. Input Multiplexer for a Single Channel

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3.4.3 LOFF and RLD Tab (ADC Register)
The LOFF and RLD tab provides control over the Lead-Off Detection and Current Control Registers and
the Right Leg Derivation Control Registers. The tab and controls are shown in Figure 12.
Figure 12. LOFF and RLD Tab
3.4.3.1 Lead-Off Detection and Current Direction Control Registers
The first two arrays of controls (Lead Off Sense) enable lead-off detection for both the positive and
negative channels, LOFF_SENSP and LOFF_SENSN. By pressing the buttons, lead-off detection is
enabled for each channel individually and for each input (positive and negative). Set All LOFFP Bits and
Set All LOFFN Bits allow the user to turn on or off all the enable bits at once instead of clicking each
individual channel control.
The third array of controls (Lead Off Current Direction) determines the current direction used for lead-off
detection when an excitation signal is selected as a pull-up/pull-down resistor. Each channel is controlled
individually by selecting the button that corresponds to the desired channel to manipulate. When the
button is not illuminated, LOFF_FLIP = 0 (INP is pulled-up to AVDD and INN is pulled-down to ground).
When the button is pressed/illuminated, LOFF_FLIP = 1 (INP is pulled-down to ground and INN is pulled-
up to AVDD). Further details of these registers and lead-off function are located in the Applications
Section of the device data sheet.

4-Bit
DAC
To ADC
LOFF_STATP
LOFF_STATN
COMP_TH[2:0]
VINP
VINN PGA
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Figure 10 describes the mode for Lead-Off Detection (that is, resistive or current source) and the 4-bit
DAC settings to configure the lead-off threshold. Figure 13 illustrates the connections from the positive
and negative inputs to the lead-off comparators. The output of the comparators is viewed by using
Show/Poll Lead Off Status control as described in Section 3.2
Figure 13. LOFF_STATP and LOFF_STATN Comparators
3.4.3.2 Right Leg Drive Derivation Control Registers
The Right Leg Drive Derivation Control Registers enable the user to set any combination of positive and/or
negative electrodes to derive the RLD voltage that is fed to the internal right leg drive amplifier.