Texas Instruments SimpleLink CC2652RB User manual

CC2652RB SimpleLink™ Crystal-less BAW Multiprotocol 2.4 GHz Wireless MCU
1 Features
• Microcontroller
– Powerful 48-MHz Arm® Cortex®-M4F processor
– EEMBC CoreMark® score: 148
– 352KB of in-system programmable flash
– 256KB of ROM for protocols and library
functions
– 8KB of cache SRAM (alternatively available as
general-purpose RAM)
– 80KB of ultra-low leakage SRAM. The SRAM is
protected by parity to ensure high reliability of
operation.
– 2-pin cJTAG and JTAG debugging
– Supports over-the-air (OTA) update
• Ultra-low power sensor controller with 4KB of
SRAM
– Sample, store, and process sensor data
– Operation independent from system CPU
– Fast wake-up for low-power operation
• TI-RTOS, drivers, bootloader, Bluetooth® 5.2 low
energy controller, and IEEE 802.15.4 MAC in ROM
for optimized application size
• RoHS-compliant package
– 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)
• Peripherals
– Digital peripherals can be routed to any GPIO
– 4× 32-bit or 8× 16-bit general-purpose timers
– 12-bit ADC, 200 kSamples/s, 8 channels
– 2× comparators with internal reference DAC
(1× continuous time, 1× ultra-low power)
– Programmable current source
– 2× UART
– 2× SSI (SPI, MICROWIRE, TI)
– I2C and I2S
– Real-time clock (RTC)
– AES 128- and 256-bit cryptographic accelerator
– ECC and RSA public key hardware accelerator
– SHA2 accelerator (full suite up to SHA-512)
– True random number generator (TRNG)
– Capacitive sensing, up to 8 channels
– Integrated temperature and battery monitor
• External system
– Integrated bulk acoustic wave (BAW) resonator
generating accurate clock with fast startup time
of 80 µs for system and RF
– On-chip buck DC/DC converter
• Low power
– Wide supply voltage range
• Normal operation: 1.8 to 3.8 V
• External regulator mode: 1.7 to 1.95 V
– Active mode RX: 7.3 mA
– Active mode TX 0 dBm: 7.9 mA
– Active mode TX 5 dBm: 10.2 mA
– Active mode MCU 48 MHz (CoreMark):
3.4 mA (71 μA/MHz)
– Sensor controller, low power-mode, 2 MHz,
running infinite loop: 30.8 μA
– Sensor controller, active mode, 24 MHz,
running infinite loop: 808 μA
– Standby: 0.94 µA (RTC on, 80KB RAM and
CPU retention)
• Radio section
– 2.4 GHz RF transceiver compatible with
Bluetooth 5.2 Low Energy and earlier LE
specifications and IEEE 802.15.4 PHY and
MAC
– 3-wire, 2-wire, 1-wire PTA coexistence
mechanisms
– Excellent receiver sensitivity:
-100 dBm for 802.15.4 (2.4 GHz),
-102 dBm for Bluetooth 5 Low Energy Coded
– Programmable output power up to +5 dBm
– Suitable for systems targeting compliance with
worldwide radio frequency regulations
• EN 300 328, (Europe)
• EN 300 440 Category 2
• FCC CFR47 Part 15
• ARIB STD-T66 (Japan)
• Wireless protocols
–Thread, Zigbee®, Bluetooth® 5.2 Low Energy,
IEEE 802.15.4, IPv6-enabled smart objects
(6LoWPAN), proprietary systems, SimpleLink™
TI 15.4 stack (2.4 GHz), and dynamic
multiprotocol manager (DMM) driver.
• Development Tools and Software
–CC2652RB LaunchPad™ Development Kit
–SimpleLink™ CC13x2 and CC26x2 Software
Development Kit
–SmartRF™ Studio for simple radio configuration
–Sensor Controller Studio for building low-power
sensing applications
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

2 Applications
• 2400 to 2480 MHz ISM and SRD systems 1
with down to 4 kHz of receive bandwidth
•Building automation
– Building security systems – motion detector,
electronic smart lock, door and window sensor,
garage door system, gateway
– HVAC – thermostat, wireless environmental
sensor, HVAC system controller, gateway
– Fire safety system – smoke and heat detector,
fire alarm control panel (FACP)
– Video surveillance – IP network camera
– Elevators and escalators – elevator main
control panel for elevators and escalators
•Grid infrastructure
– Smart meters – water meter, gas meter,
electricity meter, and heat cost allocators
– Grid communications – wireless
communications – Long-range sensor
applications
– Other alternative energy – energy harvesting
•Industrial transport – asset tracking
•Factory automation and control
•Medical
•Electronic point of sale (EPOS) – Electronic Shelf
Label (ESL)
•Personal electronics
–Wired networking – wireless LAN or Wi-Fi
access points, edge router, small business
router
–Portable electronics – RF smart remote control
–Home theater & entertainment – smart
speakers, smart display, set-top box, streaming
media player
–Connected peripherals – consumer wireless
module, wireless data access card
–Gaming – electronic and robotic toys
–Wearables (non-medical) – smart trackers
3 Description
The SimpleLink™ CC2652RB device is the industry’s first multiprotocol 2.4 GHz wireless crystal-less
microcontroller (MCU) with integrated TI Bulk Acoustic Wave (BAW) resonator technology supporting Thread,
Zigbee®, Bluetooth® 5.2 Low Energy, IEEE 802.15.4, IPv6-enabled smart objects (6LoWPAN), proprietary
systems, including the TI 15.4-Stack (2.4 GHz), and concurrent multiprotocol operation through the Dynamic
Multiprotocol Manager (DMM) software driver. Integrated BAW resonator technology eliminates the need for
external crystals without compromising latency or frequency stability. The device is optimized for low-power
wireless communication and advanced sensing in building security systems, HVAC, medical, power tool, wired
networking, portable electronics, home theater & entertainment, and connected peripherals markets.
The highlighted features of TI Bulk Acoustic Wave (BAW) resonator technology include:
• Unparalleled RF performance with high-performance frequency stability (±40 PPM) across temperature
(-40°C to 85°C) and full operating voltage (1.8 V to 3.8 V), ultra-low jitter and phase noise to meet various
wireless communication standards clock requirements.
• Efficient development and production cycles by eliminating crystal oscillator sourcing and reducing costly
board re-designs and re-certification due to external crystal layout and assembly issues.
• Optimized Bill of Material (BOM) and PCB area savings (12% average).
• Superior long-term clock stability and aging performance (10 years) in comparison with most standard quartz
crystal (longest 5 years aging) enables longer product lifecycles.
• Robust vibration and mechanical shock resistance (3× lower PPM variance versus external crystal) reduces
product replacement costs from external crystal failure and allows for operation in harsh environments, such
as in motors or heavy machinery.
• Mitigation of potential timing related side channel attacks from external clock tampering.
1See RF Core for additional details on supported protocol standards, modulation formats, and data rates.
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The highlighted features of the SimpleLink™ MCU platform include:
• Wide flexibility of protocol stack support in the SimpleLink™ CC13x2 and CC26x2 Software Development Kit
(SDK).
• Longer battery life wireless applications with low standby current of 0.84 µA and full RAM retention.
• Industrial temperature ready with lowest standby current of 5.6 µA at 85°C.
• Advanced sensing with a programmable, autonomous ultra-low power Sensor Controller CPU with fast wake-
up capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at 1 µA system current.
• Low SER (Soft Error Rate) FIT (Failure-in-time) for long operation lifetime with no disruption for industrial
markets with always-on SRAM parity against corruption due to potential radiation events.
• Dedicated software-defined radio controller (Arm® Cortex®-M0) providing flexible low-power RF transceiver
capability to support multiple physical layers and RF standards.
The CC2652RB device is part of the SimpleLink™ MCU platform, which consists of Wi-Fi®, Bluetooth Low
Energy, Thread, Zigbee, Sub-1 GHz MCUs, and host MCUs that all share a common, easy-to-use development
environment with a single core software development kit (SDK) and rich tool set. A one-time integration of the
SimpleLink™ platform enables you to add any combination of the portfolio’s devices into your design, allowing
100 percent code reuse when your design requirements change. For more information, visit SimpleLink™ MCU
platform.
Device Information
PART NUMBER(1) PACKAGE BODY SIZE (NOM)
CC2652RB1FRGZ VQFN (48) 7.00 mm × 7.00 mm
(1) For the most current part, package, and ordering information for all available devices, see the Package Option Addendum in Section
12, or see the TI website.
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4 Functional Block Diagram
CC2652RB
General Hardware Peripherals and Modules
Main CPU
Up to
352KB
Flash
with 8KB
Cache
Sensor Interface
cJTAG
Up to
80KB
SRAM
256KB
ROM
Arm®
Cortex®-M4F
Processor
BAW, LDO, Clocks, and References
Optional DC/DC Converter
RF Core
Arm®
Cortex®-M0
Processor
DSP Modem
16KB
SRAM
ROM
ULP Sensor Controller
Low-Power Comparator
12-bit ADC, 200 ks/s
Constant Current Source
SPI-I2C Digital Sensor IF
4KB SRAM
Time-to-Digital Converter
4× 32-bit Timers
2× SSI (SPI)
Watchdog Timer
Temperature and
Battery Monitor
RTC
I2C and I2S
2× UART
32 ch. µDMA
31 GPIOs
AES-256, SHA2-512
ECC, RSA
ADC
ADC
Digital PLL
48 MHz
69 µA/MHz
2.4 GHz
TRNG
Figure 4-1. CC2652RB Block Diagram
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 2
3 Description.......................................................................2
4 Functional Block Diagram.............................................. 4
5 Revision History.............................................................. 6
6 Device Comparison......................................................... 7
7 Terminal Configuration and Functions..........................8
7.1 Pin Diagram – RGZ Package (Top View)....................8
7.2 Signal Descriptions – RGZ Package...........................9
7.3 Connections for Unused Pins and Modules..............10
8 Specifications................................................................ 11
8.1 Absolute Maximum Ratings ..................................... 11
8.2 ESD Ratings .............................................................11
8.3 Recommended Operating Conditions ...................... 11
8.4 Power Supply and Modules ..................................... 12
8.5 Power Consumption - Power Modes........................ 12
8.6 Power Consumption - Radio Modes......................... 13
8.7 Nonvolatile (Flash) Memory Characteristics ............ 13
8.8 Thermal Resistance Characteristics ........................ 13
8.9 RF Frequency Bands ............................................... 14
8.10 Bluetooth Low Energy - Receive (RX).................... 14
8.11 Bluetooth Low Energy - Transmit (TX).................... 17
8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4
GHz (OQPSK DSSS1:8, 250 kbps) - TX.....................18
8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4
GHz (OQPSK DSSS1:8, 250 kbps) - RX.................... 19
8.14 Timing and Switching Characteristics..................... 19
8.15 Peripheral Characteristics.......................................25
8.16 Typical Characteristics............................................ 33
9 Detailed Description......................................................49
9.1 Overview................................................................... 49
9.2 System CPU............................................................. 49
9.3 Radio (RF Core)........................................................50
9.4 Memory..................................................................... 50
9.5 Sensor Controller...................................................... 51
9.6 Cryptography............................................................ 52
9.7 Timers....................................................................... 53
9.8 Serial Peripherals and I/O.........................................54
9.9 Battery and Temperature Monitor............................. 54
9.10 µDMA......................................................................54
9.11 Debug......................................................................54
9.12 Power Management................................................55
9.13 Clock Systems........................................................ 56
9.14 Network Processor..................................................56
10 Application, Implementation, and Layout................. 57
10.1 Reference Designs................................................. 57
11 Device and Documentation Support..........................58
11.1 Tools and Software..................................................58
11.2 Documentation Support.......................................... 60
11.3 Support Resources................................................. 61
11.4 Trademarks............................................................. 61
11.5 Electrostatic Discharge Caution.............................. 61
11.6 Glossary.................................................................. 61
12 Mechanical, Packaging, and Orderable
Information.................................................................... 62
12.1 Packaging Information............................................ 62
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5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from August 12, 2020 to February 12, 2021 (from Revision C (August 2020) to
Revision D (February 2021)) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Updated to Bluetooth 5.2 throughout the document........................................................................................... 1
• Added 3-wire, 2-wire, and 1-wire PTA coexistence mechanisms to the "Radio Section" list in Section 1
Features .............................................................................................................................................................1
• Added Wireless protocols to Section 1 .............................................................................................................. 1
• Changed the frequency of the input tone for 14-bit and 15-bit mode in Section 8.15.1.1 ................................25
• Added PTA description in Section 9.3, Radio (RF Core) ................................................................................. 50
• Added the paragraph that begins "Integrated matched filter-balun devices can be used…" in Section 10.1,
Reference Designs .......................................................................................................................................... 57
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6 Device Comparison
Table 6-1. Device Family Overview
DEVICE RADIO SUPPORT FLASH
(KB)
RAM
(KB) GPIO PACKAGE SIZE
CC1312R Sub-1 GHz 352 80 30 RGZ (7-mm × 7-mm VQFN48)
CC1352P
Multiprotocol
Sub-1 GHz
Bluetooth 5.2 Low Energy
Zigbee
Thread
2.4 GHz proprietary FSK-based formats
+20-dBm high-power amplifier
352 80 26 RGZ (7-mm × 7-mm VQFN48)
CC1352R
Multiprotocol
Sub-1 GHz
Bluetooth 5.2 Low Energy
Zigbee
Thread
2.4 GHz proprietary FSK-based formats
352 80 28 RGZ (7-mm × 7-mm VQFN48)
CC2642R Bluetooth 5.2 Low Energy
2.4 GHz proprietary FSK-based formats 352 80 31 RGZ (7-mm × 7-mm VQFN48)
CC2642R-Q1 Bluetooth 5.2 Low Energy 352 80 31 RTC (7-mm × 7-mm VQFN48)
CC2652R
Multiprotocol
Bluetooth 5.2 Low Energy
Zigbee
Thread
2.4 GHz proprietary FSK-based formats
352 80 31 RGZ (7-mm × 7-mm VQFN48)
CC2652RB
Multiprotocol
Bluetooth 5.2 Low Energy
Zigbee
Thread
2.4 GHz proprietary FSK-based formats
352 80 31 RGZ (7-mm × 7-mm VQFN48)
CC2652P
Multiprotocol
Bluetooth 5.2 Low Energy
Zigbee
Thread
2.4 GHz proprietary FSK-based formats
+19.5-dBm high-power amplifier
352 80 26 RGZ (7-mm × 7-mm VQFN48)
CC1310 Sub-1 GHz 32–128 16–20 10–31
RGZ (7-mm × 7-mm VQFN48)
RHB (5-mm × 5-mm VQFN32)
RSM (4-mm × 4-mm VQFN32)
CC1350 Sub-1 GHz
Bluetooth 4.2 Low Energy 128 20 10–31
RGZ (7-mm × 7-mm VQFN48)
RHB (5-mm × 5-mm VQFN32)
RSM (4-mm × 4-mm VQFN32)
CC2640R2F Bluetooth 5.1 Low Energy
2.4 GHz proprietary FSK-based formats 128 20 10–31
RGZ (7-mm × 7-mm VQFN48)
RHB (5-mm × 5-mm VQFN32)
RSM (4-mm × 4-mm VQFN32)
YFV (2.7-mm × 2.7-mm DSBGA34)
CC2640R2F-Q1 Bluetooth 5.1 Low Energy
2.4 GHz proprietary FSK-based formats 128 20 31 RGZ (7-mm × 7-mm VQFN48)
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7 Terminal Configuration and Functions
7.1 Pin Diagram – RGZ Package (Top View)
40 39 38 37
21 22 23 24
DCDC_SW33
DIO_18
34
RESET_N35
DIO_2336
X32K_Q2 4
X32K_Q1 3
RF_N 2
RF_P 1
DIO_2232
DIO_2131
DIO_2030
DIO_1929
DIO_0 5
DIO_1 6
DIO_2 7
8
28
27
26
JTAG_TCKC25
9
10
11
12
41 42 43 44
20
DIO_15
19
DIO_14
18 17
45 46 47 48
16 15 14 13
DIO_17
DIO_16
VDDS_DCDC
DIO_12 DIO_13
VDDS2
DIO_11 DIO_10
DIO_5
DIO_6
DIO_7
DIO_3
DIO_4
DIO_8 DIO_9
VDDS3
DCOUPL
JTAG_TMSC
DIO_25 DIO_24 VDDR VDDR_RF DIO_26 X48M_P X48M_N DIO_28 DIO_29 DIO_30 DIO_27 VDDS
Figure 7-1. RGZ (7-mm × 7-mm) Pinout, 0.5-mm Pitch (Top View)
The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:
• Pin 10, DIO_5
• Pin 11, DIO_6
• Pin 12, DIO_7
• Pin 24, JTAG_TMSC
• Pin 26, DIO_16
• Pin 27, DIO_17
The following I/O pins marked in Figure 7-1 in italics have analog capabilities:
• Pin 36, DIO_23
• Pin 37, DIO_24
• Pin 38, DIO_25
• Pin 39, DIO_26
• Pin 40, DIO_27
• Pin 41, DIO_28
• Pin 42, DIO_29
• Pin 43, DIO_30
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7.2 Signal Descriptions – RGZ Package
Table 7-1. Signal Descriptions – RGZ Package
PIN I/O TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 — Power Output from internal DC/DC converter. Tie to ground for external
regulator mode (1.7-V to 1.95-V operation). (1)
DCOUPL 23 — Power For decoupling of internal 1.27 V regulated digital-supply (2)
DIO_0 5 I/O Digital GPIO
DIO_1 6 I/O Digital GPIO
DIO_2 7 I/O Digital GPIO
DIO_3 8 I/O Digital GPIO
DIO_4 9 I/O Digital GPIO
DIO_5 10 I/O Digital GPIO, high-drive capability
DIO_6 11 I/O Digital GPIO, high-drive capability
DIO_7 12 I/O Digital GPIO, high-drive capability
DIO_8 14 I/O Digital GPIO
DIO_9 15 I/O Digital GPIO
DIO_10 16 I/O Digital GPIO
DIO_11 17 I/O Digital GPIO
DIO_12 18 I/O Digital GPIO
DIO_13 19 I/O Digital GPIO
DIO_14 20 I/O Digital GPIO
DIO_15 21 I/O Digital GPIO
DIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 28 I/O Digital GPIO
DIO_19 29 I/O Digital GPIO
DIO_20 30 I/O Digital GPIO
DIO_21 31 I/O Digital GPIO
DIO_22 32 I/O Digital GPIO
DIO_23 36 I/O Digital or Analog GPIO, analog capability
DIO_24 37 I/O Digital or Analog GPIO, analog capability
DIO_25 38 I/O Digital or Analog GPIO, analog capability
DIO_26 39 I/O Digital or Analog GPIO, analog capability
DIO_27 40 I/O Digital or Analog GPIO, analog capability
DIO_28 41 I/O Digital or Analog GPIO, analog capability
DIO_29 42 I/O Digital or Analog GPIO, analog capability
DIO_30 43 I/O Digital or Analog GPIO, analog capability
EGP — — GND Ground – exposed ground pad(3)
JTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capability
JTAG_TCKC 25 I Digital JTAG TCKC
RESET_N 35 I Digital Reset, active low. No internal pullup resistor
RF_P 1 — RF Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
RF_N 2 — RF Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX
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Table 7-1. Signal Descriptions – RGZ Package (continued)
PIN I/O TYPE DESCRIPTION
NAME NO.
VDDR 45 — Power
Internal supply, must be powered from the internal DC/DC
converter or the internal LDO. For external regulator mode (1.7-V to
1.95-V operation), connect to external regulator and internal DC-
DC cannot be used. (2) (4) (6)
VDDR_RF 48 — Power Internal supply, must be powered from the internal DC/DC
converter or the internal LDO(2) (5) (6)
VDDS 44 — Power
1.8-V to 3.8-V main chip supply. For external regulator mode (1.7-V
to 1.95-V operation), connect to external regulator and internal DC-
DC cannot be used. (1)
VDDS2 13 — Power 1.8-V to 3.8-V DIO supply(1)
VDDS3 22 — Power 1.8-V to 3.8-V DIO supply(1)
VDDS_DCDC 34 — Power 1.8-V to 3.8-V DC/DC converter supply. Tie to ground for external
regulator mode (1.7-V to 1.95-V operation).
X48M_N 46 — Analog 48-MHz crystal oscillator pin 1. Do not connect if not in use.
(Optional)(7)
X48M_P 47 — Analog 48-MHz crystal oscillator pin 2. Do not connect if not in use.
(Optional)(7)
X32K_Q1 3 — Analog 32-kHz crystal oscillator pin 1
X32K_Q2 4 — Analog 32-kHz crystal oscillator pin 2
(1) For more details, see technical reference manual listed in Section 11.2.
(2) Do not supply external circuitry from this pin.
(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is
imperative for proper device operation.
(4) If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.
(5) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.
(6) Output from internal DC/DC and LDO is trimmed to 1.68 V.
(7) The X48M_N and X48M_P pins can be used to connect an external 48-MHz crystal. This clock can be used instead of the internal
BAW clock. However, it is not required for the device standard operation.
7.3 Connections for Unused Pins and Modules
Table 7-2. Connections for Unused Pins
FUNCTION SIGNAL NAME PIN NUMBER ACCEPTABLE PRACTICE(1) PREFERRED
PRACTICE(1)
GPIO DIO_n
5–12
14–21
26–32
36–43
NC or GND NC
32.768-kHz crystal X32K_Q1 3 NC or GND NC
X32K_Q2 4
DC/DC converter(2) DCDC_SW 33 NC NC
VDDS_DCDC 34 VDDS (GND)(3) VDDS (GND)(3)
48-MHz crystal X48M_N 46 NC NC
X48M_P 47 NC NC
(1) NC = No connect
(2) When the DC/DC converter is not used, the inductor between DCDC_SW and VDDR can be removed. VDDR and VDDR_RF must still
be connected and the 22 uF DCDC capacitor must be kept on the VDDR net.
(3) When operating in external regulator mode.
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8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN MAX UNIT
VDDS(3) Supply voltage –0.3 4.1 V
VDDS and
VDDR(5) Supply voltage (External regulator mode) –0.3 2.25 V
Voltage on any digital pin(4) –0.3 VDDS + 0.3, max 4.1 V
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P –0.3 VDDR + 0.3, max 2.25 V
Vin Voltage on ADC input
Voltage scaling enabled –0.3 VDDS
VVoltage scaling disabled, internal reference –0.3 1.49
Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9
5 dBm
Tstg Storage temperature –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ground, unless otherwise noted.
(3) VDDS_DCDC, VDDS2 and VDDS3 must be at the same potential as VDDS.
(4) Including analog capable DIOs.
(5) VDDR, VDDS, VDDS2 and VDDS3 must be at the same potential.
8.2 ESD Ratings
VALUE UNIT
VESD
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins ±2000 V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) All pins ±500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process
8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Operating ambient temperature –40 85 °C
Operating supply voltage (VDDS and VDDR), external
regulator mode
For operation in 1.8-V systems
(VDDS and VDDR pins connected on PCB,
internal DC-DC cannot be used)
1.7 1.95 V
Operating supply voltage (VDDS) 1.8 3.8 V
Rising supply voltage slew rate 0 100 mV/µs
Falling supply voltage slew rate(1) 0 20 mV/µs
(1) For small coin-cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor must be used
to ensure compliance with this slew rate.
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8.4 Power Supply and Modules
over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
VDDS Power-on-Reset (POR) threshold 1.1 -
1.55 V
VDDS Brown-out Detector (BOD) (1) Rising threshold 1.77 V
VDDS Brown-out Detector (BOD)
External regulator mode Rising threshold 1.64 V
VDDS Brown-out Detector (BOD), before initial boot (2) Rising threshold 1.70 V
VDDS Brown-out Detector (BOD) (1) Falling threshold 1.75 V
VDDS Brown-out Detector (BOD)
External regulator mode Falling threshold 1.63 V
(1) For boost mode (VDDR =1.95 V), TI drivers software initialization will trim VDDS BOD limits to maximum (approximately 2.0 V)
(2) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the RESET_N pin
8.5 Power Consumption - Power Modes
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled unless
otherwise noted.
PARAMETER TEST CONDITIONS TYP UNIT
Core Current Consumption
Icore
Reset and Shutdown
Reset. RESET_N pin asserted or VDDS below power-on-reset
threshold 150 nA
Shutdown. No clocks running, no retention 150
Standby
without cache
retention
RTC running, CPU, 80KB RAM and (partial) register retention.
RCOSC_LF 0.94 µA
RTC running, CPU, 80KB RAM and (partial) register retention
XOSC_LF 1.09 µA
Standby
with cache retention
RTC running, CPU, 80KB RAM and (partial) register retention.
RCOSC_LF 3.2 µA
RTC running, CPU, 80KB RAM and (partial) register retention.
XOSC_LF 3.3 µA
Idle Supply Systems and RAM powered
RCOSC_HF 675 µA
Active MCU running CoreMark at 48 MHz
RCOSC_HF 3.39 mA
Peripheral Current Consumption
Iperi
Peripheral power
domain Delta current with domain enabled 97.7
µA
Serial power domain Delta current with domain enabled 7.2
RF Core Delta current with power domain enabled,
clock enabled, RF core idle 210.9
µDMA Delta current with clock enabled, module is idle 63.9
Timers Delta current with clock enabled, module is idle(3) 81.0
I2C Delta current with clock enabled, module is idle 10.1
I2S Delta current with clock enabled, module is idle 26.3
SSI Delta current with clock enabled, module is idle 82.9
UART Delta current with clock enabled, module is idle(1) 167.5
CRYPTO (AES) Delta current with clock enabled, module is idle(2) 25.6
PKA Delta current with clock enabled, module is idle 84.7
TRNG Delta current with clock enabled, module is idle 35.6
Sensor Controller Engine Consumption
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8.5 Power Consumption - Power Modes (continued)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V with DC/DC enabled unless
otherwise noted.
PARAMETER TEST CONDITIONS TYP UNIT
ISCE
Active mode 24 MHz, infinite loop 808.5 µA
Low-power mode 2 MHz, infinite loop 30.1
(1) Only one UART running
(2) Only one SSI running
(3) Only one GPTimer running
8.6 Power Consumption - Radio Modes
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.6 V with DC/DC enabled unless
otherwise noted.
PARAMETER TEST CONDITIONS TYP UNIT
Radio receive current 2440 MHz 7.3 mA
Radio transmit current
0 dBm output power setting
2440 MHz 7.9 mA
+5 dBm output power setting
2440 MHz 10.2 mA
8.7 Nonvolatile (Flash) Memory Characteristics
Over operating free-air temperature range and VDDS = 3.0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Flash sector size 8 KB
Supported flash erase cycles before failure, full bank(1)
(5) 30 k Cycles
Supported flash erase cycles before failure, single
sector(2) 60 k Cycles
Maximum number of write operations per row before
sector erase(3) 83 Write Operations
Flash retention 105 °C 11.4 Years at
105 °C
Flash sector erase current Average delta current 10.7 mA
Flash sector erase time(4) Zero cycles 10 ms
Flash write current Average delta current, 4 bytes at a time 6.2 mA
Flash write time(4) 4 bytes at a time 21.6 µs
(1) A full bank erase is counted as a single erase cycle on each sector
(2) Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k
cycles
(3) Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per
write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum
number of write operations per row is reached.
(4) This number is dependent on Flash aging and increases over time and erase cycles
(5) Aborting flash during erase or program modes is not a safe operation.
8.8 Thermal Resistance Characteristics
THERMAL METRIC(1)
PACKAGE
UNIT
RGZ
(VQFN)
48 PINS
RθJA Junction-to-ambient thermal resistance 23.4 °C/W(2)
RθJC(top) Junction-to-case (top) thermal resistance 13.3 °C/W(2)
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8.8 Thermal Resistance Characteristics (continued)
THERMAL METRIC(1)
PACKAGE
UNIT
RGZ
(VQFN)
48 PINS
RθJB Junction-to-board thermal resistance 8.0 °C/W(2)
ψJT Junction-to-top characterization parameter 0.1 °C/W(2)
ψJB Junction-to-board characterization parameter 7.9 °C/W(2)
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.7 °C/W(2)
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
(2) °C/W = degrees Celsius per watt.
8.9 RF Frequency Bands
Over operating free-air temperature range (unless otherwise noted).
PARAMETER MIN TYP MAX UNIT
Frequency bands 2360 2500 MHz
8.10 Bluetooth Low Energy - Receive (RX)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
125 kbps (LE Coded)
Receiver sensitivity Differential mode. BER = 10–3 –102 dBm
Receiver saturation Differential mode. BER = 10–3 >5 dBm
Frequency error tolerance
Difference between the incoming carrier
frequency and the internally generated carrier
frequency
> (–300 / 300) kHz
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (37-byte packets) > (–240 / 240) ppm
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (255-byte packets) > (–125 / 125) ppm
Co-channel rejection(1)
Wanted signal at –79 dBm, modulated interferer in
channel,
BER = 10–3
–1.5 dB
Selectivity, ±1 MHz(1)
Wanted signal at –79 dBm, modulated interferer at
±1 MHz,
BER = 10–3, measured at input level –82 dBm
8 / 2(2) dB
Selectivity, ±2 MHz(1)
Wanted signal at –79 dBm, modulated interferer at
±2 MHz,
BER = 10–3, measured at input level –82 dBm
44 / 39(2) dB
Selectivity, ±3 MHz(1)
Wanted signal at –79 dBm, modulated interferer at
±3 MHz,
BER = 10–3, measured at input level –82 dBm
46 / 44(2) dB
Selectivity, ±4 MHz(1)
Wanted signal at –79 dBm, modulated interferer at
±4 MHz,
BER = 10–3, measured at input level –82 dBm
44 / 46(2) dB
Selectivity, ±6 MHz(1)
Wanted signal at –79 dBm, modulated interferer at
≥ ±6 MHz,
BER = 10–3, measured at input level –82 dBm
48 / 44(2) dB
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8.10 Bluetooth Low Energy - Receive (RX) (continued)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Selectivity, ±7 MHz
Wanted signal at –79 dBm, modulated interferer at
≥ ±7 MHz,
BER = 10–3, measured at input level –82 dBm
51 / 45(2) dB
Selectivity, Image frequency(1)
Wanted signal at –79 dBm, modulated interferer at
image frequency,
BER = 10–3, measured at input level –82 dBm
39 dB
Selectivity, Image frequency ±1
MHz(1)
Note that Image frequency + 1 MHz is the Co-
channel –1 MHz. Wanted signal at –79 dBm,
modulated interferer at ±1 MHz from image
frequency,
BER = 10–3, measured at input level –82 dBm
2 / 44 (2) dB
500 kbps (LE Coded)
Receiver sensitivity Differential mode. BER = 10–3 –100 dBm
Receiver saturation Differential mode. BER = 10–3 > 5 dBm
Frequency error tolerance
Difference between the incoming carrier
frequency and the internally generated carrier
frequency
> (–300 / 300) kHz
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (37-byte packets) > (–450 / 450) ppm
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (255-byte packets) > (–175 / 175) ppm
Co-channel rejection(1)
Wanted signal at –72 dBm, modulated interferer in
channel,
BER = 10–3
–3.5 dB
Selectivity, ±1 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
±1 MHz,
BER = 10–3, measured at input level –75 dBm
5 / -1(2) dB
Selectivity, ±2 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
±2 MHz,
BER = 10–3, measured at input level –75 dBm
44 / 37(2) dB
Selectivity, ±3 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
±3 MHz,
BER = 10–3, measured at input level –75 dBm
46 / 46(2) dB
Selectivity, ±4 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
±4 MHz,
BER = 10–3, measured at input level –75 dBm
45 / 47(2) dB
Selectivity, ±6 MHz(1)
Wanted signal at –72 dBm, modulated interferer at
≥ ±6 MHz,
BER = 10–3, measured at input level –75 dBm
46 / 45(2) dB
Selectivity, ±7 MHz
Wanted signal at –72 dBm, modulated interferer at
≥ ±7 MHz,
BER = 10–3, measured at input level –75 dBm
49 / 45(2) dB
Selectivity, Image frequency(1)
Wanted signal at –72 dBm, modulated interferer at
image frequency,
BER = 10–3, measured at input level –75 dBm
37 dB
Selectivity, Image frequency ±1
MHz(1)
Note that Image frequency + 1 MHz is the Co-
channel –1 MHz. Wanted signal at –72 dBm,
modulated interferer at ±1 MHz from image
frequency,
BER = 10–3, measured at input level –75 dBm
-1 / 46(2) dB
1 Mbps (LE 1M)
Receiver sensitivity Differential mode. BER = 10–3 –97 dBm
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8.10 Bluetooth Low Energy - Receive (RX) (continued)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Receiver saturation Differential mode. BER = 10–3 > 5 dBm
Frequency error tolerance
Difference between the incoming carrier
frequency and the internally generated carrier
frequency
> (–350 / 350) kHz
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (37-byte packets) > (–750 / 750) ppm
Co-channel rejection(1)
Wanted signal at –67 dBm, modulated interferer in
channel,
BER = 10–3
–6 dB
Selectivity, ±1 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±1 MHz,
BER = 10–3, measured at input level –70 dBm
7 / 4(2) dB
Selectivity, ±2 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±2 MHz,
BER = 10–3, measured at input level –70 dBm
39 / 33(2) dB
Selectivity, ±3 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±3 MHz,
BER = 10–3, measured at input level –70 dBm
36 / 41(2) dB
Selectivity, ±4 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±4 MHz,
BER = 10–3, measured at input level –70 dBm
36 / 45(2) dB
Selectivity, ±5 MHz or more(1)
Wanted signal at –67 dBm, modulated interferer at
≥ ±5 MHz,
BER = 10–3, measured at input level –70 dBm
40 dB
Selectivity, image frequency(1)
Wanted signal at –67 dBm, modulated interferer at
image frequency,
BER = 10–3, measured at input level –70 dBm
33 dB
Selectivity, image frequency
±1 MHz(1)
Note that Image frequency + 1 MHz is the Co-
channel –1 MHz. Wanted signal at –67 dBm,
modulated interferer at ±1 MHz from image
frequency, BER = 10–3, measured at input level –
70 dBm
4 / 41(2) dB
Out-of-band blocking(3) 30 MHz to 2000 MHz –10 dBm
Out-of-band blocking 2003 MHz to 2399 MHz –18 dBm
Out-of-band blocking 2484 MHz to 2997 MHz –12 dBm
Out-of-band blocking 3000 MHz to 12.75 GHz –2 dBm
Intermodulation
Wanted signal at 2402 MHz, –64 dBm. Two
interferers at 2405 and 2408 MHz respectively, at
the given power level
–42 dBm
Spurious emissions,
30 to 1000 MHz(4) Measurement in a 50-Ω single-ended load. < –59 dBm
Spurious emissions,
1 to 12.75 GHz(4) Measurement in a 50 Ω single-ended load. < –47 dBm
RSSI dynamic range 70 dB
RSSI accuracy ±4 dB
2 Mbps (LE 2M)
Receiver sensitivity Differential mode. Measured at SMA connector,
BER = 10–3 –92 dBm
Receiver saturation Differential mode. Measured at SMA connector,
BER = 10–3 > 5 dBm
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8.10 Bluetooth Low Energy - Receive (RX) (continued)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Frequency error tolerance
Difference between the incoming carrier
frequency and the internally generated carrier
frequency
> (–500 / 500) kHz
Data rate error tolerance Difference between incoming data rate and the
internally generated data rate (37-byte packets) > (–700 / 750) ppm
Co-channel rejection(1)
Wanted signal at –67 dBm, modulated interferer in
channel,
BER = 10–3
–7 dB
Selectivity, ±2 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±2 MHz, Image frequency is at –2 MHz
BER = 10–3, measured at input level –70 dBm
8 / 4(2) dB
Selectivity, ±4 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±4 MHz,
BER = 10–3, measured at input level –70 dBm
36 / 36(2) dB
Selectivity, ±6 MHz(1)
Wanted signal at –67 dBm, modulated interferer at
±6 MHz,
BER = 10–3, measured at input level –70 dBm
37 / 36(2) dB
Selectivity, image frequency(1)
Wanted signal at –67 dBm, modulated interferer at
image frequency,
BER = 10–3, measured at input level –70 dBm
4 dB
Selectivity, image frequency
±2 MHz(1)
Note that Image frequency + 2 MHz is the Co-
channel. Wanted signal at –67 dBm, modulated
interferer at ±2 MHz from image frequency, BER =
10–3, measured at input level –70 dBm
–7 / 36(2) dB
Out-of-band blocking(3) 30 MHz to 2000 MHz –16 dBm
Out-of-band blocking 2003 MHz to 2399 MHz –21 dBm
Out-of-band blocking 2484 MHz to 2997 MHz –15 dBm
Out-of-band blocking 3000 MHz to 12.75 GHz –12 dBm
Intermodulation
Wanted signal at 2402 MHz, –64 dBm. Two
interferers at 2408 and 2414 MHz respectively, at
the given power level
–38 dBm
(1) Numbers given as I/C dB
(2) X / Y, where X is +N MHz and Y is –N MHz
(3) Excluding one exception at Fwanted / 2, per Bluetooth Specification
(4) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)
8.11 Bluetooth Low Energy - Transmit (TX)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General Parameters
Max output power
Differential mode, delivered to
a single-ended 50 Ω load
through a balun
Differential mode, delivered to a single-ended 50
Ω load through a balun 5 dBm
Output power
programmable
range
Differential mode, delivered to a single-ended 50 Ω load through a balun 26 dB
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8.11 Bluetooth Low Energy - Transmit (TX) (continued)
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Spurious emissions and harmonics
Spurious
emissions(1)
f < 1 GHz, outside restricted
bands +5 dBm setting < –36 dBm
f < 1 GHz, restricted bands
ETSI +5 dBm setting < –54 dBm
f < 1 GHz, restricted bands
FCC +5 dBm setting < –55 dBm
f > 1 GHz, including harmonics +5 dBm setting < –42 dBm
Harmonics (1) Second harmonic +5 dBm setting < –42 dBm
Third harmonic +5 dBm setting < –42 dBm
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General Parameters
Max output power Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm
Output power
programmable range Differential mode, delivered to a single-ended 50-Ω load through a balun 26 dB
Spurious emissions and harmonics
Spurious emissions(1)
(2)
f < 1 GHz, outside restricted
bands
+5 dBm setting
< -36 dBm
f < 1 GHz, restricted bands
ETSI < -47 dBm
f < 1 GHz, restricted bands
FCC < -55 dBm
f > 1 GHz, including
harmonics < –42 dBm
Harmonics(1) Second harmonic < -42 dBm
Third harmonic < -42 dBm
IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps)
Error vector
magnitude +5 dBm setting 2 %
(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2
(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).
(2) To ensure margins for passing FCC band edge requirements at 2483.5 MHz, a lower than maximum output-power setting or less than
100% duty cycle may be used when operating at 2480 MHz.
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8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
When measured on the CC26x2RBEM-7ID reference design with Tc = 25 °C, VDDS = 3.0 V, fRF = 2440 MHz with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX
path.
All measurements are performed conducted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Receiver sensitivity PER = 1% –100 dBm
Receiver saturation PER = 1% > 5 dBm
Adjacent channel rejection Wanted signal at –82 dBm, modulated interferer at
±5 MHz, PER = 1% 36 dB
Alternate channel rejection Wanted signal at –82 dBm, modulated interferer at
±10 MHz, PER = 1% 57 dB
Channel rejection, ±15 MHz or
more
Wanted signal at –82 dBm, undesired signal is IEEE
802.15.4 modulated channel, stepped through all
channels 2405 to 2480 MHz, PER = 1%
59 dB
Blocking and desensitization,
5 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 57 dB
Blocking and desensitization,
10 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 63 dB
Blocking and desensitization,
20 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 63 dB
Blocking and desensitization,
50 MHz from upper band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 66 dB
Blocking and desensitization,
–5 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 60 dB
Blocking and desensitization,
–10 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 60 dB
Blocking and desensitization,
–20 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 63 dB
Blocking and desensitization,
–50 MHz from lower band edge
Wanted signal at –97 dBm (3 dB above the
sensitivity level), CW jammer, PER = 1% 64 dB
Spurious emissions, 30 MHz to
1000 MHz Measurement in a 50-Ω single-ended load –66 dBm
Spurious emissions, 1 GHz to
12.75 GHz Measurement in a 50-Ω single-ended load –53 dBm
Frequency error tolerance Difference between the incoming carrier frequency
and the internally generated carrier frequency > 350 ppm
Symbol rate error tolerance Difference between incoming symbol rate and the
internally generated symbol rate > 1000 ppm
RSSI dynamic range 95 dB
RSSI accuracy ±4 dB
8.14 Timing and Switching Characteristics
8.14.1 Reset Timing
PARAMETER MIN TYP MAX UNIT
RESET_N low duration 1 µs
8.14.2 Wakeup Timing
Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not
include software overhead.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MCU, Reset to Active(1) 850 - 4300 µs
MCU, Shutdown to Active(1) 850 - 4300 µs
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8.14.2 Wakeup Timing (continued)
Measured over operating free-air temperature with VDDS = 3.0 V (unless otherwise noted). The times listed here do not
include software overhead.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MCU, Standby to Active 160 µs
MCU, Active to Standby 36 µs
MCU, Idle to Active 14 µs
(1) The wakeup time is dependent on remaining charge on VDDR capacitor when starting the device, and thus how long the device has
been in Reset or Shutdown before starting up again.
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