Texas Instruments C2000 Piccolo LaunchPad Installation guide

C2000 Digital Power Supply
Workshop
Texas Instruments
Technical Training
Copyright © 2008 Texas Instruments. All rights reserved.
D SP
TEXAS INSTRUMENTS
TECHNOLOGY

Introduction to Digital Power Supply Design
What is a Digital Power Supply?
Why use Digital Control
Techniques?
Peripherals used for Digital Power
Supply Design
Development Tools and Software

What is Digital Power?
Generic Power System Block Diagram
The controller block is what differentiates between a digital
power system and a conventional analog power system
Switches
(FETs)
LC
Network
Controller
(Compensator)
Vout
PWM
Vin

Why Digital Control Techniques?
Controller
Analog
or
Digital ??
PWM
Sensor(s)
Bandwidth limitations (sampling loop)
PWM frequency and resolution limits
Numerical problems (quantization, rounding,…)
AD / DA boundary (resolution, speed, cost)
CPU performance limitations
Bias supplies, interface requirements
Component drift and aging / unstable
Component tolerances
Hardwired / not flexible
Limited to classical control theory only
Large parts count for complex systems
Insensitive to environment (temp, drift,…)
High reliability
S/w programmable / flexible solution
Precise / predictable behavior
Advanced control possible (non-linear, multi-variable)
Can perform multiple loops and “other” functions
High bandwidth
High resolution
Easy to understand / use
Historically lower cost
+
Digital ControllerAnalog Controller
Power Elec.

Benefits of Digital Control
Eliminate Components
PFC
Filter
Bridge V
VDC/DC
Aux P/S
Output
Multiple chips for
control
Micro-controller for
supervisory
Dedicated design
Traditional Analog
Power Supply
VPFC
Filter
Bridge V
V
Aux P/S
V
DC/DC
Converter
Control
Multi-mode
Power control
MCU Supervisory
ousekeeping
Circuits
Current/Load
Sharing
Control
DC/DC V
To ost
PFC Control
Interface
Circuit
Monitor
(MCU?)
Inrush/
ot-plug
Control
IIIIOutput
PFC Control
Interface
Circuit
Monitor
(MCU)
Inrush/
ot-plug
Control
DC/DC
Converter
Control
Multi-mode
Power control
MCU Supervisory
ousekeeping
Circuits
Current/Load
Sharing
Control
Reduce Manufacturing Cost
Variable DC Output
Better Performance Across Corners
Failure Prediction
One Device, Multiple DC Outputs
One Design, Multiple Supplies
Digital controller enables multi-threaded applications
84
51

Analog Control System








+
+
=sCR
sCR
R
R
sC
22
11
1
2
1
1
)(
)()(
)()()(
01
2
2
2
3
3
tftyk
dt
tdy
k
dt
tyd
k
dt
tyd =+++
Differential equations
1st , 2nd , 3rd ,…order
eed to find:
R1, R2, C1, C2
Laplace Transform
“Analog Computation”
Differential equations

Digital Control System
)()1()2(
)1()2()(
012
12
nEbnEbnEb
nUanUanU
⋅+−⋅+−⋅
+
−
⋅
+
−
⋅
=
)()()( nWnRnEwhere
−
=
Κ
)()(
)()()(
01
2
2
2
3
3
tftyk
dt
tdy
k
dt
tyd
k
dt
tyd =+++
Differential equations
1st , 2nd , 3rd ,…order
Difference equation
eed to find:
a1, a2, b0, b1, b2
Laplace Transform
Z Transform
OR

Time Sampled Systems

Processor Bandwidth
Sample Freq (=PWM) Sample Period
(kHz) (ns)
100 10000
300 3333
500 2000
700 1429
1000 1000
1500 667
2000 500

Time Division Multiplexing (TDM)
Control Code (C2)
Processor 2 ControlControl Code
y(n)
x(n)
Control Code (C1)
Processor 1 ControlControl Code
Control Code (C3)
Processor 3 ControlControl Code
Single CPU C1 C2 C3 C1 C2 C3 C1 C2 C3
TSAMPLE

Digitally Controlled Power Supply
DAC
(PWM)
ADC
DSC
0110101100
1011011101
0010100111
“Plant”
“High fidelity”
Translation boundary

System Mapping

Fast program execution out of both RAM and
Flash memory
85 MIPS with Flash Acceleration Technology
100 MIPS out of RAM for time-critical code
Memory Sub-System
Up to 6 ePWM, 4 eCAP, and 2 eQEP
Ultra-Fast 12-bit ADC
6.25 MSPS throughput
Dual sample&holds enable simultaneous sampling
Auto Sequencer, up to 16 conversions w/o CPU
Control Peripherals
Multiple standard communication ports provide
simple interfaces to other components
Communications Ports
100MIPS performance
Single cycle 32 x32-bit MAC (or dual 16 x16 MAC)
Very Fast Interrupt Response
Single cycle read-modified-write
High Performance DSP (C28xTM Core)
Memory Bus
64Kw Flash
+ 1Kw OTP
4Kw
Boot
ROM
18Kw
RAM
Code security
32-bit
Register
File
Real-Time
JTAG
32-bit
Timers (3)
100 MIPs C28xTM 32-bit DSP
32x32-bit
Multiplier
R

M

W
Atomic
ALU
Interrupt Management
ePWM
eCAP
eQEP
12-bit ADC
Watchdog
CAN 2.0 B
I2C
SCI
SPI
GPIO
Peripheral Bus
Datasheet available at: http://www-s.ti.com/sc/ds/tms320f2808.pdf
TMS320F280x

Single-cycle 32-bit multiplier makes
computationally intensive control
algorithms more efficient
Three 32-bit timers support multiple
control loops / time bases
Single cycle read-modified-write in any
memory location and 32-bit registers
improve control algorithm efficiency
Real-time JTAG debug shortens
development cycle
Fast & flexible interrupt management
significantly reduce interrupt latency
C28xTM DSP Core
C28xTM 32-bit DSP
Interrupt Management
32-bit
Register
File
Real-Time
JTAG
32-bit
Timers (3)
32x32 bit
Multiplier
R

M

W
Atomic
ALU
Efficient 32-bit Processor Capability
# Instructions vs PWM
MIPS = Million Instruction Per Second
PWM freq. PWM per. Processor MIPS
(kHz) (µ
µµ
µs) 100 150
50 20.0 2000 3000
100 10.0 1000 1500
200 5.0 500 750
250 4.0 400 600
300 3.3 333 500
500 2.0 200 300
750 1.3 133 200
1000 1.0 100 150
Control Code spare
T
PWM
CPU Control
PWM
Control Code spare

ePWM “DAC” Capability
Control Peripherals
ePWM
ePWM
Number of channels scalable
and resources allocated per
channel
Two independent PWM outputs
per module
Dedicated time-base timer
Two independent compare
registers
Multi-event driven waveform
Trip zones and event interrupts
F2808 offers 6 modules
Provides ePWM DAC capability
for DPS
Switching can be programmed
as Asymmetric or Symmetric
PWM
High-Resolution PWM mode
Time-Base
Counter
Compare
Action
Qualifier
Dead
Band
PWM
Chop
Trip
Zone
Event
Trig.
& Int.
EPWMxA
EPWMxB
PWM effective resolution (CPU=100MHz)
PWM Standard PWM
(kHz) bits % bits %
50 11.0 0.05 17.0 0.0007
100 10.0 0.10 16.0 0.0015
150 9.4 0.15 15.4 0.0022
250 8.6 0.25 14.7 0.0037
500 7.6 0.50 13.7 0.0075
750 7.1 0.75 13.1 0.0112
1000 6.6 1.00 12.7 0.0150
HR-PWM

Control Peripherals
Fast & Flexible
12-bit 16-Channel ADC
6.25 MSPS throughput
Dual sample/hold enable
simultaneous sampling or
sequencing sampling modes
Analog input: 0V to 3V
16 channel, multiplexed inputs
Auto Sequencer supports up to 16
conversions without CPU
intervention
Sequencer can be operated as two
independent 8-state sequencers or
as one large 16-state sequencer
Sixteen result registers (individually
addressable) to store conversion
values
12-bit ADC Capability
8 ADC
Inputs Result
Registers
16 words
Analog
MUX
Prescaler
S/H
A
12-bit
ADC
Module
8 ADC
Inputs
SYSCLK
Start of
Conversion Auto Sequencer
ADC
S/H
B
Analog
MUX
ADC Utilization:
# Channels (“Loops”) vs. PWM frequency
MSPS = 3 MSPS = 6.25
PWM # Channels PWM # Channels
(kHz) (kHz)
125 24 125 50
250 12 250 25
500 6500 13
750 4750 8
1000 31000 6

Code Composer Studio
Project Manager:
Source & object files
File dependencies
Compiler, Assembler &
Linker build options
Full C/C++ & Assembly
Debugging:
C & ASM Source
Mixed mode
Disassembly (patch)
Set Break Points
Set Probe Points
Editor:
Structure Expansion
Help CPU Window
Memory Window
Graph
Window
Status
Window
Watch Window
Menus or Icons

Software Library Approach
DPS software libraries available at: www.ti.com/dpslib

Modular Software Architecture
“Signal Net” based module connectivity
// pointer & Net declarations
Int *In1A, *In1B, *Out1, *In2A,...
Int Net1, Net2, Net3, Net4,...
// “connect” the modules
In1A=&Net1; In1B=&Net2; In2A=&Net3; In3A=&Net4; // inputs
Out4=&Net8; Out5=&Net9; // outputs
Out1=&Net5; In4A=&Net5; // Net5
Out2=&Net6; In4B=&Net6; // Net6
Out3=&Net7; In4C=&Net7; In5A=&Net7; // Net7
; Execute the code
f1
f2
f3
f4
f5
Initialization time
Run time - ISR

Peripheral Drivers
Depends on:
• PWM frequency
• System clock frequency
Depends on:
• # ADC bits (10 / 12 ?)
• Unipolar, Bipolar ?
• Offset ?
CPU dependency only:
• Math / algorithms
• Per-Unit math (0-100%)
• Independent of Hardware
// pointer & Net declarations
int *CNTL_Ref1, *CNTL_Fdbk1, *CNTL_Out1;
int *BUCK_In1, *ADC_Rslt1;
int Vref, Duty, Vout;
// “connect” the modules
CNTL_Ref1 = &Vref;
CNTL_Out1 = &Duty; BUCK_In1 = &Duty;
CNTL_Fdbk1 = &Vout; ADC_Rslt1 = &Vout;