Texas Instruments Tiva TM4C123GH6PM User manual

Copyright © 2011-2013
Texas Instruments Incorporated
ROM-TM4C123GH6PM-UG-750
ROM USER’S GUIDE
Tiva™ TM4C123GH6PM

Copyright
Copyright © 2011-2013 Texas Instruments Incorporated. All rights reserved. Tiva and TivaWare are trademarks of Texas Instruments Instruments. ARM
and Thumb are registered trademarks and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semicon-
ductor products and disclaimers thereto appears at the end of this document.
Texas Instruments
108 Wild Basin, Suite 350
Austin, TX 78746
www.ti.com/tiva-c
Revision Information
This is version 750 of this document, last updated on April 8, 2013.
2 April 8, 2013

Table of Contents
Table of Contents
Copyright ..................................................... 2
Revision Information ............................................... 2
1 Introduction ................................................. 5
2 Boot Loader ................................................. 7
2.1 Introduction .................................................. 7
2.2 Serial Interfaces ............................................... 7
2.3 USB Interface ................................................ 12
3 AES Data Tables .............................................. 27
3.1 Introduction .................................................. 27
3.2 Data Structures ............................................... 27
4 Analog Comparator ............................................ 29
4.1 Introduction .................................................. 29
4.2 Functions ................................................... 29
5 Analog to Digital Converter (ADC) .................................... 35
5.1 Introduction .................................................. 35
5.2 Functions ................................................... 35
6 Controller Area Network (CAN) ...................................... 53
6.1 Introduction .................................................. 53
6.2 Functions ................................................... 54
7 CRC ...................................................... 69
7.1 Introduction .................................................. 69
7.2 Functions ................................................... 69
8 Flash ..................................................... 73
8.1 Introduction .................................................. 73
8.2 Functions ................................................... 73
9 Floating-Point Unit (FPU) ......................................... 81
9.1 Introduction .................................................. 81
9.2 API Functions ................................................ 82
10 GPIO ..................................................... 87
10.1 Introduction .................................................. 87
10.2 Functions ................................................... 87
11 Hibernation Module ............................................ 107
11.1 Introduction .................................................. 107
11.2 Functions ................................................... 108
12 Inter-Integrated Circuit (I2C) ....................................... 123
12.1 Introduction .................................................. 123
12.2 Functions ................................................... 124
13 Interrupt Controller (NVIC) ........................................ 137
13.1 Introduction .................................................. 137
13.2 Functions ................................................... 137
14 Memory Protection Unit (MPU) ...................................... 145
14.1 Introduction .................................................. 145
14.2 Functions ................................................... 146
15 Pulse Width Modulator (PWM) ...................................... 153
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Table of Contents
15.1 Introduction .................................................. 153
15.2 Functions ................................................... 153
16 Quadrature Encoder (QEI) ........................................ 175
16.1 Introduction .................................................. 175
16.2 Functions ................................................... 175
17 Synchronous Serial Interface (SSI) ................................... 185
17.1 Introduction .................................................. 185
17.2 Functions ................................................... 185
18 System Control ............................................... 197
18.1 Introduction .................................................. 197
18.2 Functions ................................................... 198
19 System Exception Module ........................................ 223
19.1 Introduction .................................................. 223
19.2 API Functions ................................................ 223
20 System Tick (SysTick) ........................................... 227
20.1 Introduction .................................................. 227
20.2 Functions ................................................... 227
21 Timer ..................................................... 231
21.1 Introduction .................................................. 231
21.2 Functions ................................................... 231
22 UART ..................................................... 249
22.1 Introduction .................................................. 249
22.2 Functions ................................................... 249
23 uDMA Controller .............................................. 271
23.1 Introduction .................................................. 271
23.2 Functions ................................................... 273
24 USB Controller ............................................... 297
24.1 Introduction .................................................. 297
24.2 Using USB with the uDMA Controller ................................... 298
24.3 Functions ................................................... 302
25 Watchdog Timer .............................................. 341
25.1 Introduction .................................................. 341
25.2 Functions ................................................... 341
IMPORTANT NOTICE ............................................... 352
4 April 8, 2013

Introduction
1 Introduction
The TM4C123GH6PM ROM contains the TivaWare™ Peripheral Driver Library and the TivaWare
Boot Loader. The peripheral driver library can be utilized by applications to reduce their flash
footprint, allowing the flash to be used for other purposes (such as additional features in the appli-
cation). The boot loader is used as an initial program loader (when the flash is empty) as well as
an application-initiated firmware upgrade mechanism (by calling back to the boot loader).
There is a table at the beginning of the ROM that points to the entry points for the APIs that are
provided in the ROM. Accessing the API through these tables provides scalability; while the API
locations may change in future versions of the ROM, the API tables will not. The tables are split
into two levels; the main table contains one pointer per peripheral which points to a secondary table
that contains one pointer per API that is associated with that peripheral. The main table is located
at 0x0100.0010, right after the Cortex-M4 vector table in the ROM.
The following table shows a small portion of the API tables in a graphical form that helps to illustrate
the arrangement of the tables:
ROM_APITABLE (at 0x0100.0010)
[0] = ROM_VERSION
[1] = pointer to ROM_UARTTABLE
[2] = pointer to ROM_SSITABLE
[3] = pointer to ROM_I2CTABLE
[4] = pointer to ROM_GPIOTABLE =⇒ROM_GPIOTABLE
[5] = pointer to ROM_ADCTABLE [0] = pointer to ROM_GPIOPinWrite
[6] = pointer to ROM_COMPARATORTABLE [1] = pointer to ROM_GPIODirModeSet
[7] = pointer to ROM_FLASHTABLE [2] = pointer to ROM_GPIODirModeGet
... ...
From this, the address of the ROM_GPIOTABLE table is located in the memory location at
0x0100.0020. The address of the ROM_GPIODirModeSet() function is contained at offset 0x4
from that table. In the function documentation, this is represented as:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_GPIOTABLE is an array of pointers located at ROM_APITABLE[4].
ROM_GPIODirModeSet is a function pointer located at ROM_GPIOTABLE[1].
The TivaWare Peripheral Driver Library contains a file called driverlib/rom.h that assists with
calling the peripheral driver library functions in the ROM. The naming conventions for the tables
and APIs that are used in this document match those used in that file.
The following is an example of calling the ROM_GPIODirModeSet() function:
#define TARGET_IS_BLIZZARD_RB1
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_memmap.h"
#include "driverlib/gpio.h"
#include "driverlib/rom.h"
int
main(void)
{
// ...
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Introduction
ROM_GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT);
// ....
}
See the “Using the ROM” chapter of the TivaWare Peripheral Driver Library User’s Guide for more
details on calling the ROM functions and using driverlib/rom.h.
The API provided by the ROM can be utilized by any compiler so long as it complies with the
Embedded Applications Binary Interface (EABI), which includes all recent compilers for the Cortex-
M4 microcontroller.
Documentation Overview
The ROM-based TivaWare Boot Loader is described in chapter 2, and the ROM-based TivaWare
Peripheral Driver Library is described in chapters 3through 25.
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Boot Loader
2 Boot Loader
Introduction ...............................................................................................7
Serial Interfaces ...........................................................................................7
USB .....................................................................................................12
2.1 Introduction
The ROM-based boot loader is executed each time the device is reset when the flash is empty.
The flash is assumed to be empty if the first two words are all ones (since the second word is the
reset vector address, it must be programmed for an application in flash to execute). When run, it
will allow the flash to be updated using one of the following interfaces:
UART0 using a custom serial protocol
SSI0 using a custom serial protocol
I2C0 using a custom serial protocol
USB using DFU protocol
The USB portion of the boot loader must run with the main PLL enabled which requires not only
that the boot loader detect if a crystal is present, but also determine the frequency of the attached
crystal to properly configure the main PLL. This crystal detection algorithm is only run when the
boot loader does not find a valid application and is not run when the boot loader is called from an
application. The device is configured to run from the PLL when there is a valid external crystal for
USB operation as specified in the data sheet.
The LM Flash Programmer GUI can be used to download an application via the boot loader over
the UART or USB interface on a PC. The LM Flash Programmer utility is available for download
from www.ti.com/tiva-c.
2.2 Serial Interfaces
The serial interfaces used to communicate with the boot loader share a common protocol and differ
only in the physical connections and signaling used to transfer the bytes of the protocol.
2.2.1 UART Interface
The UART pins U0Tx and U0Rx are used to communicate with the boot loader. The device com-
municating with the boot loader is responsible for driving the U0Rx pin, while the microcontroller
drives the U0Tx pin.
The serial data format is fixed at 8 data bits, no parity, and one stop bit. An auto-baud feature is
used to determine the baud rate at which data is transmitted. Because the system clock must be at
least 32 times the baud rate, the maximum baud rate that can be used is 500 Kbaud (which is 16
MHz divided by 32).
When an application calls back to the ROM-based boot loader to start an update over the UART
port, the auto-baud feature is bypassed, along with UART configuration and pin configuration.
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Boot Loader
Therefore, the UART must be configured and the UART pins switched to their hardware function
before calling the boot loader.
2.2.2 SSI Interface
The SSI pins SSIFss,SSIClk,SSITx, and SSIRx are used to communicate with the boot loader.
The device communicating with the boot loader is responsible for driving the SSIRx,SSIClk, and
SSIFss pins, while the microcontroller drives the SSITx pin.
The serial data format is fixed to the Motorola format with SPH set to 1 and SPO set to 1 (see the
data sheet for more information on this format). Since the system clock must be at least 12 times
the serial clock rate, the maximum serial clock rate that can be used is 1.3 MHz (which is 16 MHz
divided by 12).
When an application calls back to the ROM-based boot loader to start an update over the SSI port,
the SSI configuration and pin configuration is bypassed. Therefore, the SSI port must be configured
and the SSI pins switched to their hardware function before calling the boot loader.
2.2.3 I2C Interface
The I2C pins I2CSCL and I2CSDA are used to communicate with the boot loader. The device
communicating with the boot loader must operate as the I2C master and provide the I2CSCL signal.
The I2CSDA pin is open-drain and can be driven by either the master or the slave I2C device.
The I2C interface can run at up to 400 KHz, the maximum rate supported by the I2C protocol. The
boot loader uses an I2C slave address of 0x42.
When an application calls back to the ROM-based boot loader to start an update over the I2C port,
the I2C configuration and pin configuration is bypassed. Therefore, the I2C port must be configured,
the I2C slave address set, and the I2C pins switched to their hardware function before calling the
boot loader. Additionally, the I2C master must be enabled since it is used to detect start and stop
conditions on the I2C bus.
2.2.4 Serial Protocol
The boot loader uses well-defined packets on the serial interfaces to ensure reliable communica-
tions with the update program. The packets are always acknowledged or not acknowledged by the
communicating devices. The packets use the same format for receiving and sending packets. This
includes the method used to acknowledge successful or unsuccessful reception of a packet. While
the actual signaling on the serial ports is different, the packet format remains independent of the
method of transporting the data.
The following steps must be performed to successfully send a packet:
1. Send the size of the packet that will be sent to the device. The size is always the number of
bytes of data + 2 bytes.
2. Send the checksum of the data buffer to help ensure proper transmission of the command.
The checksum is simply a sum of the data bytes.
3. Send the actual data bytes.
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Boot Loader
4. Wait for a single-byte acknowledgment from the device that it either properly received the data
or that it detected an error in the transmission.
The following steps must be performed to successfully receive a packet:
1. Wait for non-zero data to be returned from the device. This is important as the device may
send zero bytes between a sent and received data packet. The first non-zero byte received
will be the size of the packet that is being received.
2. Read the next byte which will be the checksum for the packet.
3. Read the data bytes from the device. There will be packet size - 2 bytes of data sent during
the data phase. For example, if the packet size was 3, then there is only 1 byte of data to be
received.
4. Calculate the checksum of the data bytes and ensure that it matches the checksum received
in the packet.
5. Send an acknowledge (ACK) or not-acknowledge (NAK) to the device to indicate the success-
ful or unsuccessful reception of the packet.
An acknowledge packet is sent whenever a packet is successfully received and verified by the boot
loader. A not-acknowledge packet is sent whenever a sent packet is detected to have an error,
usually as a result of a checksum error or just malformed data in the packet. This allows the sender
to re-transmit the previous packet.
The following commands are used by the custom protocol:
COMMAND_PING
= 0x20
This command is used to receive an acknowledge from the boot
loader indicating that communication has been established. This
command is a single byte.
The format of the command is as follows:
uint8_t pui8Command[1];
pui8Command[0] = COMMAND_PING;
April 8, 2013 9

Boot Loader
COMMAND_DOWNLOAD
= 0x21
This command is sent to the boot loader to indicate where
to store data and how many bytes will be sent by the
COMMAND_SEND_DATA commands that follow. The command
consists of two 32-bit values that are both transferred MSB first.
The first 32-bit value is the address to start programming data
into, while the second is the 32-bit size of the data that will be
sent. This command also triggers a mass erase of the flash,
which causes the command to take longer to send the ACK/NAK
in response to the command. This command should be followed
by a COMMAND_GET_STATUS to ensure that the program ad-
dress and program size were valid for the microcontroller running
the boot loader.
The format of the command is as follows:
uint8_t pui8Command[9];
pui8Command[0] = COMMAND_DOWNLOAD;
pui8Command[1] = Program Address [31:24];
pui8Command[2] = Program Address [23:16];
pui8Command[3] = Program Address [15:8];
pui8Command[4] = Program Address [7:0];
pui8Command[5] = Program Size [31:24];
pui8Command[6] = Program Size [23:16];
pui8Command[7] = Program Size [15:8];
pui8Command[8] = Program Size [7:0];
COMMAND_RUN
= 0x22
This command is sent to the boot loader to transfer execution
control to the specified address. The command is followed by a
32-bit value, transferred MSB first, that is the address to which
execution control is transferred.
The format of the command is as follows:
uint8_t pui8Command[5];
pui8Command[0] = COMMAND_RUN;
pui8Command[1] = Run Address [31:24];
pui8Command[2] = Run Address [23:16];
pui8Command[3] = Run Address [15:8];
pui8Command[4] = Run Address [7:0];
10 April 8, 2013