Texas Instruments TAS5132DDV6EVM User manual

User's GuideSLLU096A – February 2007 – Revised March 2007
TAS5132DDV6EVM
This user’s guide describes the operation of the evaluation module for the TAS5132Digital Amplifier Power Output Stage using the TAS5086 Digital Audio PWM Processorfrom Texas Instruments. The document also provides measurement data and designinformation including the schematic, the bill of materials, and the PCB layout.
Contents1 Overview ............................................................................................. 22 Quick Setup Guide ................................................................................. 43 Protection ............................................................................................ 64 TAS5132DDV6EVM Performance ................................................................ 75 Relevant Texas Instruments Data Sheets ..................................................... 21Appendix A Design Documents ...................................................................... 23
List of Figures
1 Integrated PurePath Digital™ Amplifier System ................................................ 32 Physical Structure for TAS5132DDV6EVM (Approximate Layout) ........................... 43 TAS5086 GUI Window ............................................................................. 64 THD+N vs Power (SE – 3 Ω)..................................................................... 95 THD+N vs Power (SE – 4 Ω).................................................................... 106 THD+N vs Power (BTL – 6 Ω)................................................................... 107 THD+N vs Power (BTL –8 Ω)................................................................... 118 THD+N vs Frequency (SE – 3 Ω)............................................................... 119 THD+N vs Frequency (SE – 4 Ω)............................................................... 1210 THD+N vs Frequency (BTL – 6 Ω)............................................................. 1211 THD+N vs Frequency (BTL – 8 Ω)............................................................. 1312 FFT Spectrum With –60-dBFS Tone (SE) ..................................................... 1313 FFT Spectrum With –60-dBFS Tone (BTL) .................................................... 1414 Idle Noise FFT Spectrum (SE) .................................................................. 1415 Idle Noise FFT Spectrum (BTL) ................................................................. 1516 Channel Separation (1-2) ........................................................................ 1517 Channel Separation (4-5) ........................................................................ 1618 Channel Separation (5-6) ........................................................................ 1619 Frequency Response (SE) ....................................................................... 1720 Frequency Response (BTL) ..................................................................... 1721 High-Current Protection (SE) .................................................................... 1822 High-Current Protection (BTL) ................................................................... 1823 Pop/Click (SE) Time Domain .................................................................... 1924 Pop/Click (SE) FFT (V
REF
= 5.49 Vrms) ........................................................ 1925 Pop/Click (BTL) Time Domain ................................................................... 2026 Pop/Click (BTL) FFT (V
REF
= 11.19 Vrms) ..................................................... 2127 Output Stage Efficiency .......................................................................... 21
List of Tables
1 TAS5132DDV6EVM Specification ................................................................ 22 Recommended Supply Voltages ................................................................. 5
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1 Overview
Overview
3 TAS5132 Warning/Error Signal Decoding ....................................................... 74 General Test Conditions ........................................................................... 75 TAS5086 Register Settings ....................................................................... 76 Electrical Data ....................................................................................... 87 Audio Performance ................................................................................. 88 Thermal Specification .............................................................................. 89 Physical Specifications ............................................................................. 9
The TAS5132DDV6EVM PurePath Digital ™customer evaluation module demonstrates the integratedcircuits TAS5132DDV and TAS5086DBT from Texas Instruments (TI).
The TAS5132 is an integrated stereo digital amplifier power stage with an advanced protection system.The TAS5132 is capable of driving a 6- Ωbridge-tied load at up to 25 W per channel with low integratednoise at the output, low THD+N, and low idle power dissipation.
The TAS5086 is a six-channel digital pulse-width modulator (PWM) that provides advanced performanceand a high level of system integration. The TAS5086 is designed to interface seamlessly with most audiodigital signal processors and MPEG decoders, accepting a wide range of input data and clock formats.
This EVM is configured with four single-ended (SE) channels and two bridge-tied load (BTL) channels forcenter and subwoofer channel.
Together with a TI input-USB board, this EVM is a complete 5.1-channel digital audio amplifier systemwhich includes digital input (S/PDIF), analog inputs, interface to PC, and DAP features like digital volumecontrol, input and output multiplexers, and automute. A configuration option is available for power-stagefailure protection.
Table 1. TAS5132DDV6EVM Specification
Key Parameters
Output stage supply voltage 0 V – 18 VSystem supply Voltage 15 V – 20 VNumber of channels 4x SE, 2x BTLLoad impedance SE 3 Ω– 4 ΩLoad impedance BTL 6 Ω– 8 ΩOutput power SE 9 W/ 4 Ω/ 10% THD or 12.5 W/ 3 Ω/ 10% THDOutput power BTL 20 W/ 8 Ω/ 10% THD or 26 W/ 6 Ω/ 10% THDDNR >105 dBPWM processor TAS5086DBTOutput stage TAS5132DDV
PurePath Digital is a trademark of Texas Instruments.Windows is a trademark of Microsoft Corporation.
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1.1 TAS5132DDV6EVM Features
8 Channel
Analog Input
USB
Interface
I2C Bus
Control Interface
I2S Bus
Channel 1 (SE)
Channel 2 (SE)
POWER SUPPLY
TAS5132
TAS5086
TAS5132
TAS5132DDV6EVM Module
Input-USB Board
Optical
and
Coaxial
S/PDIF Input
Channel 3 (SE)
Channel 4 (SE)
Channel 5 (BTL)
Channel 6 (BTL)
Overview
This 5.1-channel system is designed for home theater applications such as DVD receivers, DVDmini-component systems or home theater in a box (HTIB), and LCD TVs.
This document covers EVM specifications, audio performance, and power-efficiency measurement graphs,and design documentation that includes schematics, parts list, layout, and mechanical design.
Gerber (layout) files are available on the TI Web site at www.ti.com .
The EVM is delivered with cables and an input-USB board for connection to an input source and forcontrol by a personal computer.
•6-channel PurePath Digital™ evaluation module (double-sided, plated-through PCB layout).•Self-contained protection system (short circuit and thermal).•Standard I
2
S and I
2
C/control connector for TI input board•Double-sided, plated-through PCB layout.
Figure 1. Integrated PurePath Digital™ Amplifier System
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1.2 PCB Key Map
SPEAKER OUTPUTS
4-CHANNEL
POWER STAGE
TAS5132
INPUT SIGNAL
INTERFACE (J60)
CONTROL
INTERFACE (J40)
TAS5086
3.3 V
Regulator
2-CHANNEL
POWER STAGE
TAS5132
J101 J102 J103 J104 J105 J106
5 V
Regulator
Gate Drive
Regulator
PSU
INTERFACE
(J901)
BTL
SE
2 Quick Setup Guide
2.1 Electrostatic Discharge Warning
Quick Setup Guide
Physical structure for the TAS5132DDV6EVM is illustrated in Figure 2 .
Figure 2. Physical Structure for TAS5132DDV6EVM (Approximate Layout)
This section describes the TAS5132DDV6EVM board in regards to power supplies and system interfaces.It provides information regarding handling and unpacking, absolute operating conditions, and a descriptionof the factory default switch and jumper configuration.
This section also provides a step-by-step guide to configuring the TAS5132DDV6EVM for deviceevaluation.
Many of the components on the TAS5132DDV6EVM are susceptible to damage by electrostatic discharge(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handlingthe EVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures can result in damage to EVMcomponents.
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2.2 Unpacking the EVM
2.3 Power Supply Setup
2.4 Speaker Connection
Quick Setup Guide
On opening the TAS5132DDV6EVM package, ensure that the following items are included:•1 pc. TAS5132DDV6EVM board using one TAS5086DBT and two TAS5132DDV.•1 pc. TI Input-USB board for interfacing TAS5132DDV6EVM with SPDIF/analog sources and PC forcontrol.
•1 pc. Signal interface IDC cable for connection to an I
2
S front-end like the attached TI Input-USBboard.
•1 pc. Control interface IDC cable for connection to an I
2
C front-end like the attached TI Input-USBboard.
•1 pc Cable for connecting Input-USB board to a USB port on a PC for TAS5086 control by software.•1 pc. Power supply cable for two regulated power supplies (H-bridge and system supply).•1 pc. PurePath CD-ROM
If any of these items is missing, contact the Texas Instruments Product Information Center nearest you toinquire about a replacement.
Connect Input-USB board to TAS5132DDV6EVM using the two delivered IDC cables.
To power up the EVM, two power supplies are needed. One for system power, logic, and gate-drive, andone for output stage supply. Power supplies are connected to the EVM using delivered power cablered/black, white/black.
A single 15-V to 18-V power supply can be used if the user connects black/black to GND and red/white to15/18 V.
Table 2. Recommended Supply Voltages
Description Voltage Limitations Current Requirement Cable
System power supply 15 V – 20 V 0.3 A Red/blackOutput stage power supply 0 V – 18 V 2 A White/black
CAUTION
Applying voltages above the limitations given in Table 2 can cause permanentdamage to your hardware
Note: The length of power supply cable must be minimized. Increasing length of PSU cable isequal to increasing the distortion for the amplifier at high output levels and lowfrequencies.
CAUTION
Both positive and negative speaker outputs are floating and may not beconnected to ground (e.g., through an oscilloscope)
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2.5 GUI Software Installation
3 Protection
Protection
The TAS5086 GUI provides easy control of all registers in TAS5086. To install the GUI, run the setup filefrom the PurePath CD-ROM.
After installation, turn on the power supplies and connect the USB cable to the Input-USB board.
Start the GUI program from Windows™ menu. Start-up of the GUI takes a few seconds.
Figure 3. TAS5086 GUI Window
From the files menu, load the configuration file:TAS5132DDV6EVM Configuration (2.00).cfg
The file is located on the PurePath CD-ROM. This file contains all settings for a default setup of the EVM.
For easy access of the file, it is recommended to copy the files into a directory where the GUI is installed.Default is C:\Program Files\Texas Instruments Inc\TAS5086\
For more advanced use of the GUI, see the GUI User’s Guide and the TAS5086 data sheet (SLES131 ).
This section describes the short-circuit protection and fault-reporting circuitry of the TAS5132 device.
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3.1 Short-Circuit Protection and Fault-Reporting Circuitry
3.2 Fault Reporting
4 TAS5132DDV6EVM Performance
TAS5132DDV6EVM Performance
The TAS5132 is a self-protecting device that provides fault reporting (including high-temperatureprotection and short-circuit protection). TAS5132 is configured in back-end auto-recovery mode andtherefore resets automatically after all errors (M1, M2, and M3 are set low); see the TAS5086 data sheetfor further explanation. This mean that the device restarts itself after an error occasion and reports shortlythrough the SD error signal.
The OTW and SD outputs from TAS5132 indicate fault conditions. See the TAS5132 data sheet(SLES190 ) for a description of these pins.
Table 3. TAS5132 Warning/Error Signal Decoding
OTW SD Device Condition
0 0 High-temperature error and/or high-current error0 1 High-temperature warning1 0 Undervoltage lockout or high-current error1 1 Normal operation, no errors/warnings
The temperature warning signals at the TAS5132DDV6EVM board are wired-OR to one temperaturewarning signal ( OTW– pin 22 in control interface connector). Shutdown signals are wired-OR into oneshutdown signal ( SD– pin 20 in control interface connector).
The shutdown signals together with the temperature warning signal give chip state information asdescribed in Table 3 . Device fault reporting outputs are open-drain outputs.
Table 4. General Test Conditions
General Test Conditions Notes
Output stage supply voltage: 18 V Laboratory power supply (EA-PS 7065-10A)System supply voltage: 15 VLoad impedance SE: 4 ΩLoad impedance BTL: 8 ΩInput signal 1-kHz sineSampling frequency 48 kHzGain setting in TAS5086 0 dBMeasurement filter AES17TI input-USB board Input-USB Rev 10EVM configuration file Version 2.00 TAS5132DDV6EVM configuration (2.00).cfg
Table 5. TAS5086 Register Settings
(1)
Register Register Value Notes
Oscillator trim register 0x1B 00 Initiate factory trimSplit-capacitor register 0x1A 1C Set split-capacitor charge period to 4160 msMaster volume register 0x07 30 Master volume set to 0 dBModulation limit register 0x10 04 Modulation index set to 96.1%0x18 Channel 1-4 set to start part 2PWM start register 30
Channel 5-6 set to start part 1
(1)
These register settings are used for all test, unless otherwise specified.
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TAS5132DDV6EVM Performance
Table 5. TAS5086 Register Settings (continued)
Register Register Value Notes
Input multiplexer register 0x20 00 01 23 45Output multiplexer register 0x25 00 01 23 45System control register 0x05 20 PWM start
Table 6. Electrical Data
Electrical Data Notes/Conditions
Ch 1-4 output power, 3 Ω: 9 W 1 kHz, unclipped (0 dBFS), T
A
= 25 °CCh 1-4 output power, 3 Ω: (10% THD+N) 12.5 W 1 kHz, T
A
= 25 °CCh 1-4 output power, 4 Ω: 7.5 W 1 kHz, unclipped (0 dBFS), T
A
= 25 °CCh 1-4 output power, 4 Ω: (10% THD+N) 10 W 1 kHz, T
A
= 25 °CCh 5-6 output power, 6 Ω: 20 W 1 kHz, unclipped (0 dBFS), T
A
= 25 °CCh 5-6 output power, 6 Ω: (10% THD+N) 26 W 1 kHz, T
A
= 25 °CCh 5-6 output power, 8 Ω: 15.5 W 1 kHz, unclipped (0 dBFS), T
A
= 25 °CCh 5-6 output power, 8 Ω: (10% THD+N) 21 W 1 kHz, T
A
= 25 °CCh 1-4 maximum peak current: > 3.0 A 1 kHz burst, 1 Ω, ROC = 39 k ΩCh 5-6 maximum peak current: > 5.2 A 1 kHz burst, 1 Ω, ROC = 22 k ΩCh 1-4 damping factor: 10 1 kHz, relative to 4- ΩloadCh 5-6 damping factor: 10 1 kHz, relative to 8- ΩloadOutput stage efficiency: 89 % 1 kHz, 2 ×7.5 W, 4 Ω+ 1 ×16 WSystem supply current: < 145 mA 1 kHz, –60-dBFS signal (with TI Input-USB Board)H-bridge supply current: < 60 mA 1 kHz, –60-dBFS signalTotal board idle power consumption: 3.3 W H-bridge supply + system supply, –60-dBFS signal
Table 7. Audio Performance
Audio Performance Notes/Conditions
Ch 1-4 THD+N, 4 Ω: 1 W < 0.1% 1 kHzCh 1-4 THD+N, 4 Ω: 5 W < 0.1% 1 kHzCh 1-4 THD+N, 4 Ω: 7.5 W < 0.1% 1 kHzCh 5-6 THD+N, 8 Ω: 1 W < 0.09% 1 kHzCh 5-6 THD+N, 8 Ω: 10 W < 0.09% 1 kHzCh 5-6 THD+N, 8 Ω: 15 W < 0.09% 1 kHzCh 1-4 dynamic range: > 108 dB Reference: rated power, A-weighted, AES17 filterCh 1-4 noise voltage < 20 µVrms A-weighted, AES17 filterCh 5-6 dynamic range: > 108 dB Reference: rated power, A-weighted, AES17 filterCh 5-6 noise voltage < 40 µVrms A-weighted, AES17 filterMute/Unmute, no input signal, 4 Ω, 5.5-second start-upCh 1-4 click/pop < 10 mV
delayCh 5-6 click/pop < 20 mV Mute/Unmute, no input signal, 8 ΩCh 1-6 channel separation > 60 dB 1 kHz, unclipped (0 dBFS)Ch 1-4 frequency response 200 Hz – 20 kHz ±0.5 dB 7.5 W/ 4 Ω, unclipped (0 dBFS)Ch 5-6 frequency response 20 Hz – 20 kHz ±0.5 dB 15 W/ 8 Ω, unclipped (0 dBFS)
Table 8. Thermal Specification
General Test Conditions T
DEVICE
(1)
Notes/Conditions
Idle, all channels switching 42 °C 1 kHz, 15 minutes, –60 dBFS signal, T
A
= 25 °C
(1)
Measured on devices (average) No heatsink.
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4.1 THD+N vs Power (SE - 3 Ω)
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
THD+N - %
7m 2010m 20m 50m 100m 200m 500m 1 2 5 10
Power - W
TAS5132DDV6EVM Performance
Table 8. Thermal Specification (continued)
General Test Conditions T
DEVICE
(1)
Notes/Conditions
4 x 1.25 W, 4 Ω+ 2 x 2.5 W, 8 Ω(1/8) 57 °C 1 kHz, 1 hour, T
A
= 25 °C2 x 10 W, 4 Ω+ 1 x 20 W, 8 Ω(full power) 92 °C 1 kHz, 5 minutes, T
A
= 25 °C
Table 9. Physical Specifications
(1)
General Test Conditions Notes/Conditions
PCB dimensions 112 mm ×154 mm Width ×length (mm)Total weight 130 g Components + PCB + mechanics(1)
All electrical and audio specifications are typical values.
Gain: +2.5 dB set in TAS5086
Figure 4. THD+N vs Power (SE – 3 Ω)
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4.2 THD+N vs Power (SE - 4 Ω)
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
THD+N - %
7m 2010m 20m 50m 100m 200m 500m 1 2 5 10
Power - W
4.3 THD+N vs Power (BTL - 6 Ω)
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
THD+N - %
7m 2010m 20m 50m 100m 200m 500m 1 2 5 10
Power - W
30
TAS5132DDV6EVM Performance
Gain: +2.5 dB set in TAS5086
Figure 5. THD+N vs Power (SE – 4 Ω)
Gain: +2.5 dB set in TAS5086
Figure 6. THD+N vs Power (BTL – 6 Ω)
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4.4 THD+N vs Power (BTL - 8 Ω)
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
THD+N - %
7m 3010m 20m 50m 100m 200m 500m 1 2 5 10
Power - W
20
4.5 THD+N vs Frequency (SE - 3 Ω)
100 20 k200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
THD+N - %
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
8.9 W (-0.25 dBFS)
5 W
1 W
TAS5132DDV6EVM Performance
Gain: +2.5 dB set in TAS5086
Figure 7. THD+N vs Power (BTL –8 Ω)
Figure 8. THD+N vs Frequency (SE – 3 Ω)
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4.6 THD+N vs Frequency (SE - 4 Ω)
100 20 k200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
THD+N - %
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
7 W (-0.25 dBFS)
5 W
1 W
4.7 THD+N vs Frequency (BTL - 6 Ω)
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
THD+N - %
1 W
10 W
18.5 W (-0.3 dBFS)
TAS5132DDV6EVM Performance
Figure 9. THD+N vs Frequency (SE – 4 Ω)
Figure 10. THD+N vs Frequency (BTL – 6 Ω)
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4.8 THD+N vs Frequency (BTL - 8 Ω)
0.001
10
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
THD+N - %
1 W
15 W (-0.3 dBFS)
10 W
4.9 FFT Spectrum with -60-dBFS Tone (SE)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0 22 k2 k 4 k 6 k 8 k 10 k 12 k 14 k 16 k 18 k 20 k
f - Frequency - Hz
dBr - A
V = 5.48 V,
FFT Size= 16k
REF
TAS5132DDV6EVM Performance
Figure 11. THD+N vs Frequency (BTL – 8 Ω)
Reference voltage is 5.48 V. FFT size is 16k.
Figure 12. FFT Spectrum With –60-dBFS Tone (SE)
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4.10 FFT Spectrum With -60-dBFS Tone (BTL)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0 22 k2 k 4 k 6 k 8 k 10 k 12 k 14 k 16 k 18 k 20 k
f - Frequency - Hz
dBr - A
V = 11.18 V,
FFT Size = 16k
REF
4.11 Idle Noise FFT Spectrum (SE)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
85 k10 k 20 k 30 k 40 k 50 k 60 k 70 k 80 k
0
f - Frequency - Hz
dBr - A
V = 5.49 V,
FFT Size = 16k
REF
TAS5132DDV6EVM Performance
Reference voltage is 11.18 V. FFT size is 16k.
Figure 13. FFT Spectrum With –60-dBFS Tone (BTL)
Reference voltage is 5.49 V. FFT size is 16k.
Figure 14. Idle Noise FFT Spectrum (SE)
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4.12 Idle Noise FFT Spectrum (BTL)
-150
+0
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
085 k
10 k 20 k 30 k 40 k 50 k 60 k 70 k 80 k
f - Frequency - Hz
dBr - A
V = 11.18 V,
FFT Size = 16k
REF
4.13 Channel Separation (1-2)
-100
+20
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
+10
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
dBr - A
Ch 1
Ch 2
TAS5132DDV6EVM Performance
Reference voltage is 11.18 V. FFT size is 16k.
Figure 15. Idle Noise FFT Spectrum (BTL)
Channel separation is tested for two channels in the same package, channel 1 and channel 2. Four-ohmloads are used for both channels. Channel 1 input signal is 0 dBFS; channel 2 is muted. Referencevoltage is 5.49 Vrms. Shielded output inductors provide better channel separation.
Figure 16. Channel Separation (1-2)
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4.14 Channel Separation (4-5)
-100
+20
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
+10
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
dBr - A
Ch 5
Ch 4
4.15 Channel Separation (5-6)
-100
+20
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
+10
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
dBr - A
Ch 5
Ch 6
TAS5132DDV6EVM Performance
Channel separation is tested for two channels in a different package, channel 4 and channel 5. A 4- Ωloadis used for channel 4 SE; an 8- Ωload is used for channel 5 BTL. The channel 5 input signal is 0 dBFS;channel 4 is muted. Reference voltage is 11.19 Vrms. Shielded output inductors provide better channelseparation.
Figure 17. Channel Separation (4-5)
Channel separation is tested for two channels in the same package, channel 5 and channel 6. Eight-ohmloads are used for both channels. The channel 5 input signal is 0 dBFS; channel 6 is muted. Referencevoltage is 11.19 Vrms.
Figure 18. Channel Separation (5-6)
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4.16 Frequency Response (SE)
-10
+10
-9
-8
-7
-6
-5
-4
-3
-2
-1
-0
+1
+2
+3
+4
+5
+6
+7
+8
+9
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
4W
3W
dB
4.17 Frequency Response (BTL)
-10
+10
-9
-8
-7
-6
-5
-4
-3
-2
-1
-0
+1
+2
+3
+4
+5
+6
+7
+8
+9
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
dB
8W
6W
TAS5132DDV6EVM Performance
Measurement bandwidth filter is 80 kHz.
Figure 19. Frequency Response (SE)
Measurement bandwidth filter is 80 kHz.
Figure 20. Frequency Response (BTL)
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4.18 High-Current Protection (SE)
-5
5
-4.5
-4
-3.5
-2.5
-2
-1.5
-1
-500m
0
500 m
1
1.5
2
2.5
3.5
4
4.5
3 . 1 5 4
-3.01
0 3 m
500 m1m 1.5m 2 m 2.5 m
1.482m
1.024m
t - TIME - sec
dx = -458.8 sec,
dy = -6.165 V
m
Peak Current - A
4.19 High-Current Protection (BTL)
-6
6
-5
-4
-3
-2
-1
0
1
2
3
4
5.319
-5.204
0 3 m
500 m2 m 2.5 m
1.518m
1.012m
t - TIME - sec
5dx = -505.9 sec,
dy = 10.52 V
m
Peak Current - A
TAS5132DDV6EVM Performance
Input bursted signal is 1 kHz; load is 1 Ω.
Figure 21. High-Current Protection (SE)
Input bursted signal is 1 kHz; load is 1 Ω.
Figure 22. High-Current Protection (BTL)
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4.20 Pop/Click (SE)
-100
100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Voltage - mV
0 4 m
500 m1 m 1.5 m 2 m 2.5 m 3 m 3.5 m
t - TIME - sec
3.1 sec(1Bh)
5.5 sec(1Dh) 4.2 sec(1Ch)
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20 k50 100 200 500 1 k 2 k 5 k 10 k
f - Frequency - Hz
dBr - A
5.5 sec (1Dh)
4.2 sec (1Ch)
3.1 sec (1Bh)
TAS5132DDV6EVM Performance
Start of SE channels is tested for different charge times. Charge time period is controlled by changingregister x1Ah in TAS5086. No input signal is applied. Load is 4 Ω. Measurement is done according toSLEA044 . The measurement results are presented both in time domain and in frequency domain.
Figure 23. Pop/Click (SE) Time Domain
Reference voltage is 5.49 Vrms.
Figure 24. Pop/Click (SE) FFT (V
REF
= 5.49 Vrms)
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4.21 Pop/Click (BTL)
-100
100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Voltage - mV
0 4 m
500 m1 m 1.5 m 2 m 2.5 m 3 m 3.5 m
t - TIME - sec
Ch 5
Ch 6
TAS5132DDV6EVM Performance
No input signal is applied. Measurement results are presented in time domain and in frequency domain.
Figure 25. Pop/Click (BTL) Time Domain
20 TAS5132DDV6EVM SLLU096A – February 2007 – Revised March 2007Submit Documentation Feedback