Texas Instruments CC1101 User manual

CC1101
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Low-Power Sub-1 GHz RF Transceiver
Applications
Ultra low-power wireless applications
operating in the 315/433/868/915 MHz
ISM/SRD bands
Wireless alarm and security systems
Industrial monitoring and control
Wireless sensor networks
AMR –Automatic Meter Reading
Home and building automation
Wireless MBUS
Product Description
CC1101 is a low-cost sub-1 GHz transceiver
designed for very low-power wireless appli-
cations. The circuit is mainly intended for the
ISM (Industrial, Scientific and Medical) and
SRD (Short Range Device) frequency bands
at 315, 433, 868, and 915 MHz, but can easily
be programmed for operation at other
frequencies in the 300-348 MHz, 387-464 MHz
and 779-928 MHz bands.
The RF transceiver is integrated with a highly
configurable baseband modem. The modem
supports various modulation formats and has
a configurable data rate up to 600 kbps.
CC1101 provides extensive hardware support
for packet handling, data buffering, burst
transmissions, clear channel assessment, link
quality indication, and wake-on-radio.
The main operating parameters and the 64-
byte transmit/receive FIFOs of CC1101 can be
controlled via an SPI interface. In a typical
system, the CC1101 will be used together with a
microcontroller and a few additional passive
components.
The CC1190 850-950 MHz range extender [21]
can be used with CC1101 in long range
applications for improved sensitivity and higher
output power.
6 7 8 9 10
20 19 18 17 16
1
2
3
4
5
15
14
13
12
11
CC1101

CC1101
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Key Features
RF Performance
High sensitivity
o-116 dBm at 0.6 kBaud, 433 MHz,
1% packet error rate
o-112 dBm at 1.2 kBaud, 868 MHz,
1% packet error rate
Low current consumption (14.7 mA in RX,
1.2 kBaud, 868 MHz)
Programmable output power up to +12
dBm for all supported frequencies
Excellent receiver selectivity and blocking
performance
Programmable data rate from 0.6 to 600
kbps
Frequency bands: 300-348 MHz, 387-464
MHz and 779-928 MHz
Analog Features
2-FSK, 4-FSK, GFSK, and MSK supported
as well as OOK and flexible ASK shaping
Suitable for frequency hopping systems
due to a fast settling frequency
synthesizer; 75 μs settling time
Automatic Frequency Compensation
(AFC) can be used to align the frequency
synthesizer to the received signal centre
frequency
Integrated analog temperature sensor
Digital Features
Flexible support for packet oriented
systems; On-chip support for sync word
detection, address check, flexible packet
length, and automatic CRC handling
Efficient SPI interface; All registers can be
programmed with one “burst” transfer
Digital RSSI output
Programmable channel filter bandwidth
Programmable Carrier Sense (CS)
indicator
Programmable Preamble Quality Indicator
(PQI) for improved protection against false
sync word detection in random noise
Support for automatic Clear Channel
Assessment (CCA) before transmitting (for
listen-before-talk systems)
Support for per-package Link Quality
Indication (LQI)
Optional automatic whitening and de-
whitening of data
Low-Power Features
200 nA sleep mode current consumption
Fast startup time; 240 μs from sleep to RX
or TX mode (measured on EM reference
design [1] and [2])
Wake-on-radio functionality for automatic
low-power RX polling
Separate 64-byte RX and TX data FIFOs
(enables burst mode data transmission)
General
Few external components; Completely on-
chip frequency synthesizer, no external
filters or RF switch needed
Green package: RoHS compliant and no
antimony or bromine
Small size (QLP 4x4 mm package, 20
pins)
Suited for systems targeting compliance
with EN 300 220 (Europe) and FCC CFR
Part 15 (US)
Suited for systems targeting compliance
with the Wireless MBUS standard
EN 13757-4:2005
Support for asynchronous and
synchronous serial receive/transmit mode
for backwards compatibility with existing
radio communication protocols
Improved Range using CC1190
The CC1190 [21] is a range extender for
850-950 MHz and is an ideal fit for CC1101
to enhance RF performance
High sensitivity
o-118 dBm at 1.2 kBaud, 868 MHz,
1% packet error rate
o-120 dBm at 1.2 kBaud, 915 MHz,
1% packet error rate
+20 dBm output power at 868 MHz
+27 dBm output power at 915 MHz
Refer to AN094 [22] and AN096 [23] for
more performance figures of the CC1101 +
CC1190 combination

CC1101
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Reduced Battery Current using
TPS62730
The TPS62730 [26] is a step down
converter with bypass mode for ultra low
power wireless applications.
In RX, the current drawn from a 3.6 V
battery is typically less than 11 mA when
TPS62730 output voltage is 2.1 V. When
connecting CC1101 directly to a 3.6 V
battery the current drawn is typically 17
mA (see Figure 1)
In TX, at maximum output power (+12
dBm), the current drawn from a 3.6 V
battery is typically 22 mA when TPS62730
output voltage is 2.1 V. When connecting
CC1101 directly to a 3.6 V battery the
current drawn is typically 34 mA (see
Figure 2).
When CC1101 enters SLEEP mode, the
TPS62730 can be put in bypass mode for
very low power down current
The typical TPS62730 current consumption
is 30 nA in bypass mode.
The CC1101 is connected to the battery via
an integrated 2.1 Ω(typical) switch in
bypass mode
Figure 1: Typical RX Battery Current vs Battery Voltage
Figure 2: Typical TX Battery Current vs Battery Voltage at Maximum CC1101 Output Power (+12
dBm)

CC1101
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Abbreviations
Abbreviations used in this data sheet are described below.
2-FSK
Binary Frequency Shift Keying
MSB
Most Significant Bit
4-FSK
Quaternary Frequency Shift Keying
MSK
Minimum Shift Keying
ACP
Adjacent Channel Power
N/A
Not Applicable
ADC
Analog to Digital Converter
NRZ
Non Return to Zero (Coding)
AFC
Automatic Frequency Compensation
OOK
On-Off Keying
AGC
Automatic Gain Control
PA
Power Amplifier
AMR
Automatic Meter Reading
PCB
Printed Circuit Board
ASK
Amplitude Shift Keying
PD
Power Down
BER
Bit Error Rate
PER
Packet Error Rate
BT
Bandwidth-Time product
PLL
Phase Locked Loop
CCA
Clear Channel Assessment
POR
Power-On Reset
CFR
Code of Federal Regulations
PQI
Preamble Quality Indicator
CRC
Cyclic Redundancy Check
PQT
Preamble Quality Threshold
CS
Carrier Sense
PTAT
Proportional To Absolute Temperature
CW
Continuous Wave (Unmodulated Carrier)
QLP
Quad Leadless Package
DC
Direct Current
QPSK
Quadrature Phase Shift Keying
DVGA
Digital Variable Gain Amplifier
RC
Resistor-Capacitor
ESR
Equivalent Series Resistance
RF
Radio Frequency
FCC
Federal Communications Commission
RSSI
Received Signal Strength Indicator
FEC
Forward Error Correction
RX
Receive, Receive Mode
FIFO
First-In-First-Out
SAW
Surface Aqustic Wave
FHSS
Frequency Hopping Spread Spectrum
SMD
Surface Mount Device
FS
Frequency Synthesizer
SNR
Signal to Noise Ratio
GFSK
Gaussian shaped Frequency Shift Keying
SPI
Serial Peripheral Interface
IF
Intermediate Frequency
SRD
Short Range Devices
I/Q
In-Phase/Quadrature
TBD
To Be Defined
ISM
Industrial, Scientific, Medical
T/R
Transmit/Receive
LC
Inductor-Capacitor
TX
Transmit, Transmit Mode
LNA
Low Noise Amplifier
UHF
Ultra High frequency
LO
Local Oscillator
VCO
Voltage Controlled Oscillator
LSB
Least Significant Bit
WOR
Wake on Radio, Low power polling
LQI
Link Quality Indicator
XOSC
Crystal Oscillator
MCU
Microcontroller Unit
XTAL
Crystal

CC1101
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Table Of Contents
APPLICATIONS..................................................................................................................................................1
PRODUCT DESCRIPTION................................................................................................................................1
KEY FEATURES .................................................................................................................................................2
RF PERFORMANCE ..........................................................................................................................................2
ANALOG FEATURES ........................................................................................................................................2
DIGITAL FEATURES.........................................................................................................................................2
LOW-POWER FEATURES................................................................................................................................2
GENERAL ............................................................................................................................................................2
IMPROVED RANGE USING CC1190 ..............................................................................................................2
REDUCED BATTERY CURRENT USING TPS62730....................................................................................3
ABBREVIATIONS...............................................................................................................................................4
TABLE OF CONTENTS.....................................................................................................................................5
1ABSOLUTE MAXIMUM RATINGS.....................................................................................................8
2OPERATING CONDITIONS .................................................................................................................8
3GENERAL CHARACTERISTICS.........................................................................................................8
4ELECTRICAL SPECIFICATIONS.......................................................................................................9
4.1 CURRENT CONSUMPTION ............................................................................................................................9
4.2 RF RECEIVE SECTION................................................................................................................................12
4.3 RF TRANSMIT SECTION.............................................................................................................................16
4.4 CRYSTAL OSCILLATOR..............................................................................................................................18
4.5 LOW POWER RC OSCILLATOR...................................................................................................................18
4.6 FREQUENCY SYNTHESIZER CHARACTERISTICS..........................................................................................19
4.7 ANALOG TEMPERATURE SENSOR ..............................................................................................................19
4.8 DC CHARACTERISTICS ..............................................................................................................................20
4.9 POWER-ON RESET.....................................................................................................................................20
5PIN CONFIGURATION........................................................................................................................20
6CIRCUIT DESCRIPTION ....................................................................................................................22
7APPLICATION CIRCUIT....................................................................................................................22
7.1 BIAS RESISTOR..........................................................................................................................................22
7.2 BALUN AND RF MATCHING.......................................................................................................................23
7.3 CRYSTAL...................................................................................................................................................23
7.4 REFERENCE SIGNAL ..................................................................................................................................23
7.5 ADDITIONAL FILTERING............................................................................................................................24
7.6 POWER SUPPLY DECOUPLING....................................................................................................................24
7.7 ANTENNA CONSIDERATIONS .....................................................................................................................24
7.8 PCB LAYOUT RECOMMENDATIONS...........................................................................................................26
8CONFIGURATION OVERVIEW........................................................................................................27
9CONFIGURATION SOFTWARE........................................................................................................29
10 4-WIRE SERIAL CONFIGURATION AND DATA INTERFACE..................................................29
10.1 CHIP STATUS BYTE ...................................................................................................................................31
10.2 REGISTER ACCESS.....................................................................................................................................31
10.3 SPI READ ..................................................................................................................................................32
10.4 COMMAND STROBES .................................................................................................................................32
10.5 FIFO ACCESS ............................................................................................................................................32
10.6 PATABLE ACCESS...................................................................................................................................33
11 MICROCONTROLLER INTERFACE AND PIN CONFIGURATION ..........................................34
11.1 CONFIGURATION INTERFACE.....................................................................................................................34
11.2 GENERAL CONTROL AND STATUS PINS .....................................................................................................34
11.3 OPTIONAL RADIO CONTROL FEATURE ......................................................................................................34
12 DATA RATE PROGRAMMING..........................................................................................................35

CC1101
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13 RECEIVER CHANNEL FILTER BANDWIDTH..............................................................................35
14 DEMODULATOR, SYMBOL SYNCHRONIZER, AND DATA DECISION..................................36
14.1 FREQUENCY OFFSET COMPENSATION........................................................................................................36
14.2 BIT SYNCHRONIZATION.............................................................................................................................36
14.3 BYTE SYNCHRONIZATION..........................................................................................................................36
15 PACKET HANDLING HARDWARE SUPPORT ..............................................................................37
15.1 DATA WHITENING.....................................................................................................................................37
15.2 PACKET FORMAT.......................................................................................................................................38
15.3 PACKET FILTERING IN RECEIVE MODE......................................................................................................40
15.4 PACKET HANDLING IN TRANSMIT MODE...................................................................................................40
15.5 PACKET HANDLING IN RECEIVE MODE .....................................................................................................41
15.6 PACKET HANDLING IN FIRMWARE.............................................................................................................41
16 MODULATION FORMATS.................................................................................................................42
16.1 FREQUENCY SHIFT KEYING.......................................................................................................................42
16.2 MINIMUM SHIFT KEYING...........................................................................................................................43
16.3 AMPLITUDE MODULATION ........................................................................................................................43
17 RECEIVED SIGNAL QUALIFIERS AND LINK QUALITY INFORMATION ............................43
17.1 SYNC WORD QUALIFIER............................................................................................................................43
17.2 PREAMBLE QUALITY THRESHOLD (PQT)..................................................................................................44
17.3 RSSI..........................................................................................................................................................44
17.4 CARRIER SENSE (CS).................................................................................................................................46
17.5 CLEAR CHANNEL ASSESSMENT (CCA) .....................................................................................................48
17.6 LINK QUALITY INDICATOR (LQI)..............................................................................................................48
18 FORWARD ERROR CORRECTION WITH INTERLEAVING.....................................................48
18.1 FORWARD ERROR CORRECTION (FEC)......................................................................................................48
18.2 INTERLEAVING ..........................................................................................................................................49
19 RADIO CONTROL................................................................................................................................50
19.1 POWER-ON START-UP SEQUENCE.............................................................................................................50
19.2 CRYSTAL CONTROL...................................................................................................................................51
19.3 VOLTAGE REGULATOR CONTROL..............................................................................................................52
19.4 ACTIVE MODES (RX AND TX)...................................................................................................................52
19.5 WAKE ON RADIO (WOR)..........................................................................................................................53
19.6 TIMING......................................................................................................................................................54
19.7 RX TERMINATION TIMER..........................................................................................................................55
20 DATA FIFO ............................................................................................................................................56
21 FREQUENCY PROGRAMMING........................................................................................................57
22 VCO.........................................................................................................................................................58
22.1 VCO AND PLL SELF-CALIBRATION ..........................................................................................................58
23 VOLTAGE REGULATORS .................................................................................................................58
24 OUTPUT POWER PROGRAMMING ................................................................................................59
25 SHAPING AND PA RAMPING............................................................................................................60
26 GENERAL PURPOSE / TEST OUTPUT CONTROL PINS.............................................................61
27 ASYNCHRONOUS AND SYNCHRONOUS SERIAL OPERATION..............................................63
27.1 ASYNCHRONOUS SERIAL OPERATION........................................................................................................63
27.2 SYNCHRONOUS SERIAL OPERATION ..........................................................................................................63
28 SYSTEM CONSIDERATIONS AND GUIDELINES.........................................................................64
28.1 SRD REGULATIONS...................................................................................................................................64
28.2 FREQUENCY HOPPING AND MULTI-CHANNEL SYSTEMS............................................................................64
28.3 WIDEBAND MODULATION WHEN NOT USING SPREAD SPECTRUM.............................................................65
28.4 WIRELESS MBUS......................................................................................................................................65
28.5 DATA BURST TRANSMISSIONS...................................................................................................................65
28.6 CONTINUOUS TRANSMISSIONS ..................................................................................................................65
28.7 BATTERY OPERATED SYSTEMS .................................................................................................................66
28.8 INCREASING RANGE ..................................................................................................................................66

CC1101
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29 CONFIGURATION REGISTERS........................................................................................................66
29.1 CONFIGURATION REGISTER DETAILS –REGISTERS WITH PRESERVED VALUES IN SLEEP STATE...............71
29.2 CONFIGURATION REGISTER DETAILS –REGISTERS THAT LOOSE PROGRAMMING IN SLEEP STATE .........91
29.3 STATUS REGISTER DETAILS.......................................................................................................................92
30 SOLDERING INFORMATION............................................................................................................95
31 DEVELOPMENT KIT ORDERING INFORMATION .....................................................................95
32 REFERENCES .......................................................................................................................................96
33 GENERAL INFORMATION................................................................................................................97
33.1 DOCUMENT HISTORY ................................................................................................................................97

CC1101
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1Absolute Maximum Ratings
Under no circumstances must the absolute maximum ratings given in Table 1 be violated. Stress
exceeding one or more of the limiting values may cause permanent damage to the device.
Table 1: Absolute Maximum Ratings
Caution! ESD sensitive device.
Precaution should be used when handling
the device in order to prevent permanent
damage.
2Operating Conditions
The operating conditions for CC1101 are listed Table 2 in below.
Table 2: Operating Conditions
3General Characteristics
Table 3: General Characteristics
Parameter
Min
Max
Units
Condition
Supply voltage
–0.3
3.9
V
All supply pins must have the same voltage
Voltage on any digital pin
–0.3
VDD + 0.3,
max 3.9
V
Voltage on the pins RF_P, RF_N,
DCOUPL, RBIAS
–0.3
2.0
V
Voltage ramp-up rate
120
kV/µs
Input RF level
+10
dBm
Storage temperature range
–50
150
C
Solder reflow temperature
260
C
According to IPC/JEDEC J-STD-020
ESD
750
V
According to JEDEC STD 22, method A114,
Human Body Model (HBM)
ESD
400
V
According to JEDEC STD 22, C101C,
Charged Device Model (CDM)
Parameter
Min
Max
Unit
Condition
Operating temperature
-40
85
C
Operating supply voltage
1.8
3.6
V
All supply pins must have the same voltage
Parameter
Min
Typ
Max
Unit
Condition/Note
Frequency
range
300
348
MHz
387
464
MHz
If using a 27 MHz crystal, the lower frequency limit for
this band is 392 MHz
779
928
MHz
Data rate
0.6
0.6
0.6
26
500
250
300
500
kBaud
kBaud
kBaud
kBaud
2-FSK
GFSK, OOK, and ASK
4-FSK (the data rate in kbps will be twice the baud rate)
(Shaped) MSK (also known as differential offset QPSK).
Optional Manchester encoding (the data rate in kbps will
be half the baud rate)

CC1101
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4Electrical Specifications
4.1 Current Consumption
TA= 25C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the CC1101EM reference designs
([1] and [2]). Reduced current settings (MDMCFG2.DEM_DCFILT_OFF=1) gives a slightly lower current consumption at the cost
of a reduction in sensitivity. See Table 7 for additional details on current consumption and sensitivity.
Parameter
Min
Typ
Max
Unit
Condition
Current consumption in power
down modes
0.2
1
A
Voltage regulator to digital part off, register values retained
(SLEEP state). All GDO pins programmed to 0x2F (HW to 0)
0.5
A
Voltage regulator to digital part off, register values retained, low-
power RC oscillator running (SLEEP state with WOR enabled)
100
A
Voltage regulator to digital part off, register values retained,
XOSC running (SLEEP state with MCSM0.OSC_FORCE_ON set)
165
A
Voltage regulator to digital part on, all other modules in power
down (XOFF state)
Current consumption
8.8
A
Automatic RX polling once each second, using low-power RC
oscillator, with 542 kHz filter bandwidth and 250 kBaud data rate,
PLL calibration every 4th wakeup. Average current with signal in
channel below carrier sense level (MCSM2.RX_TIME_RSSI=1)
35.3
A
Same as above, but with signal in channel above carrier sense
level, 1.96 ms RX timeout, and no preamble/sync word found
1.4
A
Automatic RX polling every 15th second, using low-power RC
oscillator, with 542 kHz filter bandwidth and 250 kBaud data rate,
PLL calibration every 4th wakeup. Average current with signal in
channel below carrier sense level (MCSM2.RX_TIME_RSSI=1)
39.3
A
Same as above, but with signal in channel above carrier sense
level, 36.6 ms RX timeout, and no preamble/sync word found
1.7
mA
Only voltage regulator to digital part and crystal oscillator running
(IDLE state)
8.4
mA
Only the frequency synthesizer is running (FSTXON state). This
currents consumption is also representative for the other
intermediate states when going from IDLE to RX or TX, including
the calibration state
Current consumption,
315 MHz
15.4
mA
Receive mode, 1.2 kBaud, reduced current, input at sensitivity
limit
14.4
mA
Receive mode, 1.2 kBaud, register settings optimized for
reduced current, input well above sensitivity limit
15.2
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input at sensitivity limit
14.3
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input well above sensitivity limit
16.5
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input at sensitivity limit
15.1
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input well above sensitivity limit
27.4
mA
Transmit mode, +10 dBm output power
15.0
mA
Transmit mode, 0 dBm output power
12.3
mA
Transmit mode, –6 dBm output power

CC1101
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Table 4: Current Consumption
Parameter
Min
Typ
Max
Unit
Condition
Current consumption,
433 MHz
16.0
mA
Receive mode, 1.2 kBaud, register settings optimized for reduced
current, input at sensitivity limit
15.0
mA
Receive mode, 1.2 kBaud, register settings optimized for reduced
current, input well above sensitivity limit
15.7
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input at sensitivity limit
15.0
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input well above sensitivity limit
17.1
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input at sensitivity limit
15.7
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input well above sensitivity limit
29.2
mA
Transmit mode, +10 dBm output power
16.0
mA
Transmit mode, 0 dBm output power
13.1
mA
Transmit mode, –6 dBm output power
Current consumption,
868/915 MHz
15.7
mA
Receive mode, 1.2 kBaud, register settings optimized for
reduced current, input at sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
14.7
mA
Receive mode, 1.2 kBaud, register settings optimized for
reduced current, input well above sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
15.6
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input at sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
14.6
mA
Receive mode, 38.4 kBaud, register settings optimized for
reduced current, input well above sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
16.9
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input at sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
15.6
mA
Receive mode, 250 kBaud, register settings optimized for
reduced current, input well above sensitivity limit.
See Figure 3 for current consumption with register settings
optimized for sensitivity.
34.2
mA
Transmit mode, +12 dBm output power, 868 MHz
30.0
mA
Transmit mode, +10 dBm output power, 868 MHz
16.8
mA
Transmit mode, 0 dBm output power, 868 MHz
16.4
mA
Transmit mode, –6 dBm output power, 868 MHz.
33.4
mA
Transmit mode, +11 dBm output power, 915 MHz
30.7
mA
Transmit mode, +10 dBm output power, 915 MHz
17.2
mA
Transmit mode, 0 dBm output power, 915 MHz
17.0
mA
Transmit mode, –6 dBm output power, 915 MHz

CC1101
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Table 5: Typical TX Current Consumption over Temperature and Supply Voltage, 868 MHz
Table 6: Typical TX Current Consumption over Temperature and Supply Voltage, 915 MHz
16,2
16,4
16,6
16,8
17
17,2
17,4
17,6
17,8
-110 -90 -70 -50 -30 -10
Input Power Level [dBm]
Current [mA]
-40C
+25C
+85C
1.2 kBaud GFSK
16,2
16,4
16,6
16,8
17,0
17,2
17,4
17,6
17,8
-100 -80 -60 -40 -20
Input Power Level [dBm]
Current [mA]
-40C
+25C
+85C
38.4 kBaud GFSK
16,5
17
17,5
18
18,5
19
19,5
-100 -80 -60 -40 -20
Input Power Level [dBm]
Current [mA]
-40C
+25C
+85C
250 kBaud GFSK
17,0
17,5
18,0
18,5
19,0
19,5
-90 -70 -50 -30 -10
Input Power Level [dBm]
Current [mA]
-40C
+25C
+85C
500 kBaud MSK
Figure 3: Typical RX Current Consumption over Temperature and Input Power Level,
868/915 MHz, Sensitivity Optimized Setting
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Current [mA], PATABLE=0xC0,
+12 dBm
32.7
31.5
30.5
35.3
34.2
33.3
35.5
34.4
33.5
Current [mA], PATABLE=0xC5,
+10 dBm
30.1
29.2
28.3
30.9
30.0
29.4
31.1
30.3
29.6
Current [mA], PATABLE=0x50,
0 dBm
16.4
16.0
15.6
17.3
16.8
16.4
17.6
17.1
16.7
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Current [mA], PATABLE=0xC0,
+11 dBm
31.9
30.7
29.8
34.6
33.4
32.5
34.8
33.6
32.7
Current [mA], PATABLE=0xC3,
+10 dBm
30.9
29.8
28.9
31.7
30.7
30.0
31.9
31.0
30.2
Current [mA], PATABLE=0x8E,
0 dBm
17.2
16.8
16.4
17.6
17.2
16.9
17.8
17.4
17.1

CC1101
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4.2 RF Receive Section
TA= 25C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the CC1101EM reference designs
([1] and [2]).
Parameter
Min
Typ
Max
Unit
Condition/Note
Digital channel filter
bandwidth
58
812
kHz
User programmable. The bandwidth limits are proportional to
crystal frequency (given values assume a 26.0 MHz crystal)
Spurious emissions
-68
-66
–57
–47
dBm
dBm
25 MHz –1 GHz
(Maximum figure is the ETSI EN 300 220 limit)
Above 1 GHz
(Maximum figure is the ETSI EN 300 220 limit)
Typical radiated spurious emission is -49 dBm measured at the
VCO frequency
RX latency
9
bit
Serial operation. Time from start of reception until data is
available on the receiver data output pin is equal to 9 bit
315 MHz
1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(2-FSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)
Receiver sensitivity
-111
dBm
Sensitivity can be traded for current consumption by setting
MDMCFG2.DEM_DCFILT_OFF=1. The typical current
consumption is then reduced from 17.2 mA to 15.4 mA at the
sensitivity limit. The sensitivity is typically reduced to -109 dBm
500 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(MSK, 1% packet error rate, 20 bytes packet length, 812 kHz digital channel filter bandwidth)
Receiver sensitivity
-88
dBm
MDMCFG2.DEM_DCFILT_OFF=1 cannot be used for data rates >
250 kBaud
433 MHz
0.6 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 14.3 kHz deviation, 58 kHz digital channel filter bandwidth)
Receiver sensitivity
-116
dBm
1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)
Receiver sensitivity
-112
dBm
Sensitivity can be traded for current consumption by setting
MDMCFG2.DEM_DCFILT_OFF=1. The typical current
consumption is then reduced from 18.0 mA to 16.0 mA at the
sensitivity limit. The sensitivity is typically reduced to -110 dBm
38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)
Receiver sensitivity
–104
dBm
250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)
Receiver sensitivity
-95
dBm
868/915 MHz
1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)
Receiver sensitivity
–112
dBm
Sensitivity can be traded for current consumption by setting
MDMCFG2.DEM_DCFILT_OFF=1. The typical current
consumption is then reduced from 17.7 mA to 15.7 mA at
sensitivity limit. The sensitivity is typically reduced to -109 dBm
Saturation
–14
dBm
FIFOTHR.CLOSE_IN_RX=0.See more in DN010 [8]
Adjacent channel
rejection
±100 kHz offset
37
dB
Desired channel 3 dB above the sensitivity limit.
100 kHz channel spacing
See Figure 4 for selectivity performance at other offset
frequencies
Image channel
rejection
31
dB
IF frequency 152 kHz
Desired channel 3 dB above the sensitivity limit

CC1101
SWRS061H Page 13 of 98
Table 7: RF Receive Section
Parameter
Min
Typ
Max
Unit
Condition/Note
Blocking
±2 MHz offset
±10 MHz offset
-50
-40
dBm
dBm
Desired channel 3 dB above the sensitivity limit
See Figure 4 for blocking performance at other offset
frequencies
38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)
Receiver sensitivity
–104
dBm
Sensitivity can be traded for current consumption by setting
MDMCFG2.DEM_DCFILT_OFF=1. The typical current
consumption is then reduced from 17.7 mA to 15.6 mA at the
sensitivity limit. The sensitivity is typically reduced to -102
dBm
Saturation
–16
dBm
FIFOTHR.CLOSE_IN_RX=0.See more in DN010 [8]
Adjacent channel rejection
-200 kHz offset
+200 kHz offset
12
25
dB
dB
Desired channel 3 dB above the sensitivity limit.
200 kHz channel spacing
See Figure 5 for blocking performance at other offset
frequencies
Image channel rejection
23
dB
IF frequency 152 kHz
Desired channel 3 dB above the sensitivity limit
Blocking
±2 MHz offset
±10 MHz offset
-50
-40
dBm
dBm
Desired channel 3 dB above the sensitivity limit
See Figure 5 for blocking performance at other offset
frequencies
250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(GFSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)
Receiver sensitivity
–95
dBm
Sensitivity can be traded for current consumption by setting
MDMCFG2.DEM_DCFILT_OFF=1. The typical current
consumption is then reduced from 18.9 mA to 16.9 mA at the
sensitivity limit. The sensitivity is typically reduced to -91 dBm
Saturation
–17
dBm
FIFOTHR.CLOSE_IN_RX=0. See more in DN010 [8]
Adjacent channel rejection
25
dB
Desired channel 3 dB above the sensitivity limit.
750 kHz channel spacing
See Figure 6 for blocking performance at other offset
frequencies
Image channel rejection
14
dB
IF frequency 304 kHz
Desired channel 3 dB above the sensitivity limit
Blocking
±2 MHz offset
±10 MHz offset
-50
-40
dBm
dBm
Desired channel 3 dB above the sensitivity limit
See Figure 6 for blocking performance at other offset
frequencies
500 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(MSK, 1% packet error rate, 20 bytes packet length, 812 kHz digital channel filter bandwidth)
Receiver sensitivity
–90
dBm
MDMCFG2.DEM_DCFILT_OFF=1 cannot be used for data
rates > 250 kBaud
Image channel rejection
1
dB
IF frequency 355 kHz
Desired channel 3 dB above the sensitivity limit
Blocking
±2 MHz offset
±10 MHz offset
-50
-40
dBm
dBm
Desired channel 3 dB above the sensitivity limit
See Figure 7 for blocking performance at other offset
frequencies
4-FSK, 125 kBaud data rate (250 kbps), sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(1% packet error rate, 20 bytes packet length, 127 kHz deviation, 406 kHz digital channel filter bandwidth)
Receiver sensitivity
-96
dBm
4-FSK, 250 kBaud data rate (500 kbps), sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(1% packet error rate, 20 bytes packet length, 254 kHz deviation, 812 kHz digital channel filter bandwidth)
Receiver sensitivity
-91
dBm
4-FSK, 300 kBaud data rate (600 kbps), sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0
(1% packet error rate, 20 bytes packet length, 228 kHz deviation, 812 kHz digital channel filter bandwidth)
Receiver sensitivity
-89
dBm

CC1101
SWRS061H Page 14 of 98
Table 8: Typical Sensitivity over Temperature and Supply Voltage, 868 MHz, Sensitivity Optimized
Setting
Table 9: Typical Sensitivity over Temperature and Supply Voltage, 915 MHz, Sensitivity Optimized
Setting
-20
-10
0
10
20
30
40
50
60
70
80
-40 -30 -20 -10 0 10 20 30 40
Offset [MHz]
Blocking [dB]
-10
0
10
20
30
40
50
60
-1 -0,9 -0,8 -0,7 -0,6 -0,5 -0,4 -0,3 -0,2 -0,1 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Offset [MHz]
Selectivity [dB]
Figure 4: Typical Selectivity at 1.2 kBaud Data Rate, 868.3 MHz, GFSK, 5.2 kHz Deviation. IF
Frequency is 152.3 kHz and the Digital Channel Filter Bandwidth is 58 kHz
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Sensitivity [dBm]
1.2 kBaud
-113
-112
-110
-113
-112
-110
-113
-112
-110
Sensitivity [dBm]
38.4 kBaud
-105
-104
-102
-105
-104
-102
-105
-104
-102
Sensitivity [dBm]
250 kBaud
-97
-96
-92
-97
-95
-92
-97
-94
-92
Sensitivity [dBm]
500 kBaud
-91
-90
-86
-91
-90
-86
-91
-90
-86
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Sensitivity [dBm]
1.2 kBaud
-113
-112
-110
-113
-112
-110
-113
-112
-110
Sensitivity [dBm]
38.4 kBaud
-105
-104
-102
-104
-104
-102
-105
-104
-102
Sensitivity [dBm]
250 kBaud
-97
-94
-92
-97
-95
-92
-97
-95
-92
Sensitivity [dBm]
500 kBaud
-91
-89
-86
-91
-90
-86
-91
-89
-86

CC1101
SWRS061H Page 15 of 98
-20
-10
0
10
20
30
40
50
60
70
-40 -30 -20 -10 0 10 20 30 40
Offset [MHz]
Blocking [dB]
-20
-10
0
10
20
30
40
50
-1 -0,9 -0,8 -0,7 -0,6 -0,5 -0,4 -0,3 -0,2 -0,1 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Offset [MHz]
Selectivity [dB]
Figure 5: Typical Selectivity at 38.4 kBaud Data Rate, 868 MHz, GFSK, 20 kHz Deviation. IF
Frequency is 152.3 kHz and the Digital Channel Filter Bandwidth is 100 kHz
-20
-10
0
10
20
30
40
50
60
-40 -30 -20 -10 0 10 20 30 40
Offset [MHz]
Blocking [dB]
-20
-10
0
10
20
30
40
50
-2 -1,5 -1 -0,5 0 0,5 1 1,5 2
Offset [MHz]
Selectivity [dB]
Figure 6: Typical Selectivity at 250 kBaud Data Rate, 868 MHz, GFSK, IF Frequency is 304 kHz and
the Digital Channel Filter Bandwidth is 540 kHz
-30
-20
-10
0
10
20
30
40
50
60
-40 -30 -20 -10 0 10 20 30 40
Offset [MHz]
Blocking [dB]
-20
-10
0
10
20
30
40
-2 -1,5 -1 -0,5 0 0,5 1 1,5 2
Offset [MHz]
Selectivity [dB]
Figure 7: Typical Selectivity at 500 kBaud Data Rate, 868 MHz, GFSK, IF Frequency is 355 kHz and
the Digital Channel Filter Bandwidth is 812 kHz

CC1101
SWRS061H Page 16 of 98
4.3 RF Transmit Section
TA= 25C, VDD = 3.0 V, +10 dBm if nothing else stated. All measurement results are obtained using the CC1101EM reference
designs ([1] and [2]).
Parameter
Min
Typ
Max
Unit
Condition/Note
Differential load
impedance
315 MHz
433 MHz
868/915 MHz
122 + j31
116 + j41
86.5 + j43



Differential impedance as seen from the RF-port (RF_P and
RF_N) towards the antenna. Follow the CC1101EM reference
designs ([1] and [2]) available from the TI website
Output power,
highest setting
315 MHz
433 MHz
868 MHz
915 MHz
+10
+10
+12
+11
dBm
dBm
dBm
dBm
Output power is programmable, and full range is available in all
frequency bands. Output power may be restricted by
regulatory limits.
See Design Note DN013 [15] for output power and harmonics
figures when using multi-layer inductors. The output power is
then typically +10 dBm when operating at 868/915 MHz.
Delivered to a 50 single-ended load via CC1101EM
reference designs ([1] and [2]) RF matching network
Output power, lowest
setting
-30
dBm
Output power is programmable, and full range is available in all
frequency bands
Delivered to a 50single-ended load via CC1101EM
reference designs ([1] and [2]) RF matching network
Harmonics, radiated
2nd Harm, 433 MHz
3rd Harm, 433 MHz
2nd Harm, 868 MHz
3rd Harm, 868 MHz
2nd Harm, 915 MHz
3rd Harm, 915 MHz
-49
-40
-47
-55
-50
-54
dBm
dBm
dBm
dBm
dBm
dBm
Measured on CC1101EM reference designs ([1] and [2]) with
CW, maximum output power
The antennas used during the radiated measurements
(SMAFF-433 from R.W. Badland and Nearson S331 868/915)
play a part in attenuating the harmonics
Note: All harmonics are below -41.2 dBm when operating in
the 902 –928 MHz band
Harmonics, conducted
315 MHz
433 MHz
868 MHz
2nd Harm
other harmonics
915 MHz
2nd Harm
other harmonics
< -35
< -53
-43
< -45
-36
< -46
-34
< -50
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Measured with +10 dBm CW at 315 MHz and 433 MHz
Frequencies below 960 MHz
Frequencies above 960 MHz
Frequencies below 1 GHz
Frequencies above 1 GHz
Measured with +12 dBm CW at 868 MHz
Measured with +11 dBm CW at 915 MHz (requirement is -20
dBc under FCC 15.247)

CC1101
SWRS061H Page 17 of 98
Parameter
Min
Typ
Max
Unit
Condition/Note
Spurious emissions
conducted, harmonics
not included
315 MHz
433 MHz
868 MHz
915 MHz
< -58
< -53
< -50
< -54
< -56
< -50
< -52
< -53
< -51
< -54
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Measured with +10 dBm CW at 315 MHz and 433 MHz
Frequencies below 960 MHz
Frequencies above 960 MHz
Frequencies below 1 GHz
Frequencies above 1 GHz
Frequencies within 47-74, 87.5-118, 174-230, 470-862 MHz
Measured with +12 dBm CW at 868 MHz
Frequencies below 1 GHz
Frequencies above 1 GHz
Frequencies within 47-74, 87.5-118, 174-230, 470-862 MHz
All radiated spurious emissions are within the limits of ETSI.
The peak conducted spurious emission is -53 dBm at 699 MHz
(868 MHz –169 MHz), which is in a frequency band limited to
-54 dBm by EN 300 220. An alternative filter can be used to
reduce the emission at 699 MHz below -54 dBm, for conducted
measurements, and is shown in Figure 11. See more
information in DN017 [9].
For compliance with modulation bandwidth requirements under
EN 300 220 in the 863 to 870 MHz frequency range it is
recommended to use a 26 MHz crystal for frequencies below
869 MHz and a 27 MHz crystal for frequencies above 869
MHz.
Measured with +11 dBm CW at 915 MHz
Frequencies below 960 MHz
Frequencies above 960 MHz
TX latency
8
bit
Serial operation. Time from sampling the data on the
transmitter data input pin until it is observed on the RF output
ports
Table 10: RF Transmit Section
Table 11: Typical Variation in Output Power over Temperature and Supply Voltage, 868 MHz
Table 12: Typical Variation in Output Power over Temperature and Supply Voltage, 915 MHz
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Output Power [dBm],
PATABLE=0xC0, +12 dBm
12
11
10
12
12
11
12
12
11
Output Power [dBm],
PATABLE=0xC5, +10 dBm
11
10
9
11
10
10
11
10
10
Output Power [dBm],
PATABLE=0x50, 0 dBm
1
0
-1
2
1
0
2
1
0
Supply Voltage
VDD = 1.8 V
Supply Voltage
VDD = 3.0 V
Supply Voltage
VDD = 3.6 V
Temperature [°C]
-40
25
85
-40
25
85
-40
25
85
Output Power [dBm],
PATABLE=0xC0, +11 dBm
11
10
10
12
11
11
12
11
11
Output Power [dBm],
PATABLE=0x8E, +0 dBm
2
1
0
2
1
0
2
1
0

CC1101
SWRS061H Page 18 of 98
4.4 Crystal Oscillator
TA= 25C, VDD = 3.0 V if nothing else is stated. All measurement results obtained using the CC1101EM reference designs ([1]
and [2]).
Table 13: Crystal Oscillator Parameters
4.5 Low Power RC Oscillator
TA= 25C, VDD = 3.0 V if nothing else is stated. All measurement results obtained using the CC1101EM reference designs ([1]
and [2]).
Table 14: RC Oscillator Parameters
Parameter
Min
Typ
Max
Unit
Condition/Note
Crystal frequency
26
26
27
MHz
For compliance with modulation bandwidth requirements under
EN 300 220 in the 863 to 870 MHz frequency range it is
recommended to use a 26 MHz crystal for frequencies below
869 MHz and a 27 MHz crystal for frequencies above 869 MHz.
Tolerance
±40
ppm
This is the total tolerance including a) initial tolerance, b) crystal
loading, c) aging, and d) temperature dependence. The
acceptable crystal tolerance depends on RF frequency and
channel spacing / bandwidth.
Load capacitance
10
13
20
pF
Simulated over operating conditions
ESR
100

Start-up time
150
µs
This parameter is to a large degree crystal dependent. Measured
on the CC1101EM reference designs ([1] and [2]) using crystal
AT-41CD2 from NDK
Parameter
Min
Typ
Max
Unit
Condition/Note
Calibrated frequency
34.7
34.7
36
kHz
Calibrated RC Oscillator frequency is XTAL
frequency divided by 750
Frequency accuracy after
calibration
±1
%
Temperature coefficient
+0.5
% / C
Frequency drift when temperature changes after
calibration
Supply voltage coefficient
+3
% / V
Frequency drift when supply voltage changes after
calibration
Initial calibration time
2
ms
When the RC Oscillator is enabled, calibration is
continuously done in the background as long as
the crystal oscillator is running

CC1101
SWRS061H Page 19 of 98
4.6 Frequency Synthesizer Characteristics
TA= 25C, VDD = 3.0 V if nothing else is stated. All measurement results are obtained using the CC1101EM reference designs
([1] and [2]). Min figures are given using a 27 MHz crystal. Typ and max figures are given using a 26 MHz crystal.
Table 15: Frequency Synthesizer Parameters
4.7 Analog Temperature Sensor
TA= 25C, VDD = 3.0 V if nothing else is stated. All measurement results obtained using the CC1101EM reference designs ([1]
and [2]). Note that it is necessary to write 0xBF to the PTEST register to use the analog temperature sensor in the IDLE state.
Table 16: Analog Temperature Sensor Parameters
Parameter
Min
Typ
Max
Unit
Condition/Note
Programmed frequency
resolution
397
FXOSC/
216
412
Hz
26-27 MHz crystal. The resolution (in Hz) is equal
for all frequency bands
Synthesizer frequency
tolerance
±40
ppm
Given by crystal used. Required accuracy
(including temperature and aging) depends on
frequency band and channel bandwidth / spacing
RF carrier phase noise
–92
dBc/Hz
@ 50 kHz offset from carrier
RF carrier phase noise
–92
dBc/Hz
@ 100 kHz offset from carrier
RF carrier phase noise
–92
dBc/Hz
@ 200 kHz offset from carrier
RF carrier phase noise
–98
dBc/Hz
@ 500 kHz offset from carrier
RF carrier phase noise
–107
dBc/Hz
@ 1 MHz offset from carrier
RF carrier phase noise
–113
dBc/Hz
@ 2 MHz offset from carrier
RF carrier phase noise
–119
dBc/Hz
@ 5 MHz offset from carrier
RF carrier phase noise
–129
dBc/Hz
@ 10 MHz offset from carrier
PLL turn-on / hop time
( See Table 34)
72
75
75
s
Time from leaving the IDLE state until arriving in
the RX, FSTXON or TX state, when not
performing calibration. Crystal oscillator running.
PLL RX/TX settling time
( See Table 34)
29
30
30
s
Settling time for the 1·IF frequency step from RX
to TX
PLL TX/RX settling time
( See Table 34)
30
31
31
s
Settling time for the 1·IF frequency step from TX
to RX. 250 kbps data rate.
PLL calibration time
(See Table 35)
685
712
724
s
Calibration can be initiated manually or
automatically before entering or after leaving
RX/TX
Parameter
Min
Typ
Max
Unit
Condition/Note
Output voltage at –40C
0.651
V
Output voltage at 0C
0.747
V
Output voltage at +40C
0.847
V
Output voltage at +80C
0.945
V
Temperature coefficient
2.47
mV/C
Fitted from –20 C to +80 C
Error in calculated
temperature, calibrated
-2 *
0
2 *
C
From –20 C to +80 C when using 2.47 mV / C, after
1-point calibration at room temperature
*The indicated minimum and maximum error with 1-
point calibration is based on simulated values for
typical process parameters
Current consumption
increase when enabled
0.3
mA

CC1101
SWRS061H Page 20 of 98
4.8 DC Characteristics
TA= 25C if nothing else stated.
Table 17: DC Characteristics
4.9 Power-On Reset
For proper Power-On-Reset functionality the power supply should comply with the requirements in
Table 18 below. Otherwise, the chip should be assumed to have unknown state until transmitting an
SRES strobe over the SPI interface. See Section 19.1 on page 50 for further details.
Table 18: Power-On Reset Requirements
5Pin Configuration
The CC1101 pin-out is shown in Figure 8 and Table 19. See Section 26 for details on the I/O
configuration.
1
20 19 18 17 16
15
14
13
12
11
109876
5
4
3
2
GND
Exposed die
attach pad
SCLK
SO (GDO1)
GDO2
DVDD
DCOUPL
GDO0 (ATEST) XOSC_Q1
AVDD
XOSC_Q2 AVDD
RF_P
RF_N
GND
AVDD
RBIAS DGUARD GND SI
CSn
AVDD
Figure 8: Pinout Top View
.
Digital Inputs/Outputs
Min
Max
Unit
Condition
Logic "0" input voltage
0
0.7
V
Logic "1" input voltage
VDD-0.7
VDD
V
Logic "0" output voltage
0
0.5
V
For up to 4 mA output current
Logic "1" output voltage
VDD-0.3
VDD
V
For up to 4 mA output current
Logic "0" input current
N/A
–50
nA
Input equals 0V
Logic "1" input current
N/A
50
nA
Input equals VDD
Parameter
Min
Typ
Max
Unit
Condition/Note
Power-up ramp-up time
5
ms
From 0V until reaching 1.8V
Power off time
1
ms
Minimum time between power-on and power-off
Note: The exposed die attach pad must be connected to a solid ground plane as this is the main
ground connection for the chip