Texas Instruments Chipcon Products CC2420 User manual

CC2420
SWRS041B Page 1 of 89
2.4 GHz IEEE 802.15.4 / ZigBee-ready RF Transceiver
Applications
2.4 GHz IEEE 802.15.4 systems
ZigBee systems
Home/building automation
Industrial Control
Wireless sensor networks
PC peripherals
Consumer Electronics
Product Description
The CC2420 is a true single-chip 2.4 GHz
IEEE 802.15.4 compliant RF transceiver
designed for low power and low voltage
wireless applications.
CC2420 includes a
digital direct sequence spread spectrum
baseband modem providing a spreading
gain of 9 dB and an effective data rate of
250 kbps.
The
CC2420 is a low-cost, highly integrated
solution for robust wireless communication
in the 2.4 GHz unlicensed ISM band. It
complies with worldwide regulations
covered by ETSI EN 300 328 and EN 300
440 class 2 (Europe), FCC CFR47 Part 15
(US) and ARIB STD-T66 (Japan).
The
CC2420 provides extensive hardware
support for packet handling, data
buffering, burst transmissions, data
encryption, data authentication, clear
channel assessment, link quality indication
and packet timing information. These
features reduce the load on the host
controller and allow
CC2420 to interface
low-cost microcontrollers.
The configuration interface and transmit /
receive FIFOs of
CC2420 are accessed via
an SPI interface. In a typical application
CC2420 will be used together with a
microcontroller and a few external passive
components.
CC2420 is based on Chipcon’s SmartRF-
03 technology in 0.18 m CMOS.
Key Features
True single-chip 2.4 GHz IEEE
802.15.4 compliant RF transceiver
with baseband modem and MAC
support
DSSS baseband modem with 2
MChips/s and 250 kbps effective data
rate.
Suitable for both RFD and FFD
operation
Low current consumption (RX: 18.8
mA, TX: 17.4 mA)
Low supply voltage (2.1 – 3.6 V) with
integrated voltage regulator
Low supply voltage (1.6 – 2.0 V) with
external voltage regulator
Programmable output power
No external RF switch / filter needed
I/Q low-IF receiver
I/Q direct upconversion transmitter
Very few external components
128(RX) + 128(TX) byte data buffering
Digital RSSI / LQI support
Hardware MAC encryption (AES-128)
Battery monitor
QLP-48 package, 7x7 mm
Complies with ETSI EN 300 328, EN
300 440 class 2, FCC CFR-47 part 15
and ARIB STD-T66
Powerful and flexible development
tools available

CC2420
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Table of contents
1Abbreviations_________________________________________________________________5
2References ___________________________________________________________________6
3Features _____________________________________________________________________7
4Absolute Maximum Ratings_____________________________________________________8
5Operating Conditions __________________________________________________________8
6Electrical Specifications ________________________________________________________9
6.1 Overall___________________________________________________________________9
6.2 Transmit Section ___________________________________________________________9
6.3 Receive Section___________________________________________________________10
6.4 RSSI / Carrier Sense _______________________________________________________11
6.5 IF Section _______________________________________________________________11
6.6 Frequency Synthesizer Section _______________________________________________11
6.7 Digital Inputs/Outputs______________________________________________________12
6.8 Voltage Regulator _________________________________________________________13
6.9 Battery Monitor___________________________________________________________13
6.10 Power Supply ____________________________________________________________13
7Pin Assignment ______________________________________________________________15
8Circuit Description ___________________________________________________________17
9Application Circuit ___________________________________________________________19
9.1 Input / output matching _____________________________________________________19
9.2 Bias resistor______________________________________________________________19
9.3 Crystal __________________________________________________________________19
9.4 Voltage regulator__________________________________________________________19
9.5 Power supply decoupling and filtering _________________________________________19
10 IEEE 802.15.4 Modulation Format ____________________________________________24
11 Configuration Overview _____________________________________________________25
12 Evaluation Software ________________________________________________________26
13 4-wire Serial Configuration and Data Interface__________________________________27
13.1 Pin configuration__________________________________________________________27
13.2 Register access____________________________________________________________27
13.3 Status byte _______________________________________________________________28
13.4 Command strobes _________________________________________________________29
13.5 RAM access______________________________________________________________29
13.6 FIFO access______________________________________________________________31
13.7 Multiple SPI access ________________________________________________________31
14 Microcontroller Interface and Pin Description __________________________________32
14.1 Configuration interface _____________________________________________________32
14.2 Receive mode ____________________________________________________________33
14.3 RXFIFO overflow _________________________________________________________33
14.4 Transmit mode____________________________________________________________34
14.5 General control and status pins _______________________________________________35
15 Demodulator, Symbol Synchroniser and Data Decision ___________________________35
16 Frame Format _____________________________________________________________36
16.1 Synchronisation header _____________________________________________________36
16.2 Length field ______________________________________________________________37
16.3 MAC protocol data unit_____________________________________________________37
16.4 Frame check sequence______________________________________________________38

CC2420
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17 RF Data Buffering__________________________________________________________39
17.1 Buffered transmit mode_____________________________________________________39
17.2 Buffered receive mode _____________________________________________________39
17.3 Unbuffered, serial mode ____________________________________________________40
18 Address Recognition ________________________________________________________41
19 Acknowledge Frames _______________________________________________________41
20 Radio control state machine__________________________________________________43
21 MAC Security Operations (Encryption and Authentication) _______________________45
21.1 Keys____________________________________________________________________45
21.2 Nonce / counter ___________________________________________________________45
21.3 Stand-alone encryption _____________________________________________________46
21.4 In-line security operations___________________________________________________46
21.5 CTR mode encryption / decryption ____________________________________________47
21.6 CBC-MAC_______________________________________________________________47
21.7 CCM ___________________________________________________________________47
21.8 Timing __________________________________________________________________48
22 Linear IF and AGC Settings__________________________________________________48
23 RSSI / Energy Detection _____________________________________________________48
24 Link Quality Indication _____________________________________________________49
25 Clear Channel Assessment ___________________________________________________50
26 Frequency and Channel Programming_________________________________________50
27 VCO and PLL Self-Calibration _______________________________________________51
27.1 VCO____________________________________________________________________51
27.2 PLL self-calibration________________________________________________________51
28 Output Power Programming _________________________________________________51
29 Voltage Regulator __________________________________________________________51
30 Battery Monitor____________________________________________________________52
31 Crystal Oscillator __________________________________________________________53
32 Input / Output Matching ____________________________________________________54
33 Transmitter Test Modes _____________________________________________________54
33.1 Unmodulated carrier _______________________________________________________54
33.2 Modulated spectrum _______________________________________________________55
34 System Considerations and Guidelines _________________________________________57
34.1 Frequency hopping and multi-channel systems___________________________________57
34.2 Data burst transmissions ____________________________________________________57
34.3 Crystal accuracy and drift ___________________________________________________57
34.4 Communication robustness __________________________________________________57
34.5 Communication security ____________________________________________________57
34.6 Low-cost systems _________________________________________________________58
34.7 Battery operated systems____________________________________________________58
34.8 BER / PER measurements___________________________________________________58
35 PCB Layout Recommendations _______________________________________________59
36 Antenna Considerations _____________________________________________________59
37 Configuration Registers _____________________________________________________61
38 Test Output Signals_________________________________________________________81
39 Package Description (QLP 48)________________________________________________83
40 Recommended layout for package (QLP 48) ____________________________________84

CC2420
SWRS041B Page 4 of 89
40.1 Package thermal properties __________________________________________________84
40.2 Soldering information ______________________________________________________84
40.3 Plastic tube specification____________________________________________________85
40.4 Carrier tape and reel specification_____________________________________________85
41 Ordering Information_______________________________________________________85
42 General Information ________________________________________________________86
42.1 Document History _________________________________________________________86
42.2 Product Status Definitions___________________________________________________87
43 Address Information________________________________________________________88
44 TI Worldwide Technical Support _____________________________________________88

CC2420
SWRS041B Page 5 of 89
1 Abbreviations
ADC - Analog to Digital Converter
AES - Advanced Encryption Standard
AGC - Automatic Gain Control
ARIB - Association of Radio Industries and Businesses
BER - Bit Error Rate
CBC-MAC - Cipher Block Chaining Message Authentication Code
CCA - Clear Channel Assessment
CCM - Counter mode + CBC-MAC
CFR - Code of Federal Regulations
CSMA-CA - Carrier Sense Multiple Access with Collision Avoidance
CTR - Counter mode (encryption)
CW - Continuous Wave
DAC - Digital to Analog Converter
DSSS - Direct Sequence Spread Spectrum
ESD - Electro Static Discharge
ESR - Equivalent Series Resistance
EVM - Error Vector Magnitude
FCC - Federal Communications Commission
FCF - Frame Control Field
FIFO - First In First Out
FFCTRL - FIFO and Frame Control
HSSD - High Speed Serial Debug
IEEE - Institute of Electrical and Electronics Engineers
IF - Intermediate Frequency
ISM - Industrial, Scientific and Medical
ITU-T - International Telecommunication Union – Telecommunication
Standardization Sector
I/O - Input / Output
I/Q - In-phase / Quadrature-phase
kbps - kilo bits per second
LNA - Low-Noise Amplifier
LO - Local Oscillator
LQI - Link Quality Indication
LSB - Least Significant Bit / Byte
MAC - Medium Access Control
MFR - MAC Footer
MHR - MAC Header
MIC - Message Integrity Code
MPDU - MAC Protocol Data Unit
MSDU - MAC Service Data Unit
NA - Not Available
NC - Not Connected
O-QPSK - Offset - Quadrature Phase Shift Keying
PA - Power Amplifier
PCB - Printed Circuit Board
PER - Packet Error Rate
PHY - Physical Layer
PHR - PHY Header
PLL - Phase Locked Loop
PSDU - PHY Service Data Unit
QLP - Quad Leadless Package
RAM - Random Access Memory
RBW - Resolution BandWidth
RF - Radio Frequency
RSSI - Receive Signal Strength Indicator
RX - Receive

CC2420
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SHR - Synchronisation Header
SPI - Serial Peripheral Interface
TBD - To Be Decided / To Be Defined
T/R - Transmit / Receive
TX - Transmit
VCO - Voltage Controlled Oscillator
VGA - Variable Gain Amplifier
2 References
[1] IEEE std. 802.15.4 - 2003: Wireless Medium Access Control (MAC) and
Physical Layer (PHY) specifications for Low Rate Wireless Personal Area
Networks (LR-WPANs)
http://standards.ieee.org/getieee802/download/802.15.4-2003.pdf
[2] NIST FIPS Pub 197: Advanced Encryption Standard (AES), Federal
Information Processing Standards Publication 197, US Department of
Commerce/N.I.S.T., November 26, 2001. Available from the NIST website.
http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
[3] R. Housley, D. Whiting, N. Ferguson, Counter with CBC-MAC (CCM),
submitted to NIST, June 3, 2002. Available from the NIST website.
http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/ProposedModesPa
ge.html

CC2420
SWRS041B Page 7 of 89
3 Features
2400 – 2483.5 MHz RF Transceiver
Direct Sequence Spread
Spectrum (DSSS) transceiver
250 kbps data rate, 2 MChip/s
chip rate
O-QPSK with half sine pulse
shaping modulation
Very low current consumption
(RX: 18.8 mA, TX: 17.4 mA)
High sensitivity (-95 dBm)
High adjacent channel rejection
(30/45 dB)
High alternate channel rejection
(53/54 dB)
On-chip VCO, LNA and PA
Low supply voltage (2.1 – 3.6 V)
with on-chip voltage regulator
Programmable output power
I/Q low-IF soft decision receiver
I/Q direct up-conversion
transmitter
Separate transmit and receive FIFOs
128 byte transmit data FIFO
128 byte receive data FIFO
Very few external components
Only reference crystal and a
minimised number of passives
No external filters needed
Easy configuration interface
4-wire SPI interface
Serial clock up to 10 MHz
802.15.4 MAC hardware support:
Automatic preamble generator
Synchronisation word
insertion/detection
CRC-16 computation and
checking over the MAC payload
Clear Channel Assessment
Energy detection / digital RSSI
Link Quality Indication
Full automatic MAC security
(CTR, CBC-MAC, CCM)
802.15.4 MAC hardware security:
Automated security operations
within the receive and transmit
FIFOs.
CTR mode encryption / decryption
CBC-MAC authentication
CCM encryption / decryption and
authentication
Stand-alone AES encryption
Development tools available
Fully equipped development kit
Demonstration board reference
design with microcontroller code
Easy-to-use software for
generating the
CC2420 configu-
ration data
Small size QLP-48 package, 7 x 7 mm
Complies with EN 300 328, EN 300
440 class 2, FCC CFR47 part 15 and
ARIB STD-T66

CC2420
SWRS041B Page 8 of 89
4 Absolute Maximum Ratings
Parameter Min. Max. Units Condition
Supply voltage for on-chip voltage regulator,
VREG_IN pin 43.
-0.3 3.6 V
Supply voltage (VDDIO) for digital I/Os, DVDD3.3,
pin 25.
-0.3 3.6 V
Supply voltage (VDD) on AVDD_VCO, DVDD1.8,
etc (pin no 1, 2, 3, 4, 10, 14, 15, 17, 18, 20, 26, 35,
37, 44 and 48)
−0.3 2.0 V
Voltage on any digital I/O pin, (pin no. 21, 27-34
and 41)
-0.3 VDDIO+0.3, max 3.6 V
Voltage on any other pin, (pin no. 6, 7, 8, 11, 12,
13, 16, 36, 38, 39, 40, 45, 46 and 47)
-0.3 VDD+0.3, max 2.0 V
Input RF level 10 dBm
Storage temperature range −50 150 C
Reflow solder temperature 260 C T = 10 s
The absolute maximum ratings given
above should under no circumstances be
violated. Stress exceeding one or more of
the limiting values may cause permanent
damage to the device.
Caution! ESD sensitive device.
Precaution should be used when handling
the device in order to prevent permanent
damage.
5 Operating Conditions
Parameter Min. Typ. Max. Units Condition
Supply voltage for on-chip voltage regulator,
VREG_IN pin 43.
2.1 3.6 V
Supply voltage (VDDIO) for digital I/Os, DVDD3.3,
pin 25 .
1.6 3.6 V The digital I/O voltage (DVDD3.3 pin)
must match the external interfacing
circuit (e.g. microcontroller).
Supply voltage (VDD) on AVDD_VCO, DVDD1.8,
etc (pin no 1, 2, 3, 4, 10, 14, 15, 17, 18, 20, 26, 35,
37, 44 and 48)
1.6 1.8 2.0 V The typical application uses regulated
1.8 V supply generated by the on-chip
voltage regulator.
Operating ambient temperature range, TA−40 85 C

CC2420
SWRS041B Page 9 of 89
6 Electrical Specifications
Measured on CC2420 EM with transmission line balun, TA= 25 C, DVDD3.3 and VREG_IN = 3.3 V, internal
voltage regulator used if nothing else stated.
6.1 Overall
Parameter Min. Typ. Max. Unit Condition / Note
RF Frequency Range 2400 2483.5 MHz Programmable in 1 MHz steps, 5
MHz steps for compliance with [1]
6.2 Transmit Section
Parameter Min. Typ. Max. Unit Condition / Note
Transmit bit rate 250 250 kbps As defined by [1]
Transmit chip rate 2000 2000 kChips/s As defined by [1]
Nominal output power -3 0 dBm Delivered to a single ended 50 
load through a balun.
[1] requires minimum –3 dBm
Programmable output power range
24 dB The output power is
programmable in 8 steps from
approximately –24 to 0 dBm.
Harmonics
2nd harmonic
3rd harmonic
-44
-64
dBm
dBm
Measured conducted with 1 MHz
resolution bandwidth on spectrum
analyser. At max output power
delivered to a single ended 50 
load through a balun. See page
54.
Spurious emission
30 - 1000 MHz
1– 12.75 GHz
1.8 – 1.9 GHz
5.15 – 5.3 GHz
-56
-44
-56
-51
dBm
dBm
dBm
dBm
Maximum output power.
Complies with EN 300 328, EN
300 440, FCC CFR47 Part 15
and ARIB STD-T-66
Error Vector Magnitude (EVM) 11 % Measured as defined by [1]
[1] requires max. 35 %
Optimum load impedance 95
+ j187
 Differential impedance as seen
from the RF-port (RF_P and
RF_N) towards the antenna. For
matching details see the Input /
Output Matching section on page
54.

CC2420
SWRS041B Page 10 of 89
6.3 Receive Section
Parameter Min. Typ. Max. Unit Condition / Note
Receiver Sensitivity
-90 -95 dBm PER = 1%, as specified by [1]
Measured in a 50single-ended
load through a balun.
[1] requires –85 dBm
Saturation (maximum input level) 0 10 dBm PER = 1%, as specified by [1]
Measured in a 50single–ended
load through a balun.
[1] requires –20 dBm
Adjacent channel rejection
+ 5 MHz channel spacing 45 dB
Wanted signal @ -82 dBm,
adjacent modulated channel at
+5 MHz, PER = 1 %, as specified
by [1].
[1] requires 0 dB
Adjacent channel rejection
- 5 MHz channel spacing 30 dB
Wanted signal @ -82 dBm,
adjacent modulated channel at
-5 MHz, PER = 1 %, as specified
by [1].
[1] requires 0 dB
Alternate channel rejection
+ 10 MHz channel spacing 54 dB
Wanted signal @ -82 dBm,
adjacent modulated channel at
+10 MHz, PER = 1 %, as
specified by [1]
[1] requires 30 dB
Alternate channel rejection
- 10 MHz channel spacing 53 dB
Wanted signal @ -82 dBm,
adjacent modulated channel at
-10 MHz, PER = 1 %, as
specified by [1]
[1] requires 30 dB
Channel rejection
≥+ 15 MHz
≤- 15 MHz
62
62
dB
dB
Wanted signal @ -82 dBm.
Undesired signal is an IEEE
802.15.4 modulated channel,
stepped through all channels
from 2405 to 2480 MHz. Signal
level for PER = 1%.
Co-channel rejection
-3
dB
Wanted signal @ -82 dBm.
Undesired signal is an IEEE
802.15.4 modulated at the same
frequency as the desired signal.
Signal level for PER = 1%.
Blocking / Desensitisation
+/- 5 MHz from band edge
+/- 20 MHz from band edge
+/- 30 MHz from band edge
+/- 50 MHz from band edge
-28
-28
-27
-28
dBm
dBm
dBm
dBm
Wanted signal 3 dB above the
sensitivity level, CW jammer,
PER = 1%. Complies with EN
300 440 class 2.
Spurious emission
30 – 1000 MHz
1 – 12.75 GHz
-73
-58
dBm
dBm
Conducted measurement in a 50
single ended load. Measured
according to EN 300 328, EN 300
440 class 2, FCC CFR47, Part 15
and ARIB STD-T-66