Transcend TS128GSSD18M-M Manual

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Transcend Information Inc.
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Description
DescriptionDescription
Description
Transcend’s 1.8" Solid State Drive (SSD) advanced,
eSATA / USB 2.0 external storage device is the
perfect way to add an extra hard drive to your
computer for downloading, backing up, and
transporting and your data. With both eSATA and
USB 2.0 connection options, the SSD18M gives you
the ultimate in flexibility. The USB interface provides
maximum compatibility with all types of notebooks
and PCs, while the new high-speed eSATA interface
gives you the maximum performance possible from
your SSD with transfer speeds up to 90MB/s.
Combining portability, reliability, and elegant exterior,
the SSD18M is the perfect choice for downloading,
backing up, and transporting all your data.
Placement
PlacementPlacement
Placement
Features
Features Features
Features
•Build-in 1.8” high-speed solid state drive
•Slim, lightweight, pocket-friendly size
•Faster and more durable than 1.8”/2.5” hard drives
•Two connection options: eSATA or USB2.0
•Shock and vibration resistance
•LED indicator light
Dimensions
DimensionsDimensions
Dimensions
Side Millimeters Inches
A 80.00 ±1.00 3.150 ±0.040
B 50.00 ±1.00 1.969 ±0.040
C 12.50 ±1.00 0.492 ±0.040

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Specifications
SpecificationsSpecifications
Specifications
Physical Specification
Form Factor 1.8 inch solid state drive
Storage Capacities 32 GB to 128 GB
Length 80.00 ±1.00
Width 50.00 ±1.00
Dimensions (mm)
Height 12.50 ±1.00
Input Voltage DC 5V (from USB port)
Weight 50g (Max)
Connector eSATA 7 pins
USB 4 pins
Environmental Specifications
Operating Temperature 0
℃ (32 ℉ ) to 70 ℃ (158 ℉ )
Storage Temperature -30
℃ (-22 ℉ ) to 70 ℃ (158 ℉ )
Reliability
Data Reliability Supports BCH ECC 8 bits in 512 bytes
Data Retention 10 years
MTBF 1,500,000 hours
Regulations
Compliance CE, FCC and BSMI
Performance
Model P/N Interface Max. Read
(MB/s)
Max. Write
(MB/s)
USB 35 25
TS32/64/128GSSD18M-M eSATA 90 50

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Package Dimensions
Package DimensionsPackage Dimensions
Package Dimensions
Below figure illustrates the Transcend 1.8 inch Portable Solid State Drive. All dimensions are in mm.

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Pin Assignments
Pin AssignmentsPin Assignments
Pin Assignments
Pinouts (USB)
Pin No. Pin Name
01 VCC
02 USB-
03 USB+
04 VSS
Pinouts (eSATA)
Pin No. Pin Name
01 VSS
02 TX+
03 TX-
04 VSS
05 RX-
06 RX+
07 VSS
Pin Identification (USB)
Symbol Function
USB-
USB+
USB differential signal
The pair are used to transmit
Data/Address/Command
VCC USB Cable Power Detector
VSS Ground
Pin Identification (eSATA)
Symbol Function
TX+/TX-
RX+/RX-
eSATA differential signal
The two pairs are used to transmit
Data/Address/Command
VSS Ground

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Block Diagram
Block DiagramBlock Diagram
Block Diagram

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Reliability
Reliability Reliability
Reliability
Wear-Leveling algorithm
The controller supports static/dynamic wear leveling. When the host writes data, the controller will find and use the block
with the lowest erase count among the free blocks. This is known as dynamic wear leveling. When the free blocks' erase
count is higher than the data blocks', it will activate the static wear leveling, replacing the not so frequently used user
blocks with the high erase count free blocks.
ECC algorithm
The controller use BCH8 ECC algorithm per 512 bytes. BCH8 can correct up to 8 random error bits within 512 data bytes.
Bad-block management
When the flash encounters ECC failed, program fail or erase fail, the controller will mark the block as bad block to prevent
the used of this block and caused data lost later on.

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S
SS
SATA Interface
ATA InterfaceATA Interface
ATA Interface
Out of bank signaling
There shall be three Out Of Band (OOB) signals used/detected by the Phy: COMRESET, COMINIT, and COMWAKE.
COMINIT, COMRESET and COMWAKE OOB signaling shall be achieved by transmission of either a burst of four Gen1
ALIGN
P
primitives or a burst composed of four Gen1 Dwords with each Dword composed of four D24.3 characters, each
burst having a duration of 160 UI
OOB
. Each burst is followed by idle periods (at common-mode levels), having durations as
depicted in Figure 4 and Table 2.
Figure 4 : OOB signals
Table 2 : OOB signal times

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V1.2
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COMRESET
COMRESET always originates from the host controller, and forces a hardware reset in the device. It is indicated by
transmitting bursts of data separated by an idle bus condition. The OOB COMRESET signal shall consist of no less than six
data bursts, including inter-burst temporal spacing. The COMRESET signal shall be:
1) Sustained/continued uninterrupted as long as the system hard reset is asserted, or
2) Started during the system hardware reset and ended some time after the negation of system hardware reset, or
3) Transmitted immediately following the negation of the system hardware reset signal.
The host controller shall ignore any signal received from the device from the assertion of the hardware reset signal until the
COMRESET signal is transmitted. Each burst shall be 160 Gen1 UI’s long (106.7 ns) and each inter-burst idle state shall be
480 Gen1 UI’s long (320 ns). A COMRESET detector looksfor four consecutive bursts with 320 ns spacing (nominal). Any
spacing less than 175 ns or greater than 525 ns shall invalidate the COMRESET detector output. The COMRESET
interface signal to the Phy layer shall initiate the Reset sequence shown in Figure 5 below. The interface shall be held
inactive for at least 525 ns after the last burst to ensure far-end detector detects the negation properly.
Figure 5 : comreset sequence
Description:
1. Host/device are powered and operating normally with some form of active communication.

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2. Some condition in the host causes the host to issue COMRESET
3. Host releases COMRESET. Once the condition causing the COMRESET is released, the host releases the COMRESET
signal and puts the bus in a quiescent condition.
4. Device issues COMINIT – When the device detects the release of COMRESET, it responds with a COMINIT. This is also
the entry point if the device is late starting. The device may initiate communications at any time by issuing a COMINIT.
5. Host calibrates and issues a COMWAKE.
6. Device responds – The device detects the COMWAKE sequence on its RX pair and calibrates its transmitter (optional).
Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the ALIGN
sequence starting at the device's highest supported speed. After ALIGNP Dwords have been sent
for 54.6us (2048 nominal Gen1 Dword times) without a response from the host as determined by detection of ALIGNP
primitives received from the host, the device assumes that the host cannot communicate at that speed. If additional speeds
are available the device tries the next lower supported speed by sending ALIGNP Dwords at that rate for
54.6 us (2048 nominal Gen1 Dword times.) This step is repeated for as many slower speeds as are supported. Once the
lowest speed has been reached without response from the host, the device enters an error state.
7. Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate.
Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at
the same speed as received. A host shall be designed such that it acquires lock in 54.6us (2048
nominal Gen1 Dword times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword
times) after detecting the release of COMWAKE to receive the first ALIGNP. This ensures interoperability with
multi-generational and synchronous designs. If no ALIGNP is received within 873.8 us (32768 nominal Gen1 Dword times)
the host restarts the power-on sequence – repeating indefinitely until told to stop by the Application layer.
8. Device locks – the device locks to the ALIGN sequence and, when ready, sends SYNCP indicating it is ready to start
normal operation.
9. Upon receipt of three back-to-back non-ALIGNP primitives, the communication link is established and normal operation
may begin.
COMINIT
COMINIT always originates from the drive and requests a communication initialization. It is electrically identical to the
COMRESET signal except that it originates from the device and is sent to the host. It is used by the device to request a
reset from the host in accordance to the sequence shown in Figure 6, below.

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Figure 6 : cominit sequence
Description:
1. Host/device are powered and operating normally with some form of active communication.
2. Some condition in the device causes the device to issues a COMINIT
3. Host calibrates and issues a COMWAKE.
4. Device responds – The device detects the COMWAKE sequence on its RX pair and calibrates its transmitter (optional).
Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the ALIGN
sequence starting at the device's highest supported speed. After ALIGN
P
Dwords have been sent for 54.6 us (2048 nominal
Gen1 Dword times) without a response from the host as determined by detection of ALIGN
P
primitives received from the
host, the device assumes that the host cannot communicate at that speed. If additional speeds are available the
device tries the next lower supported speed by sending ALIGN
P
Dwords at that rate for 54.6 us (2048 nominal Gen1 Dword
times.) This step is repeated for as many slower speeds as are supported. Once the lowest speed has been reached
without response from the host, the device enters an error state.
5. Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate.
Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at
the same speed as received. A host shall be designed such that it acquires lock in 54.6 us (2048 nominal Gen1 Dword

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times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword times) after detecting
the release of COMWAKE to receive the first ALIGN P . This ensures interoperability with multi-generational and
synchronous designs. If no ALIGN P is received within 873.8 us (32768 nominal Gen1 Dword times) the host restarts the
power-on sequence – repeating indefinitely until told to stop by the Application layer. 6. Device locks – the device locks to
the ALIGN sequence and, when ready, sends SYNC P indicating it is ready to start normal operation.
6. Upon receipt of three back-to-back non-ALIGN P primitives, the communication link is established and normal operation
may begin.
Power on sequence timing diagram
The following timing diagrams and descriptions are provided for clarity and are informative.
Figure 7 : power on sequence

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Description:
1. Host/device power-off - Host and device power-off.
2. Power is applied - Host side signal conditioning pulls TX and RX pairs to neutral state (common mode voltage).
3. Host issues COMRESET
4. Host releases COMRESET. Once the power-on reset is released, the host releases the COMRESET signal and puts the
bus in a quiescent condition.
5. Device issues COMINIT – When the device detects the release of COMRESET, it responds with a COMINIT. This is also
the entry point if the device is late starting. The device may initiate communications at any time by issuing a COMINIT.
6. Host calibrates and issues a COMWAKE.
7. Device responds – The device detects the COMWAKE sequence on its RX pair and calibrates its transmitter (optional).
Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the ALIGN
sequence starting at the device's highest supported speed. After ALIGN P primitives have been sent for 54.6 us (2048
nominal Gen1 Dword times) without a response from the host as determined by detection of ALIGN P primitives received
from the host, the device assumes that the host cannot communicate at that speed. If additional speeds are available the
device tries the next lower supported speed by sending ALIGN P primitives at that rate for 54.6 us (2048 nominal Gen1
Dword times.) This step is repeated for as many slower speeds as are supported. Once the lowest speed has been reached
without response from the host, the device shall enter an error state.
8. Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate.
Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at
the same speed as received. A host shall be designed such that it acquires lock in 54.6 us (2048 nominal Gen1 Dword
times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword times) after detecting
the release of COMWAKE to receive the first ALIGN P . This insures interoperability with multi-generational and synchronous
designs. If no ALIGN P is received within 873.8 us (32768 nominal Gen1 Dword times) the host restarts the power-on
sequence – repeating indefinitely until told to stop by the Application layer.
9. Device locks – the device locks to the ALIGN sequence and, when ready, sends the SYNC P primitive indicating it is ready
to start normal operation.
10. Upon receipt of three back-to-back non-ALIGN P primitives, the communication link is established and normal operation
may begin.

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ATA command register
This table with the following paragraphs summarizes the ATA command set.
Command Table
PARAMETERS USED
Command Name Code SC SN CY DR HD FT
CHECK POWER MODE E5h X X X O X X
EXECUTE DIAGNOSTICS 90h X X X O X X
FLUSH CACHE E7h X X X O O X
FLUSH CACHE EXT EAh X X X O O X
IDENTIFY DEVICE ECh X X X O X X
IDLE E3h O X X O X X
IDLE IMMEDIATE E1h X X X O X X
INITIALIZE DEVICE PARAMETERS
91h O X X O O X
READ BUFFER E4h X X X O X X
READ DMA C8h or C9h O O O O O X
READ DMA EXT 25h O O O O O X
READ FPDMA QUEUED 60h O O O O O O
READ LOG EXT 2Fh O O O O O O
READ MULTIPLE C4h O O O O O X
READ MULTIPLE EXT 29h O O O O O X
READ SECTOR(S) 20h or 21h O O O O O X
READ SECTOR(S) EXT 24h O O O O O X
READ VERIFY SECTOR(S) 40h or 41h O O O O O X
READ VERIFY SECTOR(S) EXT 42h O O O O O X
RECALIBRATE 10h X X X O X X
SEEK 7xh X X O O O X
SET FEATURES EFh O X X O X O
SET MULTIPLE MODE C6h O X X O X X
SLEEP E6h X X X O X X
SMART B0h X X O O X O
STANDBY E2h X X X O X X
STANDBY IMMEDIATE E0h X X X O X X
WRITE BUFFER E8h X X X O X X

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WRITE DMA CAh or CBh O O O O O X
WRITE DMA EXT 35h O O O O O X
WRITE DMA FUA EXT 3Dh O O O O O X
WRITE FPDMA QUEUED 61h O O O O O O
WRITE MULTIPLE C5h O O O O O X
WRITE MULTIPLE EXT 39h O O O O O X
WRITE MULTIPLE FUA EXT CEh O O O O O X
WRITE SECTOR(S) 30h or 31h O O O O O X
WRITE SECTOR(S) EXT 34h O O O O O X
Note:
O = Valid, X = Don't care
SC = Sector Count Register
SN = Sector Number Register
CY = Cylinder Low/High Register
DR = DEVICE SELECT Bit (DEVICE/HEAD Register Bit 4)
HD = HEAD SELECT Bit (DEVICE/HEAD Register Bit 3-0)
FT = Features Register

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ATA Command Specifications
ATA Command SpecificationsATA Command Specifications
ATA Command Specifications
CHECK POWER MODE (E5h)
The host can use this command to determine the current power management mode.
EXECUTE DIAGNOSTICS (90h)
This command performs the internal diagnostic tests implemented by the drive.
FLUSH CACHE (E7h)
This command is used by the host to request the device to flush the write cache. If there is data in the write cache, that data
shall be written to the media. The BSY bit shall remain set to one until all data has been successfully written or an error
occurs.
FLUSH CACHE EXT (EAh)
48-bit feature set mandatory command. This command is used by the host to request the device to flush the write cache. If
there is data in the write cache, that data shall be written to the media. The BSY bit shall remain set to one until all data has
been successfully written or an error occurs.
IDENTIFY DEVICE (ECh)
This commands read out 512Bytes of drive parameter information. Parameter Information consists of the arrangement and
value as shown in the following table. This command enables the host to receive the Identify Drive Information from the
device.

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Identify Device Information Default Value
Word Value F/V Description
0 0040h
F
X
X
X
V
X
General configuration bit-significant information:
15 0 = ATA device
14-8 Retired
7-6 Obsolete
5-3 Retired
2 Reserved
1 Retired
0 Reserved
1 3FFFh F Number of logical cylinders
2 C837h V Specific configuration
3 0010h F Number of logical heads
4-5 0000h X Retired
6 003Fh F Number of logical sector per logical track
7-8 0000h Reserved for assignment by the CompactFlash_ Association
9 0000h X Retired
10-19 XXXXh F Serial number (20 ASCII characters)
20-21 0000h X Retired
22 0000h X Obsolete
23-26 XXXXh F Firmware revision (8 ASCII characters)
27-46 XXXXh F Model number (40 ASCII characters)
47 8001h F
F
F
15-8 80h
7-0 00h = Reserved
01h = Maximum number of 1 sectors on READ/WRITE MULTIPLE commands
48 0000h F Reserved
49 2F00h
F
F
F
F
F
X
Capabilities
15-14 Reserved for the IDENTIFY PACKET DEVICE command.
13 1 = Standby timer values as specified in this standard are supported
0 = Standby timer values shall be managed by the device
12 Reserved for the IDENTIFY PACKET DEVICE command.
11 1 = IORDY supported
0 = IORDY may be supported
10 1 = IORDY may be disabled
9 1 = LBA supported
8 1 = DMA supported.
7-0 Retired
50 4000h
F
F
X
F
Capabilities
15 Shall be cleared to zero.
14 Shall be set to one.
13-2 Reserved.
1 Obsolete
0 Shall be set to one to indicate a device specific Standby timer value minimum.

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51 0000h
F 15-8 PIO data transfer cycle timing mode
7-0 Reserved
52 0000h X Obsolete
53 0007h
F
F
F
X
15-3 Reserved
2 1 = the fields reported in word 88 are valid
0 = the fields reported in word 88 are not valid
1 1 = the fields reported in words 70:64 are valid
0 = the fields reported in words 70:64 are not valid
0 1 = the fields reported in words 58:54 are valid
0 = the fields reported in words 58:54 are not valid
54 XXXXh X Number of current cylinders
55 00XXh X Number of current heads
56 XXXXh X Number of current sector per track
57-58 XXXXh X Current capacity in sectors
59 0101h
V
V
15-9 Reserved
8 1 = Multiple sector setting is valid
7-0 xxh = Setting for number of sectors that shall be transferred per interrupt on R/W Multiple
command
60-61 XXXXh F Total number of user addressable sectors
62 0000h X Obsolete
63 0007h
F
V
V
V
F
F
F
15-11 Reserved
10 1 = Multiword DMA mode 2 is selected
0 = Multiword DMA mode 2 is not selected
9 1 = Multiword DMA mode 1 is selected
0 = Multiword DMA mode 1 is not selected
8 1 = Multiword DMA mode 0 is selected
0 = Multiword DMA mode 0 is not selected
7-3 Reserved
2 1 = Multiword DMA mode 2 and below are supported
1 1 = Multiword DMA mode 1 and below are supported
0 1 = Multiword DMA mode 0 is supported
64 0003h
F
15-8 Reserved
7-0 Advanced PIO modes supported
65 0078h F Minimum Multiword DMA transfer cycle time per word
66 0078h F Manufacturer’s recommended Multiword DMA transfer cycle time
67 0078h F Minimum PIO transfer cycle time without flow control
68 0078h F Minimum PIO transfer cycle time with IORDY flow control
69-70 0000h Reserved
71-74 0000h Reserved for the IDENTIFY PACKET DEVICE command
75 0000h
F
Queue depth
15-5 Reserved
4-0 Maximum queue depth – 1

T
T
TS
S
S3
3
32
2
2/
/
/6
6
64
4
4/
/
/1
1
12
2
28
8
8G
G
GS
S
SS
S
SD
D
D1
1
18
8
8M
M
M-
-
-M
M
M
1.8” Portable Solid State Drive
Transcend Information Inc.
V1.2
18
76 0206h
F
F
F
F
F
F
Serial ATA Capabilities
15-11 Reserved for Serial ATA
10 1 = Supports Phy Event Counts
9 1 = Supports receipt of host initiated power management requests
8 1 = Supports the NCQ feature set
7-3 Reserved for Serial ATA
2 1 = Supports SATA Gen2 Signaling Speed (3.0Gb/s)
1 1 = Supports SATA Gen1 Signaling Speed (1.5Gb/s)
0 Shall be cleared to zero
77 0000h Reserved for Serial ATA
78 0008h
F
F
F
F
F
F
Serial ATA feature supported
15-7 Reserved for Serial ATA
6 1 = Device supports Software Settings Preservation
5 Reserved for Serial ATA
4 1 = Device supports in-order data delivery
3 1 = Device supports initiating power management
2 1 = Device supports DMA Setup auto-activation
1 1 = Device supports non-zero buffer offsets
0 Shall be cleared to zero
79 0000h
V
V
V
V
V
F
Serial ATA feature enabled
15-7 Reserved for Serial ATA
6 1 = Software Settings Preservation enabled
5 Reserved for Serial ATA
4 1 = In-order data delivery enabled
3 1 = Device initiated power management enabled
2 1 = DMA Setup auto-activation enabled
1 1 = Non-zero buffer offsets enabled
0 Shall be cleared to zero
80 00F0h
F
F
F
F
F
F
F
F
F
F
F
F
X
X
Major version number 0000h or FFFFh = device does not report version
15 Reserved
14 Reserved for ATA/ATAPI-14
13 Reserved for ATA/ATAPI-13
12 Reserved for ATA/ATAPI-12
11 Reserved for ATA/ATAPI-11
10 Reserved for ATA/ATAPI-10
9 Reserved for ATA/ATAPI-9
8 Reserved for ATA/ATAPI-8
7 1 = supports ATA/ATAPI-7
6 1 = supports ATA/ATAPI-6
5 1 = supports ATA/ATAPI-5
4 1 = supports ATA/ATAPI-4
3 Obsolete
2 Obsolete
1 Obsolete
0 Reserved
81 0000h F Minor version number

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3
32
2
2/
/
/6
6
64
4
4/
/
/1
1
12
2
28
8
8G
G
GS
S
SS
S
SD
D
D1
1
18
8
8M
M
M-
-
-M
M
M
1.8” Portable Solid State Drive
Transcend Information Inc.
V1.2
19
82 302Bh
X
F
F
F
X
F
F
F
F
F
F
F
F
F
F
F
Command and feature sets supported
15 Obsolete
14 1 = NOP command supported
13 1 = READ BUFFER command supported
12 1 = WRITE BUFFER command supported
11 Obsolete
10 1 = Host Protected Area feature set supported
9 1 = DEVICE RESET command supported
8 1 = SERVICE interrupt supported
7 1 = release interrupt supported
6 1 = look-ahead supported
5 1 = write cache supported
4 Shall be cleared to zero to indicate that the PACKET Command feature set is not supported.
3 1 = mandatory Power Management feature set supported
2 1 = Removable Media feature set supported
1 1 = Security Mode feature set supported
0 1 = SMART feature set supported
83 5000h
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
Command and feature sets supported
15 Shall be cleared to zero
14 Shall be set to one
13 1 = The FLUSH CACHE EXT command is supported
12 Shall be set to one to indicate that the mandatory FLUSH CACHE command is supported
11 1 = The DCO feature set is supported
10 1 = The 48-bit Address feature set is suported
9 1 = The AAM feature set is supported
8 1 = SET MAX security extension supported
7 Reserved
6 1 = SET FEATURES subcommand required to spinup after power-up
5 1 = Power-Up In Standby feature set supported
4 1 = Removable Media Status Notification feature set supported
3 1 = Advanced Power Management feature set supported
2 1 = CFA feature set supported
1 1 = READ/WRITE DMA QUEUED supported
0 1 = DOWNLOAD MICROCODE command supported
84 4000h
F
F
F
X
F
F
F
F
F
F
F
F
F
Command and feature sets supported
15 Shall be cleared to zero
14 Shall be set to one
13 1 = The IDLE IMMEDIATE command with UNLOAD feature is supported
12-11 Reserved for TLC
10-9 Obsolete
8 1 = The 64-bit World wide name is supported
7 1 = The WRITE DMA QUEUED FUA EXT command is supported
6 1 = The WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands are supported
5 1 = The GPL feature set is supported
4 1 = The Streaming feature set is supported
3 1 = The Media Card Pass Through Command feature set is supported
2 1 = Media serial number is supported
1 1 = SMART self-test supported
0 1 = SMART error logging supported

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S3
3
32
2
2/
/
/6
6
64
4
4/
/
/1
1
12
2
28
8
8G
G
GS
S
SS
S
SD
D
D1
1
18
8
8M
M
M-
-
-M
M
M
1.8” Portable Solid State Drive
Transcend Information Inc.
V1.2
20
85 3029h
X
F
F
F
X
V
F
V
V
V
V
F
F
X
V
V
Command and feature sets supported or enable
15 Obsolete
14 1 = The NOP command is supported
13 1 = The READ BUFFER command is supported
12 1 = The WRITE BUFFER command is supported
11 Obsolete
10 1 = HPA feature set is supported
9 Shall be cleared to zero to indicate that the DEVICE RESET command is not supported
8 1 = The SERVICE interrupt is enabled
7 1 = The release interrupt is enabled
6 1 = Read look-ahead is enabled
5 1 = The volatile write cache is enabled
4 Shall be cleared to zero to indicate that the PACKET Command feature set is not supported.
3 Shall be set to one to indicate that the mandatory Power Management feature is supported
2 Obsolete
1 1 = The Security feature set is enabled
0 1 = The SMART feature set is enabled
86 1000h
F
F
F
F
F
V
V
F
V
X
V
F
F
F
Command and feature sets supported or enable
15 1 = Words 119-120 are valid
14 Reserved
13 1 = FLUSH CACHE EXT command supported
12 1 = FLUSH CACHE command supported
11 1 = The DCO feature set is supported
10 1 = The 48-bit Address feature set is supported
9 1 = The AAM feature set is enable
8 1 = The SET MAX security extension is enabled by SET MAX SET PASSWORD
7 Reserved for Address Offset Reserved Area Boot Method
6 1 = SET FEATURES subcommand required to spin-up after power-up
5 1 = The PUIS feature set is enabled
4 Obsolete
3 1 = The APM feature set is enabled
2 1 = The CFA feature set is supported
1 1 = The TCQ feature set is supported
0 1 = The DOWNLOAD MICROCODE command is supported
87 4000h
F
F
F
X
F
F
F
F
X
V
V
F
F
Command and feature sets supported or enabled
15 Shall be cleared to zero
14 Shall be set to one
13 1 = The IDLE IMMEDIATE command with UNLOAD feature is supported
12-11 Reserved for TLC
10-9 Obsolete
8 1 = The 64-bit World wide name is supported
7 1 = The WRITE DMA QUEUED FUA EXT command is supported
6 1 = The WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands are supported
5 1 = The GPL feature set is supported
4 Obsolete
3 1 = The Media Card Pass Through Command feature set is supported
2 1 = Media serial number is supported
1 1 = SMART self-test supported
0 1 = SMART error logging supported