ADLINK Technology LEC-BTS Use and care manual

Leading EDGE COMPUTING
LEC-BTS
Technical Reference
Low Energy Computer On Module with
Intel® Atom™ E3800 Series and N2807 Celeron® Processors
Manual Rev.: 2.1
Revision Date: May 3, 2018
Part Number: 50-1Z173-1020

ii Preface
Preface
Disclaimer
Information in this document is provided in connection with ADLINK products. No license,
express or implied, by estoppel or otherwise, to any intellectual property rights is granted by
this document. Except as provided in ADLINK´s Terms and Conditions of Sale for such prod-
ucts, ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or implied
warranty, relating to sale and/or use of ADLINK products including liability or warranties relat-
ing to fitness for a particular purpose, merchantability, or infringement of any patent, copy-
right or other intellectual property right. If you intend to use ADLINK products in or as medical
devices, you are solely responsible for all required regulatory compliance, including, without
limitation, Title 21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, if
any. ADLINK may make changes to specifications and product descriptions at any time, with-
out notice.
Trademarks
Product names mentioned herein are used for identification purposes only and may be trade-
marks and/or registered trademarks of their respective companies.
Revision History
© Copyright 2016, 2017, 2018 ADLINK Technology, Incorporated
www.adlinktech.com
This document contains proprietary information protected by copyright. All rights are
reserved. No part of this manual may be reproduced by any mechanical, electronic, or other
means in any form without prior written permission of the manufacturer.
Audience
This manual provides reference only for computer design engineers, including but not limited
to hardware and software designers and applications engineers. ADLINK Technology, Inc.
assumes you are qualified to design and implement prototype computer equipment.
Revision Date Description of Change(s)
1.00 Mar/16 Initial Release
2.00 Jul/16 Added Chapter 4, Utilities; updated SMARC signals, in Table 3-2 on
page 14; added Electrical Specifications section to Chapter 1
2.1 May/18 Removed heatsink as an option from section 1.4.6

Preface iii
LEC-BTS
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global environmen-
tal preservation through compliance with the European Union's Restriction
of Hazardous Substances (RoHS) directive and Waste Electrical and Elec-
tronic Equipment (WEEE) directive. Environmental protection is a top prior-
ity for ADLINK. We have enforced measures to ensure that our products,
manufacturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their end of
life, our customers are encouraged to dispose of them in accordance with
the product disposal and/or recovery programs prescribed by their nation
or company.
Battery Labels (for products with battery)
California Proposition 65 Warning
WARNING: This product can expose you to chemicals including acrylamide, arse-
nic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Diox-
ane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials,
which are known to the State of California to cause cancer, and acrylamide, benzene, cad-
mium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl
materials, which are known to the State of California to cause birth defects or other reproduc-
tive harm. For more information go to www.P65Warnings.ca.gov.
Conventions
The following conventions may be used throughout this manual, denoting special levels of
information.
This information adds clarity or specifics to text
and illustrations.
This information indicates the possibility of minor
physical injury, component damage, data loss,
and/or program corruption.
This information warns of possible serious physi-
cal injury, component damage, data loss, and/or
program corruption.
ᑜ㔚ᳰ⺧࿁ᡴ

iv Preface
Important Safety Instructions
For user safety, please read and follow all Instructions, WARNINGs, CAUTIONs, and
NOTEs marked in this manual and on the associated equipment before handling/operating
the equipment.
Read these safety instructions carefully.
Keep this manual for future reference.
Read the specifications section of this manual for detailed information on the operating
environment of this equipment.
Turn off power and unplug any power cords/cables when installing/mounting or un-install-
ing/removing equipment.
To avoid electrical shock and/or damage to equipment:
Keep equipment away from water or liquid sources;
Keep equipment away from high heat or high humidity;
Keep equipment properly ventilated (do not block or cover ventilation openings);
Make sure to use recommended voltage and power source settings;
Always install and operate equipment near an easily accessible electrical socket-
outlet;
Secure the power cord (do not place any object on/over the power cord);
Only install/attach and operate equipment on stable surfaces and/or recommended
mountings; and,
If the equipment will not be used for long periods of time, turn off the power source and
unplug the equipment.

Table of Contents v
LEC-BTS
Table of Contents
Preface .................................................................................................................................. ii
1 Overview ......................................................................................................................... 1
1.1 Block Diagram ....................................................................................................................... 1
1.2 Major Components (ICs) ........................................................................................................2
1.3 Connectors, Switches, and LEDs ..........................................................................................3
1.4 Specifications ......................................................................................................................... 6
1.4.1 Physical Specifications ..................................................................................................6
1.4.2 Mechanical Specifications .............................................................................................6
1.4.3 Electrical Specifications .................................................................................................7
1.4.4 Power Specifications .....................................................................................................7
1.4.5 Environmental Specifications .........................................................................................7
1.4.6 Thermal/Cooling Requirements .....................................................................................8
2 Hardware .......................................................................................................................... 9
2.1 CPU ....................................................................................................................................... 9
2.2 Memory ..................................................................................................................................9
2.3 I210 LAN Controller ...............................................................................................................9
2.4 SMBus Slave Addresses .......................................................................................................9
2.5 Getting Started ....................................................................................................................... 9
3 Interfaces ....................................................................................................................... 11
3.1 18/24 Bit LVDS LCD ...........................................................................................................11
3.2 HDMI (High-Definition Multimedia Interface) ....................................................................... 11
3.3 Camera CSI .........................................................................................................................12
3.4 Audio (HDA) .........................................................................................................................12
3.5 PCI Express (PCIe) .............................................................................................................12
3.6 Gigabit Ethernet ..................................................................................................................12
3.7 USB Ports ............................................................................................................................12
3.7.1 USB2.0 ........................................................................................................................12
3.7.2 USB 3.0 .......................................................................................................................12
3.8 SATA ................................................................................................................................... 12
3.9 I2C Bus ................................................................................................................................12
3.10 SPI .......................................................................................................................................12
3.11 Serial (UART) ......................................................................................................................13
3.12 I2S ....................................................................................................................................... 13
3.13 SD/SDIO Interface ...............................................................................................................13
3.14 eMMC Interface ................................................................................................................... 13
3.15 GPIO .................................................................................................................................... 13
3.16 LPC Debug ..........................................................................................................................13
3.17 SMARC Interface Signals ....................................................................................................14
3.18 Debug (DB40) ......................................................................................................................22

vi Table of Contents
4 Utilities ........................................................................................................................... 23
4.1 BIOS ................................................................................................................................... 23
4.1.1 Starting the BIOS Setup Utility .................................................................................... 23
4.1.2 Main Menu .................................................................................................................. 24
4.1.3 Advanced Menu ..........................................................................................................29
4.1.4 Security Menu ............................................................................................................ 54
4.1.5 Boot ............................................................................................................................ 55
4.1.6 Save & Exit .................................................................................................................. 58
4.2 SEMA functions ................................................................................................................... 59
4.2.1 Board Specific SEMA functions .................................................................................. 59
4.3 Watchdog Timer .................................................................................................................. 61
4.4 Temperature Sensors .........................................................................................................61
4.5 Programming Examples ...................................................................................................... 61
Appendix A Technical Support ........................................................................................ 63

Overview 1
LEC-BTS
1 Overview
This manual presents a general overview of the LEC-BTS. After reviewing this document you
should understand the following perspectives of the LEC-BTS.
Feature Overview
Hardware Functions
Interface Signal Definitions
Utility Definitions
Contact Information
NOTE: Refer to http://www.sget.org/standards/smarc.html for SMARC specifications. Please
refer to BSP readme documents in the Quick Drive for BSP installation instructions.
1.1 Block Diagram
Figure 1-1 represents the component functions of the module.
Figure 1-1: Functional Block Diagram
314-pin Golden finger
Intel®
Bay Trail-I
SoC
DDR3L
Memory
down
2/4 GB
PMIC
IDTP9145
DDI1 (HDMI)
Audio (HDA or I2S)
2x I2C (LCD/GP)
Camera Support (CSI 4L/1L)
PCIe x1, PCIe port 1,2,3
MMC (8bit)
1x USB3.0 host on AFB
2x SATA
SDIO x4
Power Management
3x USB2.0 host
2x Serial (incl. RTS/CTS) + PCU-UART
Debug
Connector
for DB40
LPC
LVDS
RTD2136
DDI0
LVDS 18/24bit
Single channel
LAN
i210IT
PCIe x1
GbE
1x SPI
BMC
HWM
GPIO
PCA9535A
INT
12x GPIO
(5x reserved for CSI)
SMBus
SPI-
BIOS
SMB
BOOT Select
2x I2C
DDR3L
1066/1333MHz
USB2.0 port 0: client or host
SPI
LEC_BTS_blk_diag_c

2Overview
1.2 Major Components (ICs)
Table 1-1 lists the major integrated circuits on the LEC-BTS, including a brief description of each
IC. Figures 1-2 and 1-3 show the locations of the major ICs.
Figure 1-2: Component Locations (Top Side)
Table 1-1: Major Integrated Circuit Descriptions and Functions
Chip Type Mfg. Model Description Function
CPU (U1) Intel • E3805 (dual core, 3W,
headless, 1.33GHz)
• E3815 (single core, 5W,
1.46GHz)
• E3826 (dual core,
7W, 1.46GHz)
• E3845 (quad core, 10W,
1.91GHz)
• N2807 (dual core, 4.3W,
1.58Ghz)
Atom, 22nm SoC
(System on Chip) with
Intel 64 Architecture
Celeron, 22nm SoC
(System on Chip) with
Intel 64 Architecture
Integrates
Processor Core,
Graphics and
Memory Controller
Hub, and I/O Hub
Ethernet
Controller (U9
[bottom])
Intel WGI210IT SLIXT Single-port Gigabit
Ethernet controller
Integrates GbE
MAC, PHY, and
SGMII/SerDes to
enable
10T/100TX/1000T
Ethernet signals
using the PCIe x1
bus
DDR3L
SDRAM (U24
[bottom], U25,
U26 [top], U27
[bottom])
Micron MT41K256M16HA-125 On-board DDR3L,
1.35V, 4Gb,
32Mx16x8, non-ECC,
un-buffered System
Memory
Provides
high-speed data
transfer
LEC_BTS_Top_Comp_a
U1
U26
U25
Key:
U1 - CPU
U25 - DDR3L SDRAM
U26 - DDR3L SDRAM
P156P74

Overview 3
LEC-BTS
Figure 1-3: Component Locations (Bottom Side)
1.3 Connectors, Switches, and LEDs
Table 1-2 describes the connectors, switches, and LEDs shown in Figure 1-4.
Table 1-2: Module Connector Description
Reference Board
Access Description
GF1 – SMARC P-S Top/Botto
m
314-pin, MXM edge connector for routing camera, graphics,
and I/O signals from the module to the baseboard.
CN1 Top 40-pin, DB40 connector for debug card
SW1 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data1
configuration [default=off]
SW2 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data2
configuration [default=on]
SW3 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data3
configuration [default=on]
LEC_BTS_Bot_Comp_a
Key:
U9 - GbE Controller
U24 - DDR3L SDRAM
U27 - DDR3L SDRAM
U9
U24
U27
S75S158
ON
1 2
(1 2)
LEC-BTS_SW1_a
(4 3)
Switch Default Setting
ON
1 2
(1 2)
LEC-BTS_SW2_a
(4 3)
Switch Default Setting
ON
1 2
(1 2)
LEC-BTS_SW3_a
(4 3)
Switch Default Setting

4Overview
SW1, SW2, SW3 Configurations:
• Camera with 1 MIPI-CSI lane = SW1-SW3 switches all set to ON
• Camera with 2 MIPI-CSI lanes = SW1 (both OFF); SW2 (both ON); SW3 (both ON)
• Camera with 3 MIPI-CSI lanes = SW1 (both OFF); SW2 (both OFF); SW3 (both ON)
• Camera with 4 MIPI-CSI lanes = SW1-SW3 switches all set to OFF
SW4 Top 4-pin dip switch for selecting LVDS color depth (18bit or
24bit) and loading BIOS setup defaults at Boot Up:
1 = LVDS 18bit [default]
4 = LVDS 24bit
2 = BIOS setup defaults off [default]
3 = BIOS setup defaults on
SW5 Top 4-pin dip switch for BIOS_SELECT:
1 = BIOS 2 [blue LED blinks fast]
4 = BIOS 1 and WDT Disable [default]
2 = BMC switches to BIOS 2 when BIOS 1 not detected
[default]
3 = Disables BIOS Detection Watchdog
LED1 Top Blue LED indicating system status activities for HW Reset,
SW Reset, Power Up, Power Down, Reset Button, and
Power Button
LED2 Top Green LED for Power On
LED3 Top Red LED for Watchdog Activity
Table 1-2: Module Connector Description (Continued)
Reference Board
Access Description
ON
1 2
(1 2)
LEC-BTS_SW4_a
(4 3)
Switch Default Setting
ON
1 2
(1 2)
LEC-BTS_SW5_a
(4 3)
Switch Default Setting

Overview 5
LEC-BTS
Figure 1-4: Connector Locations (Top Side)
P156
P74
LEC_BTS_Top_Comp_a
SW1 SW2 SW3 SW5
CN1
LED1
LED2
SW4
Key:
CN1 - DB40 Bebug
GF1 - SMARC
LED1 - System Status
LED2 - Power ON
SW1 - CSI 1 Camera
SW2 - CSI 2 Camera
SW3 - CSI 3 Camera
SW4 - BIOS Defaults
SW5 - BIOS1-2 Select
GF1A GF1B

6Overview
1.4 Specifications
1.4.1 Physical Specifications
Table 1-3 lists the physical dimensions of the module.
1.4.2 Mechanical Specifications
Figure 1-5: Mechanical Dimensions (Top Side)
Table 1-3: Weight and Footprint Dimensions
Item Dimension Overall height is measured from the upper board
surface to the top of the highest permanent
component (CN1 connector) on the upper board
surface. This measurement does not include the
cooling solution, which can vary. The cooling solution
will probably increase this dimension.
Weight 0.02 kg (0.05 lb)
Height (overall) 2.50 mm (0.098 inches)
Board thickness 1.27 mm (0.05 inches)
Width 50.00 mm (1.97 inches)
Length 82.00 mm (3.23 inches)
NOTE: All dimensions are given in millimeters.
LEC_BTS_mech_dmn_a

Overview 7
LEC-BTS
1.4.3 Electrical Specifications
Table 1-4 specifies the electrical characteristics of the module.
1.4.4 Power Specifications
Table 1-5 provides the power requirements for this module.
Operating configurations:
In-rush operating configuration - Typical under Windows 8.1
Idle operating configuration - Typical under Windows 8.1
Intel TAT (Thermal Analysis Tool) operating configuration - Typical under Windows 8.1
1.4.5 Environmental Specifications
Table 1-6 provides the most efficient operating and storage condition ranges required for this
module.
Table 1-4: Electrical Specifications
Parameter Value
Voltage Input
Standard
RTC
Fixed 5-Volt Supply (+4.75V DC min to +5.25V
DC max)
3.0V, 2.0V to 3.3V (battery)
Power States C1-C6 processor power states
S0 (active), S1 (sleep), S3 (save to RAM), S4
(suspend-to-disk), S5 (soft-off and
wake-on-LAN), and S5 ECO (wake on USB
S3/S4, WOL S3/S4/S5) system power states
Table 1-5: Power Supply Requirements
Parameter E3815 (5W)
Characteristics E3826 (7W) Characteristics E3845 (10W) Characteristics
Input Type Regulated DC voltage Regulated DC voltage Regulated DC voltage
In-rush
Voltage & Current
0.55A (2.75W) @ 5V 0.65A (3.25W) @ 5V 0.85A (4.25W) @ 5V
Typical Idle
Voltage & Current
0.66A (3.30W) @ 5V 0.65A (3.25W) @ 5V 0.77A (3.85W) @ 5V
BIT*
Voltage & Current
1.18A (5.90W) @ 5V 1.60A (8.00W) @ 5V 2.52A (12.60W) @ 5V
Table 1-6: Environmental Requirements
Parameter Conditions
Temperature
Standard 0° to +60° C (+32° to +140° F)
Extended –40° to +85° C (–40° to +185° F)
Storage –55° to +85° C (–67° to +185° F)
Humidity
Operating 5% to 90% relative humidity, non-condensing
Non-operating 5% to 95% relative humidity, non-condensing

8Overview
1.4.6 Thermal/Cooling Requirements
The LEC-BTS is designed to operate at its maximum CPU speeds and requires a thermal solu-
tion to cool the SoC. ADLINK offers a heat spreader (separate order number) for cooling. This
facilitates future module upgrades without the need to re-design the custom heatsink.
The optional heat spreader plate requires another form
of cooling, such as a fan. A heat spreader plate is not a
complete thermal solution for the LEC-BTS.

Hardware 9
LEC-BTS
2 Hardware
2.1 CPU
The LEC-BTS product family offers three versions of the Intel Atom E3800 Series CPU: the
E3805 (dual core), the E3815 (Single Core), the E3826 (Dual Core), the E3845 (Quad Core),
and the N2807 (Celeron Dual Core). E3800 CPUs feature the Intel 64 Architecture and are man-
ufactured based on Intel’s 22-nanometer technology. Refer to the CPU data sheet at the Intel
web site.
2.2 Memory
The LEC-BTS employs one channel of 64-bit DDR3L on-board memory. Four SDRAM memory
chips provide up to 16Gb of low voltage non-ECC, unbuffered system memory. Refer to the
SDRAM data sheet at the Micron web site.
2.3 I210 LAN Controller
The Intel I210 provides a single-port controller that supports GbE functionality using the
high-speed PCIe standard, v2.1 (2.5GT/s). The I210 features an integrated PHY, which enables
1000BASE-T implementations such as rack-mounted or pedestal servers in add-on NIC or
LAN-on-Motherboard (LOM) designs. Other implementations include blade servers such as
LOMs or mezzanine cards as well as embedded applications such as switch add-on cards and
network appliances. Refer to the Intel I210 Ethernet Controller data sheet at the Intel web site.
2.4 SMBus Slave Addresses
Figure 2-1 lists the corresponding slave addresses of the devices on the SMBus
2.5 Getting Started
Mount the LEC-BTS to the carrier as illustrated in Figure 2-1, which provides a profile view of
the module mounted to the carrier with dimensions.
Figure 2-1: SMARC module mounting dimensions (profile)
Table 2-1: SMBus Slave Addresses
Address (HEX) Function Device
(40) GPIO PCA9535A
(50) BMC/SEMA BMC
(6A) DP to LVDS RTD2136R
(A0) DDR3L channel A DDR3L memory
(92) Thermal Sensor LM73

10 Hardware
Connect a USB keyboard or mouse to the carrier. Use the SATA cable to connect a hard disk.
Make sure that the pins match their counterparts correctly and are not twisted. If you plan to use
additional peripherals, connect them to the appropriate headers or connectors on the carrier.
Connect a power supply to the power connector on the carrier and switch on the power.
The display shows the BIOS messages. If you want to change the standard BIOS settings,
press the <DEL> key to enter the BIOS setup menus. See Chapter 4 for setup details.
If you need to load the BIOS default values, they can be automatically loaded at boot time.
The LEC-BTS boots from CD drives, USB sticks, hard disks, or µSD-Cards. Provided that any of
these is connected and contains a valid operating system image, the display then shows the
boot screen of your operating system.
The LEC-BTS needs adequate cooling measures depending on the desired operating tempera-
ture range. Using the board without cooling could permanently damage the board.
ADLINK strongly recommends plastic spacers
instead of metal spacers for mounting the board.
Metal spacers create the possibilities of short cir-
cuits with the components located around the
mounting holes, which can ruin the board.
Be sure to observe the EMC security measures. Make
sure you are always at the same potential as the mod-
ule.
Never connect or disconnect peripherals like HDDs
while the power supply is connected and switched on.
Observe the minimum voltage values for the standard
peripherals mentioned. For additional peripherals,
make sure enough power is available. The system will
not work if there is not enough supply current for all
your devices.

Interfaces 11
LEC-BTS
3 Interfaces
This section provides descriptions of the interfaces and signals within the SMARC P-S (Primary-
Secondary) connector. Refer to the SMARC specification at:
http://www.sget.org/standards/smarc.html for definitions of the SMARC interfaces. The SMARC
P-S (Primary-Secondary) connector provides the following interfaces:
LVDS
HDMI
Camera CSIO
Audio
PCIe
Gb Ethernet
USB 2.0
USB 3.0
SATA
I2C
SPI
Serial
I2S
SD/SDIO
eMMC
GPIO
SMARC
Debug
3.1 18/24 Bit LVDS LCD
The LVDS interface is connected to the DDI0 interface of the SoC, while the translation is made
by a DisplayPort™-to-LVDS converter. (Refer to the Realtek RTD2136R-CG, DisplayPort-to-
LVDS converter datasheet.)
ADLINK Technology Inc. only supports the features/
options tested and listed in this manual. The main chips
used in the LEC-BTS may provide more features or
options than are listed for the LEC-BTS, but some of
these features or options are not supported on the mod-
ule and will not function as specified in the chip docu-
mentation.
The LEC-BTS supports single-channel LVDS. Backlight
Enable, Display Enable, and PWMOUT are controlled from the
BIOS setup.

12 Interfaces
3.2 HDMI (High-Definition Multimedia Interface)
The default setup defines the DDI1 port as HDMI and provides the following signals:
1 Clock pair
3 Data pairs
Service signals
The HDMI interface is compliant with the HDMI 1.4 specification.
3.3 Camera CSI
The LEC-BTS brings out signals for two MIPI-CSI 2.0 (serial) camera interfaces, the first with
clock and one data lane, the second with clock and up to four data lanes supporting up to 800
Mbit/s of actual pixels.
3.4 Audio (HDA)
The SoC provides an HDA controller, which communicates with internal or external CODECs
over the Intel HDA serial link. HDA signals are brought out through the I2S2 pins on the SMARC
connector and are multiplexed with LPE_I2S audio signals. When HDA is active, LPE audio is
disabled.
3.5 PCI Express (PCIe)
The CPU features four PCIe x1 ports, and the LEC-BTS module uses three of them for the PCIe
interface and one of them for the Gigabit Ethernet interface. The PCIe interface supports the
PCIe Base Specification 2.0 with a maximum signal rate of 5 GT/s and can be configured to sup-
port PCIe edge cards or Express Cards.
3.6 Gigabit Ethernet
The on-board Intel I210IT Ethernet controller uses PCIe x1 (v2.1) bus signals from the CPU to
enable 10T/100TX/1000T operation through integrated MAC, PHY, and SGMII/SerDes inter-
faces.
3.7 USB Ports
The USB interface originates from two host controllers on the SoC that provide four USB 2.0
ports and one USB 3.0 port.
3.7.1 USB2.0
Three of the four USB 2.0 ports use the USB 0-2 pins on the SMARC connector. The fourth USB
2.0 port is routed through the AFB-DIFF2 pins on the SMARC connector, which map to the
USB_DP/N [0] pins on the SoC.
3.7.2 USB 3.0
The USB 3.0 port uses the AFB_DIFF 0-1 pins on the SMARC connector, which map to the
USB3_TX/RX pins on the SoC. See Table 3-2.
3.8 SATA
The SATA interface provides one port through the SATA0 pins on the SMARC connector. The
interface supports 1.5Gb/s and 3.0Gb/s. The LEC-BTS supports a second SATA port through
the AFB Diff 3 and AFB Diff 4 signals on the SMARC connector (pins S71-S72 and S74-S75.)

Interfaces 13
LEC-BTS
3.9 I2C Bus
The LEC-BTS provides four interfaces through the I2C bus for General Purpose, Power Man-
agement, Camera, and LCD video I2C signals with operating speeds up to 400kHz. All I2C
interfaces have 1.8V pull ups with 2.2k resistors.
3.10 SPI
The CPU implements an SPI controller, which supports two SPI Flash devices on the module for
BIOS storage.
3.11 Serial (UART)
The LEC-BTS provides two serial interfaces: One port is a high-speed, 4-wire port (with TX/RX
and RTS#/CTS#), and one port is 2-wire (with TX/RX only.)
3.12 I2S
The SMARC connector provides three pins for an LPE_I2S audio interface. The LPE_I2S inter-
face is brought out through the I2S0 pins on the SMARC connector.
3.13 SD/SDIO Interface
Four parallel data lines comprise the SD/SDIO interface, supporting SD Card sockets.
3.14 eMMC Interface
The LEC-BTS provides one 8-bit eMMC interface port, brought out from the CPU through the
SDMMC pins on the SMARC connector.
3.15 GPIO
The LEC-BTS provides 12 GPIO signals from the CMOS device on the module. The GPIO sig-
nals can be utilized for General Purpose IOs as well as camera, HDA, PWM, TACH, and CAN
interfaces.
3.16 LPC Debug
A 40-pin, front flip, DB40 connector allows access to debug and update the BIOS, BMC, and OS
code on the module. (Refer to “Debug (DB40)” on page 22.)
Table 3-1: GPIO Default Settings
SMARC Connector Pin Default Function
GPIO0 CAM0_PWR#
GPIO1 CAM1_PWR#
GPIO2 CAM0_RST#
GPIO3 CAM1_RST#
GPIO4 HDA_RST#
GPIO5 GPIO
GPIO6 GPIO
GPIO7 GPIO
GPIO8 GPIO
GPIO9 GPIO
GPIO10 GPIO
GPIO11 GPIO

14 Interfaces
3.17 SMARC Interface Signals
Table 3-2 provides the pin signals for the SMARC P-S connector. Refer to the SMARC specifica-
tion at http://www.sget.org/standards/smarc.html for definitions of the SMARC signals.
Table 3-2: SMARC P-S Connector (GF1) Signal Descriptions
Pin # Primary (Top Side) Pin # Secondary (Bottom Side)
S1 Not connected
P1 Not connected S2 Not connected
P2 GND S3 GND
P3 CSI1_CK+ (CSI1 differential clock inputs.) S4 Not connected
P4 CSI1_CK- (CSI1 differential clock inputs.) S5 I2C_CAM_CK (Serial / Parallel camera
support link - I2C clock)
P5 Not connected S6 CAM_MCK
P6 Not connected S7 I2C_CAM_DAT (Serial / Parallel camera
support link - I2C data)
P7 CSI1_D0+ (CSI1 differential data inputs.) S8 CSI0_CK+ (CSI0 differential clock inputs.)
P8 CSI1_D0- (CSI1 differential data inputs.) S9 CSI0_CK- (CSI0 differential clock inputs.)
P9 GND S10 GND
P10 CSI1_D1+ (CSI1 differential data inputs.) S11 CSI0_D0+ (CSI0 differential data inputs.)
P11 CSI1_D1- (CSI1 differential data inputs.) S12 CSI0_D0- (CSI0 differential data inputs.)
P12 GND S13 GND
P13 CSI1_D2+ (CSI1 differential data inputs.) S14 Not connected
P14 CSI1_D2- (CSI1 differential data inputs.) S15 Not connected
P15 GND S16 GND
P16 CSI1_D3+ (CSI1 differential data inputs.) S17 AFB0_OUT (General purpose AFB output;
maps to PMC_SLP_S3# on the SOC)
P17 CSI1_D3- (CSI1 differential data inputs.) S18 AFB1_OUT (General purpose AFB output;
maps to PMC_SLP_S4# on the SOC)
P18 GND S19 AFB2_OUT (General purpose AFB output;
maps to PMC_SUS_STAT# on the SOC)
P19 GBE_MDI3- (Bi-directional transmit/
receive pair 3 to magnetics
[Media Dependent Interface])
S20 Not connected
P20 GBE_MDI3+(Bi-directional transmit/
receive pair 3 to magnetics
[Media Dependent Interface])
S21 Not connected
P21 GBE_LINK100# (Link Speed Indication
LED for 100Mbps; able to sink 24mA or
more carrier LED current)
S22 Not connected
P22 GBE_LINK1000# (Link Speed Indication
LED for 1000Mbps; able to sink 24mA or
more carrier LED current)
S23 AFB6_PTIO (EN_OC# for USB SS)
P23 GBE_MDI2- (Bi-directional transmit/
receive pair 2 to magnetics [Media
Dependent Interface])
S24 AFB7_PTIO (PCU_SMB_ALERT#)
P24 GBE_MDI2+ (Bi-directional transmit/
receive pair 2 to magnetics [Media
Dependent Interface])
S25 GND