Agilent Technologies 93000 SOC Series Installation guide

Agilent 93000 SOC Series User Training Part 1
Training Manual
S1

2Agilent 93000 SOC Series User Training Part 1, October 2004
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Contents
Agilent 93000 SOC Series User Training Part 1, October 2004 3
Contents
1 TrainingOverview 9
1-1 The Training 12
1-2 Agenda 13
2 Test Engineer’s Responsibilities 17
2-1 Test Engineer’s Responsibilities 20
2-2 Creating a Test Plan 23
2-3 Designing the DUT Board 29
3 Hardware Overview 33
3-1 Major Components 36
4 Software Overview 51
4-1 SmarTest Test Development 54
4-2 Online Documentation 58
4-3 Running the Software 60
4-4 Start-up Screen 62
4-5 SmarTest Software Structure 64
4-6 The Data Manager 70
4-7 Set Concept 74
4-8 Testflow Editor 75
4-9 Device Files 77
4-10 Inside the Software 78
4-11 Review Test 80
5Calibration 81
5-1 Overview 84
5-2 Calibration 85
5-3 Performing the Auto Calibration 88
5-4 Fixture Delay 98

Contents
4Agilent 93000 SOC Series User Training Part 1, October 2004
5-5 Review Test 100
6 Main Test Setup Components 101
6-1 Basic Test Elements 104
6-2 Device Directory 108
7 Defining the Pins 117
7-1 Pin Configuration 120
7-2 Pin Configuration Download 121
7-3 Entering the Pin Configuration 123
7-4 Defining Pin Groups 129
7-5 Review Test 135
8 Defining the Levels 137
8-1 AC Levels 140
8-2 DPS (Device Power Supply) Pins 149
8-3 Overview of the Level Setup 152
8-4 Level Setup Steps 158
8-5 Using Formats 168
8-6 Converting Levels 170
8-7 Review Test 173
9 Timing Setup 175
9-1 Example, Timing for the Device 74ACT299 178
9-2 Timing Resources 180
9-3 Wavetable Setup 185
9-4 Equation Sets and Timing Sets 202
9-5 Specifications (Timing) 207
9-6 Timing Verification 211
9-7 Display Signals and Using Formats 217
9-8 Logical Waveforms 220
9-9 Fixed Timing 236
9-10 X-modes 245

Contents
Agilent 93000 SOC Series User Training Part 1, October 2004 5
9-11 Review Test 249
10 Vector and Pattern Management 253
10-1 Vector Setup 256
10-2 Vector Verification 259
10-3 Pattern Management 272
10-4 Debugging Vectors 278
10-5 Editing Vectors 279
10-6 Sequencer Instructions 288
10-7 Changing Timing and Level Sets 289
10-8 Repeating Vectors in Loops 291
10-9 Subroutines 293
10-10 Vector Generation 296
10-11 Memory Types and Structure 303
10-12 Review Test 307
11 Standard Test Functions 309
11-1 What is a Functional Test ? 312
11-2 Standard Test Function Groups 316
11-3 The Test Control Window 321
11-4 The Continuity Test Function 323
11-5 Functional Test 334
11-6 Review Test 337
12 Putting It All Together 339
12-1 Introducing the Testflow Editor 342
12-2 Assigning the Global Setup Files 345
12-3 Inserting Testsuites 351
12-4 Inserting Bins 357
12-5 Executing the Testflow 359
12-6 Saving Setup Files 361
12-7 Review Test 363

Contents
6Agilent 93000 SOC Series User Training Part 1, October 2004
13 Test Result Analysis 365
13-1 Using Result Tools 368
13-2 Identifying Failed Pins and Test Cycles (Error Map) 369
13-3 Analyzing Waveforms (Timing Diagram) 375
13-4 Performing a Data Analysis (State List) 380
13-5 Aligning the Result Displays 382
13-6 Review Test 383
14 Device Characterization - DC Tests 385
14-1 DC Test Functions 388
14-2 Per Pin PMU and High Precision PMU 390
14-3 Checking for Continuity and Short Circuits 397
14-4 Measuring DC Output Voltages 402
14-5 Measuring Input Leakage 410
14-6 Measuring Operating Current 412
14-7 Related Topics 414
14-8 Summary and Discussion 415
14-9 Review Test 417
15 Device Characterization - AC Tests 419
15-1 Operating Principles 422
15-2 AC Test Functions 426
15-3 Testing Output Voltage Sensitivity 428
15-4 Testing Propagation Delay 430
15-5 Testing Propagation Delay (Using Global Search) 432
15-6 Related Topics 434
15-7 Summary and Discussion 435
15-8 Review Test 436
16 Shmoo Tool 437
16-1 Introduction 440
16-2 Sweep Test Function Overview 441
16-3 Shmoo Plots 443

Contents
Agilent 93000 SOC Series User Training Part 1, October 2004 7
16-4 The Standalone Shmoo Tool 451
16-5 Launching the Shmoo Tool 452
16-6 Results Set -Up 459
16-7 To Retrieve and Store Set-Up Data 462
16-8 Shmoo Execution 464
16-9 Result Screen 466
16-10 Overlay Screen 468
17 Measuring Pin Margins 473
17-1 Measuring Pin Margins 476
17-2 Pin Margin Setup 478
17-3 Summary and Discussion 490
17-4 Review Test 491
18 Advanced Testflow Control 493
18-1 Testflow Variables 496
18-2 Built-In Functions 504
18-3 Special Test Elements 510
18-4 Using the Optimizer 513
18-5 Information and Flags 517
18-6 Other Test Functions 522
18-7 Executing Firmware Commands 524
18-8 Review Test 527
19 Histograms 529
19-1 Overview 532
19-2 Histogram Setup 534
19-3 Analyzing the Results 540
19-4 Summary and Discussion 548
19-5 Review Test 549

Contents
8Agilent 93000 SOC Series User Training Part 1, October 2004
A Appendices 551
B Spec Sheet 74ACT299 553
C UNIX Commands 565
D Linux Commands 573
EUsingvi 585
F Pin Margin Algorithm 589
G System File Examples 597
H List of Abbreviations 631
I Third Party Contact Information 635

Agilent 93000 SOC Series User Training Part 1, October 2004 9
1Training Overview

Training Overview
10 Agilent 93000 SOC Series User Training Part 1, October 2004

In this Lesson ...
Agilent 93000 SOC Series User Training Part 1, October 2004 11
Training Overview
Overview This first lesson gives an overview of the whole training and provides
the training agenda.
What you will learn After this lesson you will be familiar with the structure and concept of
the training.

Training Overview 1-1 The Training
12 Agilent 93000 SOC Series User Training Part 1, October 2004
1-1 The Training
Requirements
Needed requirements for the work with the software tools of the
Agilent 93000 SOC Series.
• experience with UNIX
• experience with the VI-Editor or nedit
• Digital testing course (optional)
Training Objectives
After this training, you will be able to make competent use of the SOC
Series to test a device for its performance parameters and specifica-
tions. You will know the steps to
• create setups and define testfunctions to test a device
• evaluate and debug a device using the result analysis and debug
tools
• combine test functions in a testflow to automate the test execution
In particular, you will be able to analyze your application specific test
requirements and discuss solutions with Agilent engineers in case you
should need their support.
Study Materials
In addition to this training manual you are provided
• a Lab Manual which describes the lab exercises
In addition to the training materials there is a package of reference
manuals which contain a lot of detailed reference information. These
manual will be of particular value later on when your work on the test-
floor requires information which exceeds the scope of this training.

1-2 Agenda Training Overview
Agilent 93000 SOC Series User Training Part 1, October 2004 13
1-2 Agenda
Monday
•“Training Overview” Lesson 1
•“Test Engineer’s Responsibilities” Lesson 2
•“Hardware Overview” Lesson 3
•“Software Overview” Lesson 4
•“Calibration” Lesson 5
Lunch
•“Main Test Setup Components” Lesson 6
LAB 1 - Main Test Setup Components
•“Defining the Pins” Lesson 7
LAB 2 - Defining the Pins
•“Defining the Levels” Lesson 8
LAB 3 - Defining the Levels
Tuesday
•Q and A
•“Timing Setup” (Physical Waveforms) Lesson 9
LAB 4 - Equation Based Timing
Lunch
•Continue Lab 4
•“Timing Setup” (Logical Waveforms) Lesson 9
LAB 5 - Timing - Logical Waveforms

Training Overview 1-2 Agenda
14 Agilent 93000 SOC Series User Training Part 1, October 2004
Wednesday
• Q and A
•“Vector and Pattern Management” Lesson 10
LAB 6 - Vector and Pattern Management
Lunch
•“Standard Test Functions” Lesson 11
LAB 7 - Standard Test Functions
•“Putting It All Together” Lesson 12
LAB 8 - Your First Testflow
Thursday
•Q and A
•“Test Result Analysis” Lesson 13
LAB 9 - Debugging
Lunch
• “Test Result Analysis” (Continued) Lesson 13
LAB 9 - Debugging (Continued)
•“Device Characterization - DC Tests” Lesson 14
•“Device Characterization - AC Tests” Lesson 15
LAB 10 - Characterization
Friday
•Q and A
•“Shmoo Tool” Lesson 16
•“Measuring Pin Margins” Lesson 17
LAB 11 - Shmoo
LAB 12 - Measuring Pin Margins (Optional)
Lunch
•“Advanced Testflow Control” Lesson 18
LAB 13 - Advanced Testflow Options
•“Histograms” Lesson 19
•Class Feedback

1-2 Agenda Training Overview
Agilent 93000 SOC Series User Training Part 1, October 2004 15
•LAB 14 - Histogram (Optional)

Training Overview 1-2 Agenda
16 Agilent 93000 SOC Series User Training Part 1, October 2004

Agilent 93000 SOC Series User Training Part 1, October 2004 17
2Test Engineer’s Responsibilities

Test Engineer’s Responsibilities
18 Agilent 93000 SOC Series User Training Part 1, October 2004

In this Lesson ...
Agilent 93000 SOC Series User Training Part 1, October 2004 19
Test Engineer’s Responsibilities
Overview This lesson outlines some of the responsibilites a test engineer may
encounter. We will discuss the test development flow chart, how to
read the device datasheet, and how to translate the electrical specifica-
tions in a datasheet into a test plan. DUT board design considerations
are also covered.
This lesson also introduces the one device used in this training:
• The shift/storage register 74ACT299
It provides information on a data sheet level.
The actual training device used in the online lab exercises is the
shift/storage register 74ACT299. The students will use the 74ACT299 in
their lab exercises and set up timing and vectors for this device.
What you will learn You will learn what responsibilities you will have as a test engineer,
how to create a test plan, how the training device work and what are
the specifications. These specifications will be used in the following
setup lessons. You will also learn what decisions need to be made when
designing a DUT board for device testing.

Test Engineer’s Responsibilities 2-1 Test Engineer’s Responsibilities
20 Agilent 93000 SOC Series User Training Part 1, October 2004
2-1 Test Engineer’s Responsibilities
Overview
There are a variety of responsibilities that a test engineer must take
into consideration aside from simply developing a test plan for a partic-
ular device.
ATE Vendor Selection Automated Test Equipment (ATE) vendor selection is usually the first
step in the overall test process. Interaction with a particular vendor
will determine what type of test equipment will best suit the needs of
testing your particular device. A capability study should be done to
determine if the proposed equipment will test all current and future
devices. The hardware components need to be considered, as well as
performing an evaluation of the software. You may be required to
perform any or all of these evaluations, as well as the ATE systems vali-
dation and acceptance after the evaluations are complete.
Te s t D e v e lo p m e nt Test development is usually undertaken after the decision regarding
the ATE platform has been made, so the variables, such as hardware
and software considerations, are not a factor in test development. The
test design criteria will influence test design, for example, under-
standing the design for testability (DFT) requirements so tests include
identifying the types of defects that are generated and missed.
The test budget and schedule will also impact test development,
depending on how much time and effort goes into creating a test and
the overall time it takes to actually implement the test. This ultimately
affects time to market (TTM).
The test plan itself should have a definite goal set of strategies in place,
such as a test scenario, test methodology, procedures and test cases.
There are also industry standards for certain tests so standard, trace-
able test results can be obtained.
The following are some examples of the questions that must be
answered before you start to perform test setup activities:
• What category of device do I want to test?
• What type of tests do I want to perform?
• Do I already have a tester database for this device?
• Do I have vectors/patterns available for the test?
• Do I need to integrate external test equipment?