Alinx ZYNQ UltraScale+ AXU2CG-E User manual

ZYNQ UltraScale+
FPGA Development Board
AXU2CG-E
User Manual

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Version Record
Version
Date
Release By
Description
Rev 1.0
2021-09-11
Rachel Zhou
First Release

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Table of Contents
Version Record.......................................................................................... 2
Part 1: FPGA Development Board Introduction......................................... 6
Part 2: ACU2EG core board.................................................................... 10
Part 2.1: ACU2EG core board Introduction ...................................... 10
Part 2.2: ZYNQ Chip .........................................................................11
Part 2.3: DDR4 DRAM ..................................................................... 13
Part 2.4: QSPI Flash ........................................................................ 18
Part 2.5: eMMC Flash ...................................................................... 19
Part 2.6: Clock configuration ............................................................ 21
Part 2.7: LED.................................................................................... 23
Part 2.8: Power Supply..................................................................... 24
Part 2.9: ACU2EG Core Board Form Factor .................................... 25
Part 2.10: Board to Board Connectors pin assignment.................... 25
Part 3: Carrier Board ............................................................................... 35
Part 3.1: Carrier Board Introduction ................................................. 35
Part 3.2: M.2 Interface...................................................................... 36
Part 3.3: DP Interface....................................................................... 37
Part 3.4: USB3.0 interface................................................................ 39
Part 3.5: Gigabit Ethernet Interface.................................................. 40
Part 3.6: USB to Serial Port.............................................................. 42
Part 3.7: SD Card Slot Interface....................................................... 43
Part 3.8: Expansion Header............................................................. 44
Part 3.9: CAN communication interface ........................................... 46
Part 3.10: 485 communication interface........................................... 47
Part 3.11: MIPI camera interface...................................................... 48
Part 3.12: JTAG Debug Port............................................................. 49
Part 3.13: Real-time clock ................................................................ 50

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Part 3.14: EEPROM and Temperature sensor ................................. 51
Part 3.15: User LEDs ....................................................................... 52
Part 3.16: Keys................................................................................. 53
Part 3.17: DIP Switch Configuration................................................. 53
Part 3.18: Power Supply................................................................... 54
Part 3.19: ALINX Customized Fan ................................................... 55
Part 3.20: Carrier Board Size Dimension ......................................... 56

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This MPSoCs FPGA development platform adopts the core board + carrier
board mode, which is convenient for users to use the core board for secondary
development. The core board uses XILINX Zynq UltraScale+ CEG chip
ZU2CG solution, uses Processing System(PS)+Programmable Logic(PL)
technology to integrate dual-core ARM ARM Cortex-A53 and FPGA
programmable logic on a single chip. In addition, the PS side of the core board
has 4 pieces of 1GB high-speed DDR4 SDRAM chips, 1 piece of 8GB eMMC
memory chip and 1 piece of 256Mb QSPI FLASH chip.
In the design of carrier board, we have extended a wealth of interfaces for
users, such as 1 SATA M.2 interface, 1 DP interface, 4 USB 3.0 Interface, 2
Gigabit Ethernet interfaces, 1 SD card slot,2-Channel 40-pin expansion header,
2-Channel CAN bus interfaces, 2-Channel RS485 bus interfaces, 1 MIPI
Camera Interface. It meets users' requirements for high-speed data exchange,
data storage, Video transmission processing, deep learning, artificial
intelligence and industrial control. It is a "professional" ZYNQ development
platform. For high-speed data transmission and exchange, pre-verification and
post-application of data processing is possible. This product is very suitable for
students, engineers and other groups engaged in MPSoCs development.