Alinx ZYNQ7000 FPGA User manual

ZYNQ7000 FPGA
Development Board
AX7350
User Manual

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Version Record
Revision
Date
Release By
Description
Rev 1.0
2019-04-05
Rachel Zhou
First Release

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Table of Contents
Version Record.......................................................................................... 2
Part 1: FPGA Development Board Introduction......................................... 5
Part 2: ZYNQ Chip..................................................................................... 9
Part 3: DDR3 DRAM................................................................................ 12
Part 4: QSPI Flash................................................................................... 18
Part 5：eMMC Flash ............................................................................... 20
Part 6: Clock Configuration...................................................................... 22
Part 7: USB to Serial Port........................................................................ 26
Part 8: Gigabit Ethernet Interface ............................................................ 27
Part 9: USB2.0 Host Interface ................................................................. 31
Part 10: HDMI Output Interface ............................................................... 33
Part 11: SFP Interface ............................................................................. 35
Part 12: PCIe Slot.................................................................................... 37
Part 13: SD Card Slot .............................................................................. 39
Part 14: FMC Connector.......................................................................... 41
Part 15: LED Light ................................................................................... 45
Part 16: Reset Button and User Button ................................................... 46
Part17: JTAG Debug Port........................................................................ 47
Part 18: DIP Switch Configuration ........................................................... 48
Part 19: Power Supply............................................................................. 49
Part 20: Fan............................................................................................. 51
Part 21: Dimensional structure ................................................................ 53

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The ZYNQ7000 FPGA development platform uses XILINX's Zynq7000
SOC chip XC7Z035 solution, which uses ARM+FPGA SOC technology to
integrate dual-core ARM Cortex-A9 and FPGA programmable logic on a single
chip. ZYNQ has two 512MB high-speed DDR3 SDRAM chips on the PS and PL
sides. In addition, there are one 8GB eMMC memory chip and one 256Mb
QSPI FLASH chip on the PS side.
In terms of peripheral circuits, we have extended a wealth of interfaces for
users, such as a PCIex4 slot, 2 fiber interfaces, 2 Gigabit Ethernet interfaces, 4
USB2.0 HOST interfaces, 1 HDMI output interface, 1 channel UART serial
interface, 1 SD card interface, and an FMC expansion interface. It meets users'
requirements for high-speed data exchange, data storage, video transmission
processing and industrial control. It is a "professional" ZYNQ development
platform. For high-speed data transmission and exchange, pre-verification and
post-application of data processing is possible. This product is very suitable for
students, engineers and other groups engaged in ZYNQ development.

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Part 1: FPGA Development Board Introduction
The AX7350 FPGA development board is mainly composed of ZYNQ7350
main chip, 4 DDR3, 1 eMMC, 1 QSPI FLASH and some peripheral interfaces.
The ZYNQ7350 uses Xilinx's Zynq7000 series of chips, model number
XC7Z035-2FFG676. The ZYNQ7035 chip can be divided into Processor
System (PS) and Programmable Logic (PL). On the PS and PL sides of the
ZYNQ7350 chip, two DDR3s are mounted, each with a DDR3 capacity of up to
512 Mbytes. The ARM system and the FPGA system can independently
process and store data. The PS-side 8GB eMMC FLASH memory chip and
256Mb QSPI FLASH are used to statically store ZYNQ's operating system, file
system and user data.
The AX7350 FPGA development board expands its rich peripheral
interface, including one PCIex4 slot, two SFP interfaces, two Gigabit Ethernet
interfaces, four USB2.0 HOST interfaces, one HDMI output interface, and one
UART serial interface. 1 SD card interface, 1 FMC expansion interface and
some button LEDs.
Figure 1-1 is the Schematic diagram of the entire FPGA development
boards:

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LED&KEY
KSZ9031R
以太网网
口
CP2102
USB
UART
PCIE插槽
ADV7511
HDMI输出
FMC
扩展口
JTAG
USB3320
C
2 *
USB接口
USB2514
2 *
USB接口
TXS0261
2RTWR
SD Card
XILINX
ZYNQ7000
XC7Z035FFG676-2
50Mhz
33.33
3Mhz
DDR3DDR3
QSPI
FLASH
eMMC
FLASH
KSZ9031R
以太网网
口
FT232HL
DDR3DDR3
SI5338
SFP1
SFP2
50Mhz
Figure 1-1: The Schematic Diagram of the AX7350
Through this diagram, you can see the interfaces and functions that the
AX7350 FPGA Development Board contains:
Xilinx ARM+FPGA chip Zynq-7000 XC7Z035-2FFG676
DDR3
With four large-capacity 512M bytes (2GB total), high-speed DDR3
SDRAM. Two of them are mounted on the PS side, which can be used
as a buffer for ZYNQ chip data, or as a memory for the operating
system. The other two are attached to the PL end and can be used as
data storage, image analysis cache, and data processing of the FPGA.
eMMC

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The PS side mounts an 8GB eMMC FLASH memory chip to store user
operating system files or other user data.
QSPI FLASH
A 256Mbit QSPI FLASH memory chip can be used as a Uboot file for
ZYNQ chips, storage of system files and user data;
PCIe x4 Interface
The standard PCIEx8 host slot is used for PCIEx4 communication, and
can be used to connect PCIEx4, x2, x1 PCIE boards for PCIE data
communication. Support the PCI Express 2.0 standard with single
channel communication, rates up to 5GBaud.
2 SFP Interface
The 2-channel high-speed transceiver of ZYNQ's GTX transceiver is
connected to the transmission and reception of two optical modules to
realize two high-speed optical fiber communication interfaces. Each
fiber optic data communication receives and transmits at speeds of up
to 10 Gb/s.
Gigabite Ethernet Interface
2-channel 10/100M/1000M Ethernet RJ45 interface for Ethernet data
exchange with computers or other network devices. The network
interface chip uses Micrel's KSZ9031 industrial grade GPHY chip, one
Ethernet is connected to the PS end of the ZYNQ chip, and one
Ethernet is connected to the PL end of the ZYNQ chip.
HDMI video output
1 channel HDMI video output interface, selected ADV7511 HDMI
encoding chip of ANALOG DEVICE, up to 1080P@60Hz output,
support 3D output.
USB2.0 HOST Interface
Extend the 4-channe USB HOST interface through the USB Hub chip
for connecting external USB slave devices, such as connecting a

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mouse, keyboard, USB flash drive etc. The USB interface uses a flat
USB interface (USB Type A).
USB Uart Interface
2-way Uart to USB interfaces for communication with the computer, for
user debugging. 1 channel on the core board, Used for the core board
works independently; 1 way is on the bottom board, and used for the
whole board debugging. The serial port chip adopts the USB-UAR chip
of Silicon Labs CP2102GM, and the USB interface adopts the MINI
USB interface.
Micro SD card holder
1-channel Micro SD card holder, for save operating system images and
file systems.
FMC expansion port
A standard FMC LPC expansion port for connecting XILINX or
ALINXDE various FMC modules (HDMI input and output modules,
binocular camera modules, high-speed AD modules etc.). The FMC
expansion port contains 34 pairs of differential IO signals and one
high-speed GTX transceiver signal.
USB JTAG Interface
One way USB JTAG port, debug and download ZYNQ system through
USB cable and onboard JTAG circuit
Clock
An on-board 33.333Mhz active crystal oscillator provides a stable clock
source for the PS system, a 50MHz active crystal oscillator that
provides additional clocking for the PL logic, and a programmable clock
chip on the board that provides the clock source for the GTX. Provide a
reference clock for PCIE, SFP and DDR operation.
LED Light
9 LEDs, 1 power indicator; 1 DONE configuration indicator; 2 serial

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communication indicators, 1 PS control LED, 4 PL control indicators.
Button
6 buttons, 1 reset button, 1 PS user button, 4 PL user buttons
Part 2: ZYNQ Chip
The AX7350 FPGA development board uses Xilinx's Zynq7000 series chip,
model XC7Z035-2FFG676. The chip's PS system integrates two ARM
CortexTM-A9 processors, AMBA® interconnects, internal memory, external
memory interfaces and peripherals. These peripherals mainly include USB bus
interface, Ethernet interface, SD/SDIO interface, I2C bus interface, CAN bus
interface, UART interface, GPIO etc. The PS can operate independently and
start up at power up or reset. Figure 2-1 detailed the Overall Block Diagram of
the ZYNQ7000 Chip.
Figure 2-1:
Overall Block Diagram of the ZYNQ7000 Chip

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The main parameters of the PS system part are as follows:
ARM dual-core CortexA9-based application processor, ARM-v7
architecture, up to 800MHz
32KB level 1 instruction and data cache per CPU, 512KB level 2 cache
2 CPU shares
On-chip boot ROM and 256KB on-chip RAM
External storage interface, support 16/32 bit DDR2, DDR3 interface
Two Gigabit NIC support: divergent-aggregate DMA, GMII, RGMII,
SGMII interface
Two USB2.0 OTG interfaces, each supporting up to 12 nodes
Two CAN2.0B bus interfaces
Two SD card, SDIO, MMC compatible controllers
2 SPIs, 2 UARTs, 2 I2C interfaces
54 multi-function IOs that can be configured as normal IO or peripheral
control interfaces
High bandwidth connection within PS and PS to PL
The main parameters of the PL logic part are as follows:
Logic Cells: 275K
Look-up-tables (LUTs): 171,900
Flip-flops: 343,800
18x25MACCs：900

Block RAM ： 17.6Mb
8-channel high-speed GTX transceiver, supporting PCIE Gen2x8;
Two AD converters for on-chip voltage, temperature sensing and up
to 17 external differential input channels, 1MBPS
XC7Z020-2CLG484I chip speed grade is -2, industrial grade, package is