Epson S1D15722 Series User manual

Rev.1.1
S1D15722D01B000
Technical Manual

NOTICE
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©SEIKO EPSON CORPORATION 2008,All rights reserved.

Configuration of product number
zDEVICES
S1 D 15722 D 01B 000

Packing specifications
Specifications
Shape
(D : Chip, T:TCP, F:QFP)
Model number
Model name
(D : LCD Driver)
Product classification
(S1:Semiconductors)

S1D15722D01B000 Technical Manual (Rev.1.1) EPSON i
Table of Contents
1. DESCRIPTION ................................................................................................................1
2. FEATURES......................................................................................................................2
3. BLOCK DIAGRAM..........................................................................................................3
4. PIN ASSIGNMENT..........................................................................................................4
4.1 Chip Assignment ..........................................................................................................................4
4.2 Alignment mark.............................................................................................................................4
4.3 Pad Center Coordinates...............................................................................................................5
5. PIN DESCRIPTION .........................................................................................................9
5.1 Power Supply Pin..........................................................................................................................9
5.2 System Bus Connection Pins....................................................................................................10
5.3 Display Timing Signal Pins........................................................................................................11
5.4 Liquid Crystal Drive Pins............................................................................................................12
5.5 Temperature Sensor Pins...........................................................................................................12
5.6 Test Pins......................................................................................................................................12
6. FUNCTIONAL DESCRIPTION......................................................................................13
6.1 MPU Interface..............................................................................................................................13
6.1.1 Selecting Interface Type.........................................................................................................13
6.1.2 Parallel interface.....................................................................................................................13
6.1.3 Serial Interface .......................................................................................................................13
6.1.4 Chip Select.............................................................................................................................14
6.1.5 Accessing Display Data RAM and Internal Register...............................................................14
6.2 Display Data RAM .......................................................................................................................16
6.2.1 Display Data RAM..................................................................................................................16
6.2.2 Gray Scale Display.................................................................................................................17
6.2.3 Page Address Circuit/Column Address Circuit........................................................................17
6.2.4 Line Address Circuit................................................................................................................17
6.2.5 I/O Buffer Circuit.....................................................................................................................18
6.2.6 Display Data Latch Circuit ......................................................................................................18
6.3 Oscillation Circuit.......................................................................................................................21
6.4 Display Timing Signal Generator...............................................................................................21
6.5 Operating State Detector Circuit................................................................................................21
6.6 Liquid Crystal Drive Circuit........................................................................................................22
6.6.1 Segment Driver.......................................................................................................................22
6.6.2 Common Driver ......................................................................................................................22
6.7 Temperature Sensor Circuit.......................................................................................................24
6.7.1 Analog Voltage Output............................................................................................................24
6.7.2 Precautions ............................................................................................................................25
6.8 Reset Circuit................................................................................................................................27
7. COMMAND....................................................................................................................28
7.1 Command Description................................................................................................................28
7.2 Command Table..........................................................................................................................44
7.3 Example of Setting Instructions (Reference Example)............................................................46
8. ABSOLUTE MAXIMUM RATINGS................................................................................51

ii EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
9. DC CHARACTERISTICS ..............................................................................................52
9.1 Dynamic Current Consumption Value.......................................................................................53
9.1.1 When in normal operation. .....................................................................................................53
9.2 Current Consumption in the Power-saving Mode....................................................................54
9.3 Reference Data............................................................................................................................55
9.3.1 When in normal operation. .....................................................................................................55
9.3.2 During MPU access................................................................................................................56
9.3.3 Operating Voltage Rage of VDI Series and V3 Series............................................................56
9.3.4 Liquid Crystal Frame Frequency fFR......................................................................................57
9.4 Temperature Sensor Characteristics ........................................................................................58
9.4.1 Analog Voltage Output Characteristics ...................................................................................58
10. TIMING CHARACTERISTICS.....................................................................................59
10.1 System Bus Read/Write Characteristics 1 (80 Series MPU)..................................................59
10.2 System Bus Read/Write Characteristics 2 (68 Series MPU)..................................................61
10.3 Serial Interface..........................................................................................................................63
10.4 Display Control I/O Timing.......................................................................................................64
10.5 Reset Input Timing....................................................................................................................65
10.6 Temperature Sensor Measuring Timing..................................................................................65
11. POWER CIRCUIT (REFERENCE EXAMPLE) ............................................................66
12. MPU INTERFACE (REFERENCE EXAMPLE)............................................................67
13. CONNECTION BETWEEN LCD DRIVERS (REFERENCE EXAMPLE).....................68
14. LCD PANEL CONNECTION (REFERENCE EXAMPLE)............................................69
15. PRECAUTIONS...........................................................................................................70
REVISION HISTORY.........................................................................................................71

1. DESCRIPTION
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 1
1. DESCRIPTION
The S1D15722 series is a MLS drive system dot matrix LCD driver that can be directly connected to the
microcomputer bus. An 8-bit parallel or serial display data sent from the microcomputer is stored in the
built-in display data RAM and LCD drive signal is generated independently of the microcomputer. (Required
external LCD bias voltages input.)
The S1D15722 series provides both FRM 4-grayscale display and binary display. With display data RAM
224 ×184 ×2 bits incorporated, for 4-grayscale display, 2 bits of built-in RAM correspond to 1 dot of pixel, and
for binary display, 1 bit of the built-in RAM corresponds to 1 dot of pixel.
The S1D15722 series contains 184 circuits of common output and 224 circuits of segment output. This
allows display of a maximum of 224 ×184 dots per chip.
Read/write operation from microcomputer to display data RAM does not require external operation clock.

2. FEATURES
2 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
2. FEATURES
• Direct display of RAM data with display data RAM
• For 4-grayscale display (normally white, normal display mode)
RAM bit data (higher and lower)
(1, 1): Level 3 of gray scale Black
(1, 0): Level 2 of gray scale
(0, 1): Level 1 of gray scale
(0, 0): Level 0 of gray scale White
• For binary display (Normally White, normal display mode)
RAM bit data
“1”: ON Black
“0”: OFF White
• RAM capacity
184 ×224 ×2 = 82,432 bits
• Liquid crystal drive circuit
184 common output and 224 segment output
• Provides a high-speed 8-bit MPU interface (can be directly connected to MPU of both 80 and 68
series)/serial interface.
• Extensive command functions
Display lines set, n-line inversion, display data RAM address control, gray scale control, display ON/OFF,
display in forward/reverse direction, full display lighting ON/OFF, display clock built-in oscillation circuit
control, select common output status, etc.
• Required external LCD bias voltages input
• Built-in high precision voltage adjustment function
• Built-in high precision CR oscillation circuit
• Power supply:
Logic power supply : VDD - VSSL = 3.0V to 5.5V
(Internal logic is operated by VDI-VSSL ･･･ 2.85V typ.)
LCD drive power supply: V3- VSSH = 15V to 25V
(VSSL = VSSH = GND)
• Wide temperature range: - 40 to +90°C
• CMOS Process
• Shipping form: bare chip
• No anti-radiation and light resistance design

3. BLOCK DIAGRAM
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 3
3. BLOCK DIAGRAM
V3
VC
V2
COM183
COM0
SEG223
__
_
CS
Shift register
COM Drivers
Oscillation
circuit Display timing
generator circuit
Line address
Page address
Internal logic power
supply circuit
Display data latch circuit
Command decoder Bus holder
Column address
DDRAM
224 ×184 ×2
SEG Drivers
CLS
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
SEG0
____
RES
__
_
WR
(
R/__
W
)
__
_
RD
(
E
)
A0
P/S
SI
SCL
D7 to D0
I/O buffer
FR
CL
M/S
SYNC
DOF
_______
F1, F2
COM decoder
SEG Decoder
VSSL
VDD
V1
MV1
MV2
C86
MPU Interface
Temperature
sensor
circuit
SVD2
SV22
VDIS
VDI
ERR
VSSH

4. PIN ASSIGNMENT
4 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
4. PIN ASSIGNMENT
4.1 Chip Assignment
Size
Item XYUnit
Chip size 3.31 ×21.00 mm
Chip thickness 0.625 mm
Bump pitch 62 (Min.) µm
1 to 5 45 ×85 µm
6 to 17,
19 to 44,
83,
85 to 98
90 ×109 µm
18,
48 to 82,
84 90 ×60 µm
45 to 47 90 ×45 µm
99 to 153 45 ×85 µm
154 to 481 90 ×35 µm
Bump size
PAD No.
482 to 531 45 ×85 µm
Bump height Typ. 17 µm
4.2 Alignment mark
Alignment coordinate
1(
1500.0, 9380.0) µm
2 (1500.0, -9380.0) µm
Mark size
a=15µm
b=45µm
Mark1 Mark2
b
b
a
a
a
a a a
• • • •
• • • • • • • • • • • • • • • • • • • • •
104
482
153
(
0, 0
)
531
1
103
• • • • • • • • • • • • • • • • • • • • • • • •
• • • •
481
• • • •
154
• • • •
5
6
99
98
D157MD1B
Die No.
Ali
g
nment Mark2
Ali
g
nment Mark1

4. PIN ASSIGNMENT
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 5
4.3 Pad Center Coordinates Unit : µm
PAD
No. Pin Name X Y PAD No. Pin Name X Y PAD No. PIN Name X Y
1 NC 1539.7 -10204.05 51 FR 1517.2 -150.0 101 NC 1539.7 9946.5
2 NC 1539.7 -10075.5 52 CL -60.0 102 NC 1539.7 10075.5
3 NC 1539.7 -9946.5 53
____
DOF 210.0 103 NC 1539.7 10204.5
4 NC 1539.7 -9817.5 54 F1 300.0 104 NC 1519.0 10364.7
5 NC 1539.7 -9688.5 55 F2 570.0 105 NC 1457.0
6 TEST3 1517.2 -9238.5 56 VSSL 660.0 106 COM91 1395.0
7 TEST3 -9112.5 57 ___ CS 750.0 107 COM90 1333.0
8 TEST4 -8788.5 58 ____ RES 1020.0 108 COM89 1271.0
9 TEST4 -8662.5 59 A0 1110.0 109 COM88 1209.0
10 TEST5 -8338.5 60 VSSL 1290.0 110 COM87 1147.0
11 TEST5 -8212.5 61
___
WR,R/__ W 1380.0 111 COM86 1085.0
12 TEST6 -7888.5 62 ___ RD, E 1650.0 112 COM85 1023.0
13 TEST6 -7762.5 63 VDD 1740.0 113 COM84 961.0
14 TEST7 -7438.5 64 SI 1830.0 114 COM83 899.0
15 TEST7 -7312.5 65 SCL 2100.0 115 COM82 837.0
16 TEST8 -6988.5 66 D0 2190.0 116 COM81 775.0
17 TEST8 -6862.5 67 D1 2460.0 117 COM80 713.0
18 TEST9 -6530.0 68 D2 2550.0 118 COM79 651.0
19 TEST10 -6348.5 69 D3 2820.0 119 COM78 589.0
20 TEST10 -6222.5 70 D4 2910.0 120 COM77 527.0
21 TEST11 -5898.5 71 D5 3180.0 121 COM76 465.0
22 TEST11 -5772.5 72 D6 3270.0 122 COM75 403.0
23 TEST12 -5448.5 73 D7 3540.0 123 COM74 341.0
24 TEST12 -5322.5 74 VDD 3630.0 124 COM73 279.0
25 TEST9 -4998.5 75 M/S 3720.0 125 COM72 217.0
26 TEST9 -4872.5 76 CLS 3990.0 126 COM71 155.0
27 VDD2 -4510.7 77 VSSL 4080.0 127 COM70 93.0
28 VDD2 -4384.7 78 TEST 4260.0 128 COM69 31.0
29 VDD2 -4258.7 79 C86 4350.0 129 COM68 -31.0
30 VDD -3926.7 80 P/S 4620.0 130 COM67 -93.0
31 VDD -3800.7 81 VDD 4710.0 131 COM66 -155.0
32 VDD -3674.7 82 ERR 4800.0 132 COM65 -217.0
33 VSSH -3362.1 83 VSSH 5051.5 133 COM64 -279.0
34 VSSH -3236.1 84 TEST13 5210.0 134 COM63 -341.0
35 VSSH -3110.1 85 TEST14 5371.5 135 COM62 -403.0
36 VSSH -2984.1 86 TEST15 5701.5 136 COM61 -465.0
37 VSSL -2821.1 87 TEST15 5827.5 137 COM60 -527.0
38 VSSL -2695.1 88 TEST16 6159.5 138 COM59 -589.0
39 VSSL -2569.1 89 TEST16 6285.5 139 COM58 -651.0
40 VSSL -2443.1 90 TEST17 6613.5 140 COM57 -713.0
41 VDI -2280.1 91 TEST17 6739.5 141 COM56 -775.0
42 VDI -2154.1 92 V37061.5 142 COM55 -837.0
43 VDD -1841.5 93 V27405.5 143 COM54 -899.0
44 VDD -1715.5 94 V17749.5 144 COM53 -961.0
45 TEST2 -1440.0 95 VC8093.5 145 COM52 -1023.0
46 SV22 -1050.0 96 MV18437.5 146 COM51 -1085.0
47 SVD2 -800.0 97 MV28781.5 147 COM50 -1147.0
48 VDIS -600.0 98 VSSH 9111.5 148 COM49 -1209.0
49 VSSL -510.0 99 NC 1539.7 9688.5 149 COM48 -1271.0
50 SYNC -420.0 100 NC 9817.5 150 COM47 -1333.0

4. PIN ASSIGNMENT
6 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
Unit : µm
PAD
No. Pin Name X Y PAD
No. Pin Name X Y PAD
No. PIN Name X Y
151 COM46 -1395.0 10364.7
201 COM0 -1517.2 7223.0 251 SEG45 -1517.2 4123.0
152 NC -1457.0 202 NC 7161.0 252 SEG46 4061.0
153 NC -1519.0 203 NC 7099.0 253 SEG47 3999.0
154 NC -1517.2 10137.0
204 NC 7037.0 254 SEG48 3937.0
155 NC 10075.0 205 NC 6975.0 255 SEG49 3875.0
156 COM45 10013.0 206 SEG0 6913.0 256 SEG50 3813.0
157 COM44 9951.0 207 SEG1 6851.0 257 SEG51 3751.0
158 COM43 9889.0 208 SEG2 6789.0 258 SEG52 3689.0
159 COM42 9827.0 209 SEG3 6727.0 259 SEG53 3627.0
160 COM41 9765.0 210 SEG4 6665.0 260 SEG54 3565.0
161 COM40 9703.0 211 SEG5 6603.0 261 SEG55 3503.0
162 COM39 9641.0 212 SEG6 6541.0 262 SEG56 3441.0
163 COM38 9579.0 213 SEG7 6479.0 263 SEG57 3379.0
164 COM37 9517.0 214 SEG8 6417.0 264 SEG58 3317.0
165 COM36 9455.0 215 SEG9 6355.0 265 SEG59 3255.0
166 COM35 9393.0 216 SEG10 6293.0 266 SEG60 3193.0
167 COM34 9331.0 217 SEG11 6231.0 267 SEG61 3131.0
168 COM33 9269.0 218 SEG12 6169.0 268 SEG62 3069.0
169 COM32 9207.0 219 SEG13 6107.0 269 SEG63 3007.0
170 COM31 9145.0 220 SEG14 6045.0 270 SEG64 2945.0
171 COM30 9083.0 221 SEG15 5983.0 271 SEG65 2883.0
172 COM29 9021.0 222 SEG16 5921.0 272 SEG66 2821.0
173 COM28 8959.0 223 SEG17 5859.0 273 SEG67 2759.0
174 COM27 8897.0 224 SEG18 5797.0 274 SEG68 2697.0
175 COM26 8835.0 225 SEG19 5735.0 275 SEG69 2635.0
176 COM25 8773.0 226 SEG20 5673.0 276 SEG70 2573.0
177 COM24 8711.0 227 SEG21 5611.0 277 SEG71 2511.0
178 COM23 8649.0 228 SEG22 5549.0 278 SEG72 2449.0
179 COM22 8587.0 229 SEG23 5487.0 279 SEG73 2387.0
180 COM21 8525.0 230 SEG24 5425.0 280 SEG74 2325.0
181 COM20 8463.0 231 SEG25 5363.0 281 SEG75 2263.0
182 COM19 8401.0 232 SEG26 5301.0 282 SEG76 2201.0
183 COM18 8339.0 233 SEG27 5239.0 283 SEG77 2139.0
184 COM17 8277.0 234 SEG28 5177.0 284 SEG78 2077.0
185 COM16 8215.0 235 SEG29 5115.0 285 SEG79 2015.0
186 COM15 8153.0 236 SEG30 5053.0 286 SEG80 1953.0
187 COM14 8091.0 237 SEG31 4991.0 287 SEG81 1891.0
188 COM13 8029.0 238 SEG32 4929.0 288 SEG82 1829.0
189 COM12 7967.0 239 SEG33 4867.0 289 SEG83 1767.0
190 COM11 7905.0 240 SEG34 4805.0 290 SEG84 1705.0
191 COM10 7843.0 241 SEG35 4743.0 291 SEG85 1643.0
192 COM9 7781.0 242 SEG36 4681.0 292 SEG86 1581.0
193 COM8 7719.0 243 SEG37 4619.0 293 SEG87 1519.0
194 COM7 7657.0 244 SEG38 4557.0 294 SEG88 1457.0
195 COM6 7595.0 245 SEG39 4495.0 295 SEG89 1395.0
196 COM5 7533.0 246 SEG40 4433.0 296 SEG90 1333.0
197 COM4 7471.0 247 SEG41 4371.0 297 SEG91 1271.0
198 COM3 7409.0 248 SEG42 4309.0 298 SEG92 1209.0
199 COM2 7347.0 249 SEG43 4247.0 299 SEG93 1147.0
200 COM1 7285.0 250 SEG44 4185.0 300 SEG94 1085.0

4. PIN ASSIGNMENT
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 7
Unit : µm
PAD
No. Pin Name X Y PAD No. Pin Name X Y PAD No. PIN Name X Y
301 SEG95 -1517.2 1023.0
351 SEG145 -1517.2 -2077.0 401 SEG195 -1517.2 -5177.0
302 SEG96 961.0 352 SEG146 -2139.0 402 SEG196 -5239.0
303 SEG97 899.0 353 SEG147 -2201.0 403 SEG197 -5301.0
304 SEG98 837.0 354 SEG148 -2263.0 404 SEG198 -5363.0
305 SEG99 775.0 355 SEG149 -2325.0 405 SEG199 -5425.0
306 SEG100 713.0 356 SEG150 -2387.0 406 SEG200 -5487.0
307 SEG101 651.0 357 SEG151 -2449.0 407 SEG201 -5549.0
308 SEG102 589.0 358 SEG152 -2511.0 408 SEG202 -5611.0
309 SEG103 527.0 359 SEG153 -2573.0 409 SEG203 -5673.0
310 SEG104 465.0 360 SEG154 -2635.0 410 SEG204 -5735.0
311 SEG105 403.0 361 SEG155 -2697.0 411 SEG205 -5797.0
312 SEG106 341.0 362 SEG156 -2759.0 412 SEG206 -5859.0
313 SEG107 279.0 363 SEG157 -2821.0 413 SEG207 -5921.0
314 SEG108 217.0 364 SEG158 -2883.0 414 SEG208 -5983.0
315 SEG109 155.0 365 SEG159 -2945.0 415 SEG209 -6045.0
316 SEG110 93.0 366 SEG160 -3007.0 416 SEG210 -6107.0
317 SEG111 31.0 367 SEG161 -3069.0 417 SEG211 -6169.0
318 SEG112 -31.0 368 SEG162 -3131.0 418 SEG212 -6231.0
319 SEG113 -93.0 369 SEG163 -3193.0 419 SEG213 -6293.0
320 SEG114 -155.0 370 SEG164 -3255.0 420 SEG214 -6355.0
321 SEG115 -217.0 371 SEG165 -3317.0 421 SEG215 -6417.0
322 SEG116 -279.0 372 SEG166 -3379.0 422 SEG216 -6479.0
323 SEG117 -341.0 373 SEG167 -3441.0 423 SEG217 -6541.0
324 SEG118 -403.0 374 SEG168 -3503.0 424 SEG218 -6603.0
325 SEG119 -465.0 375 SEG169 -3565.0 425 SEG219 -6665.0
326 SEG120 -527.0 376 SEG170 -3627.0 426 SEG220 -6727.0
327 SEG121 -589.0 377 SEG171 -3689.0 427 SEG221 -6789.0
328 SEG122 -651.0 378 SEG172 -3751.0 428 SEG222 -6851.0
329 SEG123 -713.0 379 SEG173 -3813.0 429 SEG223 -6913.0
330 SEG124 -775.0 380 SEG174 -3875.0 430 NC -6975.0
331 SEG125 -837.0 381 SEG175 -3937.0 431 NC -7037.0
332 SEG126 -899.0 382 SEG176 -3999.0 432 NC -7099.0
333 SEG127 -961.0 383 SEG177 -4061.0 433 NC -7161.0
334 SEG128 -1023.0 384 SEG178 -4123.0 434 COM92 -7223.0
335 SEG129 -1085.0 385 SEG179 -4185.0 435 COM93 -7285.0
336 SEG130 -1147.0 386 SEG180 -4247.0 436 COM94 -7347.0
337 SEG131 -1209.0 387 SEG181 -4309.0 437 COM95 -7409.0
338 SEG132 -1271.0 388 SEG182 -4371.0 438 COM96 -7471.0
339 SEG133 -1333.0 389 SEG183 -4433.0 439 COM97 -7533.0
340 SEG134 -1395.0 390 SEG184 -4495.0 440 COM98 -7595.0
341 SEG135 -1457.0 391 SEG185 -4557.0 441 COM99 -7657.0
342 SEG136 -1519.0 392 SEG186 -4619.0 442 COM100 -7719.0
343 SEG137 -1581.0 393 SEG187 -4681.0 443 COM101 -7781.0
344 SEG138 -1643.0 394 SEG188 -4743.0 444 COM102 -7843.0
345 SEG139 -1705.0 395 SEG189 -4805.0 445 COM103 -7905.0
346 SEG140 -1767.0 396 SEG190 -4867.0 446 COM104 -7967.0
347 SEG141 -1829.0 397 SEG191 -4929.0 447 COM105 -8029.0
348 SEG142 -1891.0 398 SEG192 -4991.0 448 COM106 -8091.0
349 SEG143 -1953.0 399 SEG193 -5053.0 449 COM107 -8153.0
350 SEG144 -2015.0 400 SEG194 -5115.0 450 COM108 -8215.0

4. PIN ASSIGNMENT
8 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
Unit : µm
PAD
No. Pin Name X Y PAD No. Pin Name X Y
451 COM109 -1517.2 -8277.0 501 COM155 -341.0 -10364.7
452 COM110 -8339.0 502 COM156 -279.0
453 COM111 -8401.0 503 COM157 -217.0
454 COM112 -8463.0 504 COM158 -155.0
455 COM113 -8525.0 505 COM159 -93.0
456 COM114 -8587.0 506 COM160 -31.0
457 COM115 -8649.0 507 COM161 31.0
458 COM116 -8711.0 508 COM162 93.0
459 COM117 -8773.0 509 COM163 155.0
460 COM118 -8835.0 510 COM164 217.0
461 COM119 -8897.0 511 COM165 279.0
462 COM120 -8959.0 512 COM166 341.0
463 COM121 -9021.0 513 COM167 403.0
464 COM122 -9083.0 514 COM168 465.0
465 COM123 -9145.0 515 COM169 527.0
466 COM124 -9207.0 516 COM170 589.0
467 COM125 -9269.0 517 COM171 651.0
468 COM126 -9331.0 518 COM172 713.0
469 COM127 -9393.0 519 COM173 775.0
470 COM128 -9455.0 520 COM174 837.0
471 COM129 -9517.0 521 COM175 899.0
472 COM130 -9579.0 522 COM176 961.0
473 COM131 -9641.0 523 COM177 1023.0
474 COM132 -9703.0 524 COM178 1085.0
475 COM133 -9765.0 525 COM179 1147.0
476 COM134 -9827.0 526 COM180 1209.0
477 COM135 -9889.0 527 COM181 1271.0
478 COM136 -9951.0 528 COM182 1333.0
479 COM137 -10013.0 529 COM183 1395.0
480 NC -10075.0 530 NC 1457.0
481 NC -10137.0 531 NC 1519.0
482 NC -1519.0 -10364.7
483 NC -1457.0
484 COM138 -1395.0
485 COM139 -1333.0
486 COM140 -1271.0
487 COM141 -1209.0
488 COM142 -1147.0
489 COM143 -1085.0
490 COM144 -1023.0
491 COM145 -961.0
492 COM146 -899.0
493 COM147 -837.0
494 COM148 -775.0
495 COM149 -713.0
496 COM150 -651.0
497 COM151 -589.0
498 COM152 -527.0
499 COM153 -465.0
500 COM154 -403.0

5. PIN DESCRIPTION
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 9
5. PIN DESCRIPTION
5.1 Power Supply Pin
Pin name I/O Description Number of
pins
VDD Power
supply IC system power supply. Also, use this pin together with the MPU power supply pin VCC. 8
VDD2 Power
supply Connect to VDD. 3
VSSL Power
supply 0V pin connected to the system ground. 8
VSSH Power
supply High-voltage resistance circuit negative power supply pin. Short-circuit to VSSL
outside the LCD module. 6
VDI Power
supply
Power supply pin for internal circuit. It is made from VDD.
This pin is required to connect external capacitance between this pin and VSS to
stabilize the voltage.
The VDI generator can select valid/invalid by VDIS pin.
For single chip usage, the VDI generator must be ON (VDIS = HIGH).
Prohibit to supply VDI externally.
For multi chip usage, each VDI of chips are must be same, therefore set master’s
VDIS = HIGH and slave’s VDIS = LOW to supply VDI voltage from master chip to
slave chip(s).
2
VDIS I
This pin is used for making the VDI generating circuit valid or invalid.
VDIS = HIGH : The VDI generating circuit is valid. (Master chip)
VDIS = LOW : The VDI generating circuit is invalid. (Slave chip)
When the VDIS pin is used by changing from LOW to HIGH, it should be initialized
by the pin after changing it.
Only the VDIS pin controls operation of the VDI generating circuit and the circuit
operates independently of the save power command.
1
Multi-level, liquid crystal drive power supply pins. The voltage specified according
to liquid crystal cells is impedance-converted by a split resistor or operational
amplifier and applied.
The following magnitude correlation should be followed:
V3≥V2 ≥V1≥VC≥MV 1≥MV2≥VSSH (=VSSL)
The following voltages are example in case of Bias 1/13 to 8. Input externally
symmetrical voltages against VC.
Bias 1/13 1/12 1/11 1/10 1/9 1/8
V2
V1
VC
MV1
MV2
8.5/13 · V3
7.5/13 · V3
6.5/13 · V3
5.5/13 · V3
4.5/13 · V3
8/12 · V3
7/12 · V3
6/12 · V3
5/12 · V3
4/12 · V3
7.5/11 · V3
6.5/11 · V3
5.511 · V3
4.5/11 · V3
3.5/11 · V3
7/10 · V3
6/10 · V3
5/10 · V3
4/10 · V3
3/10 · V3
6.5/9 · V3
5.5/9 · V3
4.5/9 · V3
3.5/9 · V3
2.5/9 · V3
6/8 · V3
5/8 · V3
4/8 · V3
3/8 · V3
2/8 · V3
V3, V2,
V1, VC,
MV1, MV2
Power
supply
each 1

5. PIN DESCRIPTION
10 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
5.2 System Bus Connection Pins
Pin name I/O Description Number of
pins
D7 to D0 I/O
8-bit bi-directional data bus; connected to the standard 8-bit or 16-bit MPU data
bus.
When serial interface is selected (P/S = LOW), if chip select is inactive or the state
of operation is other than reading or writing, D0 to D7 are set to High-impedance
(Hi-Z).
total 8
SI I/O
Serial data input/output pin when the serial interface is selected (P/S = LOW)
When serial interface is selected, read status is enabled, but read display data
RAM is not enabled. 1
SCL I
Serial clock input pin when serial interface is selected (P/S = LOW) . Data is read
at the rising edge of clock. 1
A0 I
The least significant bit (LSB) of the standard MPU address bus is connected and a
distinction is made between data and command.
A0 = HIGH : D0 to D7 is display data or command parameter.
A0 = LOW : D0 to D7 is control command.
1
____
RES I
Setting ____ RES to LOW resets the device.
Reset operation depends on the signal level. 1
___
CS I
Chip select signal Active when ___ CS = LOW, enabling input or output of
data/command. When ___ CS = HIGH, data bus are set to Hi-Z. 1
___
RD
(E) I
• When MPU of the 80 series is connected. Active LOW
This pin connects ___ RD signal of 80 series MPU. Data bus enters a state of
output while this signal is set to LOW.
• When MPU of the 68 series is connected. Active HIGH
Becomes enable clock input pin of the 68 series MPU.
1
___
WR
(R/__ W) I
• When MPU of the 80 series is connected. Active LOW
This pin connects the 80 series MPU signal. Signals on the data bus are
latched at the trailing edge of Signal ___ WR.
• When the 68 series MPU is connected:
Becomes input pin of read/write control signal.
R/__ W = HIGH : Read
R/__ W = LOW : Write
1
Select pin between parallel interface and serial interface
P/S = HIGH : Parallel interface
P/S = LOW : Serial Interface:
Sets as shown in the table below depending on the state of P/S.
P/S Data/Command Data Read/Write Serial clock
HIGH A0 D0 to D7 ___ RD, ___ WR -
LOW A0 SI
Write
Read status SCL 1
P/S I
When P/S = LOW, D0 to D7 are Hi-Z. For D0 to D7, it may be set to HIGH, LOW
or open. However, set ___ RD(E) and ___ WR (R/__ W) to HIGH or LOW.
When serial interface is selected, read status is enabled, but read display data
RAM is not enabled.

5. PIN DESCRIPTION
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 11
Pin name I/O Description Number of
pins
C86 I
Pin for switching MPU interface.
C86 = HIGH : 68 series MPU interface
C86 = LOW : 80 series MPU interface
When serial interface is selected, set to LOW.
1
ERR O
Pin for monitoring the operating state of IC.
ERR = LOW : Normal operating state
ERR = HIGH : Initial state or error detection
Becomes ERR = HIGH in the initial state following resetting.
Becomes ERR = LOW after resetting.
If a bit-flip occurs in the register which is part of internal logic because of external
noise or similar reason, becomes ERR = HIGH. When ERR = HIGH, re-write all
commands. After resetting, returns to WRR = LOW. At this time it is also
recommended to re-write data to display data RAM.
1
5.3 Display Timing Signal Pins
Pin name I/O Description Number of
pins
Pin for selecting master/slave operation.
Master operation outputs timing signal required for LCD display and slave
operation inputs timing signal required for LCD display. This causes
synchronization in LCD display system.
M/S = HIGH : Master operation
M/S = LOW : Slave operation
Sets as shown in the table below depending on the state of M/S and CLS.
M/S CLS Oscillation
circult CL FR, ____
DOF,
F1, F2, SYNC
HIGH Enabled Output Output
HIGH LOW Disabled Input Output
HIGH Disabled Input Input
LOW LOW Disabled Input Input
M/S I 1
Pin for selecting enable/disable built-in oscillation circuit for display clock.
CLS = HIGH : Built-in oscillation circuit enabled
CLS = LOW : Built-in oscillation circuit disabled (external input)
When CLS = LOW, display clock is input from the CL pin.
To use this IC on master or slave, set each CLS pin to the same level.
Display clock Master Slave
Use of built-in oscillation circuit HIGH HIGH
External input LOW LOW
CLS I 1
Display clock input/output pin. Sets as shown in the table below depending on the
state of M/S and CLS.
M/S CLS CL
HIGH Output
HIGH LOW Input
HIGH Input
LOW LOW Input
CL I/O
To use this IC on master/slave, connect each CL pin.
1

5. PIN DESCRIPTION
12 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
Pin name I/O Description Number of
pins
FR I/O
Liquid crystal alternating-current signal input/output pin.
M/S = HIGH : Output
M/S = LOW : Input
To use this IC on master/slave, connect each FR pin.
1
F1, F2,
SYNC I/O
Liquid crystal synchronization signal input/output pin.
M/S = HIGH : Output
M/S = LOW : Input
To use this IC on master/slave, connect each F1, F2 or SYNC pin.
1 for each
____
DOF I/O
Pin for controlling blanking of liquid crystal display.
M/S = HIGH : Output
M/S = LOW : Input
To use this IC on master/slave, connect each ____ DOF pin.
1
5.4 Liquid Crystal Drive Pins
Pin name I/O Description Number of
pins
SEG0 to
SEG223 O Liquid crystal segment drive output pin. One level is selected from V2, V1, VC, MV1, and MV2by combining display RAM and FR, F1 and F2 signals. 224 in total
COM0 to
COM183 O Liquid crystal common drive output pin. One level is selected from V3, VC, and VSSL (= VSSL) by combining scan data and FR, F1 and F2 signals. 184 in total
5.5 Temperature Sensor Pins
Pin name I/O Description Number of
pins
SVD2 O
Temperature sensor analog voltage output pin. 1
SV22 O
Pin for testing temperature sensor. Sets to open. 1
5.6 Test Pins
Pin name I/O Description Number of
pins
TEST I Pin for testing IC chip. Set to LOW. 1
TEST2 O Pin for testing IC chip. Set to open. 1
TEST3 to
TEST17 I Pin for testing IC chip. Set to open. 1

6. FUNCTIONAL DESCRIPTION
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 13
6. FUNCTIONAL DESCRIPTION
6.1 MPU Interface
6.1.1 Selecting Interface Type
This IC allows data transfer through 8-bit bi-directional data bus (D7 to D0) or serial data input (SI).
Selecting HIGH or LOW for polarity of P/S pin allows selection of 8-bit parallel data input or serial data input
as shown in Table 6.1.
Table 6.1
P/S ___
CS A0 ___ RD ___ WR C86 SI SCL D7～D0
HIGH : Parallel input ___ CS A0 ___ RD ___ WR C86 - - D7～D0
LOW : Serial input ___ CS A0 - - - SI SCL (HZ)
-
: Set - to HIGH or LOW. HZ is in the state of high impedance.
6.1.2 Parallel interface
When parallel interface is selected (P/S = HIGH), setting the C86 pin to HIGH or LOW allows direct
connection to the MPU bus of either 80 series or 68 series as shown in Table 6.2.
Table 6.2
C86 ___
CS A0 ___ RD ___ WR D7～D0
HIGH : 68 series MPU bus ___ CS A0 E R/__ W D7～D0
LOW : 80 series MPU bus ___ CS A0 ___ RD ___ WR D7～D0
Data bus signal is identified by combination of A0, ___ RD(E) and ___ WR(R/__ W) as shown in Table 6.3.
Table 6.3
Common 68 series 80 series
A0 R/__ W ___ RD ___ WR Function
1 1 0 1 Display data reading, reads status.
1 0 1 0 Status data writing, writes command parameter.
0 0 1 0 Writes a command.
6.1.3 Serial Interface
When serial interface is selected (P/S = LOW), the chip is active (___ CS = LOW) and can accept serial data
input (SI) and serial clock input (SCL). Serial interface is comprised of an 8-bit shift register and 3-bit counter.
Serial data is captured from serial data input pin in order from D7, D6 to D0 on the rising edge of the serial
clock and converted into 8-bit parallel data on the rising edge of the 8th serial clock and then processed.
Whether serial data input is display data, command parameter or command is determined by A0 input. For
A0 = HIGH, display data or command parameter, for A0 = LOW, command. A0 input is read and determined
on the 8xn-th rising edge of the serial clock after the chip goes into the active state.
Using the status read command enables read status and read data, respectively, even when serial interface is
selected. However, it should be noted that the ___ CS signal is handled differently from the time of serial data
input. Read from display data RAM is not enabled. Signal chart of serial interface is shown in Fig.6.1.

6. FUNCTIONAL DESCRIPTION
14 EPSON S1D15722D01B000 Technical Manual (Rev.1.1)
Fig.6.1 Signal Chart of Serial Interface
* When the chip is inactive, the counter is reset to the initial state. Continuous serial clock input is possible,
however, it is recommended to clear the counter by setting ___ CS = HIGH for every 8 bits of serial clock at the
time of serial data input so that malfunction caused by external noise can be prevented. When reading serial
data, continuously read data by entering serial clock from the SCL pin with the setting left ___ CS = LOW
instead of setting ___ CS = HIGH after the read command. After getting the read data, to set ___ CS = HIGH is
necessary.
* For serial interface, read from display data RAM is not enabled.
* For SCL signal, great care should be taken for wiring termination reflection and external noise. It is
recommended to check operation using the actual equipment.
6.1.4 Chip Select
Since this IC has chip select pin, parallel interface or serial interface is enabled when ___ CS = LOW is set.
When the chip select is inactive, D0 to D7 are in the state of high impedance and input of A0, ___ RD, ___ WR, SI,
and SCL is disabled. When serial interface is selected, shift register and counter are reset.
6.1.5 Accessing Display Data RAM and Internal Register
Since this IC is accessed as a kind of pipeline processing between LSIs via bus holder coming with internal
data bus, wait time is not necessary if the cycle time is satisfied, enabling high-speed data transmission.
When writing serial data
CS
_
____
SI
SCL
1 2 3 4 5 6 7 8 1 2 3 4 5 6
A
0
When reading serial data
CS
_
____
SI
SCL
A
0
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
Read status command Output data

6. FUNCTIONAL DESCRIPTION
S1D15722D01B000 Technical Manual (Rev.1.1) EPSON 15
For example, if MPU writes data to display data RAM, data is temporarily held in the bus holder and written
to the display data RAM by the next data write cycle. When MPU reads display data RAM, read data is held
in the bus holder in the first data read cycle (dummy) and read on the system bus from the bus holder in the next
data read cycle.
Therefore, read sequence of display data RAM is subject to constraints. In the data read immediately after
the display data read command, the specified address data is not output (dummy read), but it is output at the 2nd
data read session.
This relationship is shown in Fig.6.2.
Fig.6.2 Read Sequence of Display Data RAM
Write
Read
Dummy
N+2N+1N
Write command
N+2N+1N
_
__
WR
MPU
DATA Latch
BUS Holder
Write Signal
n+1n
N+2
Increment N+1
Preset N
n+2n+1n
Read command code
Dummy Read
_
__
RD
MPU
DATA
Read Signal
Column Address
Bus Holder
Data Read Data Read
Internal timingInternal timing
_
__
WR
A
0
A
0
Read command