Fujitsu JASMINE User manual

JASMINE-
Subboard
Documentation
Fujitsu Microelectronics Europe GmbH
Am Siebenstein 6-10
63303 Dreieich-Buchschlag, Germany

2
History
Revision Date Comment
V1.0 07.03.01 New Document

3
Warranty and Disclaimer
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its
warranties and its liability for all products delivered free of charge (e.g. software include or header files,
application examples, target boards, evaluation boards, engineering samples of IC’s etc.), its performance
and any consequential damages, on the use of the Product in accordance with (i) the terms of the License
Agreement and the Sale and Purchase Agreement under which agreements the Product has been delivered,
(ii) the technical descriptions and (iii) all accompanying written materials. In addition, to the maximum
extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH disclaims all warranties and
liabilities for the performance of the Product and any consequential damages in cases of unauthorised
decompiling and/or reverse engineering and/or disassembling. Note, all these products are intended and
must only be used in an evaluation laboratory environment.
1. Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in
accordance with the accompanying written materials for a period of 90 days form the date of
receipt by the customer. Concerning the hardware components of the Product, Fujitsu
Microelectronics Europe GmbH warrants that the Product will be free from defects in material and
workmanship under use and service as specified in the accompanying written materials for a
duration of 1 year from the date of receipt by the customer.
2. Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH entire liability and
the customer’s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH sole
discretion, either return of the purchase price and the license fee, or replacement of the Product or
parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in original
packing and without further defects resulting from the customer’s use or the transport. However,
this warranty is excluded if the defect has resulted from an accident not attributable to Fujitsu
Microelectronics Europe GmbH, or abuse or misapplication attributable to the customer or any
other third party not relating to Fujitsu Microelectronics Europe GmbH.
3. To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbH
disclaims all other warranties, whether expressed or implied, in particular, but not limited to,
warranties of merchantability and fitness for a particular purpose for which the Product is not
designated.
4. To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH and
its suppliers´ liability is restricted to intention and gross negligence.
NO LIABILITY FOR CONSEQUENTIAL DAMAGES
To the maximum extent permitted by applicable law, in no event shall Fujitsu
Microelectronics Europe GmbH and its suppliers be liable for any damages whatsoever
(including but without limitation, consequential and/or indirect damages for personal injury,
assets of substantial value, loss of profits, interruption of business operation, loss of
information, or any other monetary or pecuniary loss) arising from the use of the Product.
Should one of the above stipulations be or become invalid and/or unenforceable, the remaining stipulations
shall stay in full effect.

4
Important notice
This Starterkit contains an evaluation board, documentation and software on a CD-ROM.
For documentation or software updates, please refer to our web site www.fujitsu-fme.com !
Fujitsu reserves the right to make changes to its products or to discontinue any semiconductor
product or service without notice.
07.03.01 V1.0

5
1. Introduction
The JASMINE-Subboard is a low cost multifunctional evaluation board for Fujitsu graphic device
controller Jasmine. It can be used with CREMSON-Starterkit CPU-Modul only for software development
and testing as a simple target board.
The board allows the designer immediately to start the software development before his own final target
system is available.
2. Features
•Graphic controller Jasmine in a package FPT-208P-M01
•12 MHz crystal
•Enhanced Video Input Processor (SAA7111A)
•Quarzoszilator for VIC
•Video input connector (BNC-90)
•Display interface (HD-DSUB-BU-15Pol)
•“CPU-Modul” interface
3. Jumpers
This chapter describes all jumpers which can be modified on the evaluation board. The default setting is
shown with a gray shaded area. All jumpers and switches are named directly on the board by its meaning,
so it is very easy to set the jumpers according to the features.
3.1 Power Supply Voltage (JP205, JP206, JP207)
Jumper setting Description
ON (closed) Core supply 2V5
2V5 power supply
(JP205) OFF (open) NO power supply
Jumper setting Description
ON (closed) IO supply 3V3
3V3 power supply
(JP206) OFF (open) NO power supply
Jumper setting Description
ON (closed) IO supply 3V3
3V3 power supply
(JP207) OFF (open) NO power supply
NOTE:
The supply voltage for the core and the IO Pins must be set. Otherwise it could happen that the
controller does not work correctly!

6
3.2 Chip Select (JP508)
CS Jumper setting Description
CS0 ON (closed 1-2) ULB-Interface Chip-Select 0
CS1 ON (closed 3-4) ULB-Interface Chip-Select 1
CS2 ON (closed 5-6) ULB-Interface Chip-Select 2
CS3 ON (closed 7-8) ULB-Interface Chip-Select 3
CS4 ON (closed 9-10) ULB-Interface Chip-Select 4
CS5 ON (closed 11-12) ULB-Interface Chip-Select 5
CS6 ON (closed 13-14) ULB-Interface Chip-Select 6
3.3 Define graphic controller Operating Mode (JP201, JP202, JP203)
Up to four Jasmine devices can be join one chip select. The size and location of configuration for every
Jasmine is fixed. The size is set to 64 kByte for every Jasmine and the location are specified by Mode
Jumpers (JP201, JP202).
Jasmine number JP202 JP201
Jasmine 0 2-32-3
Jasmine 1 2-31-2
Jasmine 2 1-22-3
Mode1-0
Jasmine 3 1-21-2
Jasmine can also act as a 16Bit device from MCU’s point of view. The data mode can be set by Jumper
JP203.
JP203 Description
1-232 Bit data mode
Mode2 2-316 Bit data mode
It is possible to invert the RDY signal (Mode3 = 1). The RDY signal is not inverted with the application of
the CPU-Module (Mode3 = 0).
JP204 Description
Mode3 5-6RDY not inverted

7
3.4 Fujitsu Test Pin (JP210)
This pin is usable for internal tests if the chip is in the test mode. In run mode this jumper must be put on
GND.
JP210 Description
1-2Test mode
Test 2-3Run mode
3.5 Reset Pin (JP212)
The Jumper JP212 determines the Jasmine Reset Pin.
It can be connected directly with the Reset of the VGC, or with a port of the MCU, to execute a software
Reset.
JP212 Description
1-2Software Reset
Reset 2-3VGC Reset
3.6 SPB Interface (JP209, JP215)
JP209 Description
ON (closed) SPB needs pull-up for
operation
SPB_BUS OFF (open) SPB no operation
JP215 Description
ON (closed) Probe clock enable
SPB_TST
(clock debug output) OFF (open) Probe clock not enable
3.7 RDY (JP213)
Tristate enable for RDY. RDY can be driven with a pull-up if several devices are connected to the bus.
JP213 Description
1-2RDY for several devices
RDY Tristate enable 2-3RDY for one device

8
3.8 External Clock Input (JP214)
JP214 Description
ON (closed) NO ext. clock
Ext. Clock OFF (open) Can used with a pull-up
as ext. Clock
3.9 Video Input Processor (JP308, JP302, JP301, JP305, JP306, JP307)
JP308 Description
On (closed) Digital and analog
supply voltage for VICPower supply
voltage OFF (open) NO power supply
JP302 Description
1-2Chip enable connected
with VCC
VIC enable 2-3Chip enable connected
with PortS0-MCU
JP301 Description
GND (closed) 0 = 48h for write,
49h for read
I2C-Bus slave
address select VCC (open) 1 = 4Ah for write,
4Bh for read
JP305 Description
1-2HS connected with
VREF (GDC)Video Scaler
Vertical Reference 2-3VS connected with
VREF (GDC)
JP306 Description
1-2Video flag from ext.
video decoder
Video active flag
from ext. video
decoder 2-3-
JP307 Description
Video Scaler Clock 4-6Video clock output from
SAA7111A

9
3.10 Header for Debug Signals
CCFL Signals (JP208)
•CCFL_OFF –CCFL supply control OFF
•CCFL_IGNIT –CCFL supply control IGNITION
•CCFL_FET2 –CCFL FET driver2
•CCFL_FET1 –CCFL FET driver1
I2C Signals from SAA7111A (JP211)
•I2C_SCL -Serial clock line
•I2C_SDA -Serial data line
•RES-out -Reset output (active low)
SAA7111A Signals (JP304)
•RTC0 -Real time control output
•VSC_IDENT -Video scaler field identification
•ALPHA -Video scaler ALPHA
•Vref -Vertical reference output signal
•Href -Horizontal reference output signal
•Cref -Clock reference output
•HS -Horizontal sync output signal
•VS -Vertical sync output signal
•GPSW -General purpose switch output
•RES-out -Reset output (active low)
VIC Signals (JP401)
•BUS_VCS_D7-0-Video scaler data input
•VSC_CLKV -Video scaler clock
LVDS connector (JP402)
Signals for LVDS connector
Display Signals (JP501)
•DIS_PIXCLK -Display pixel clock
•A_RED -Analog red
•A_GREEN -Analog green
•A_BLUE -Analog blue
•DIS_HSYNC -Horizontal sync signal
•DIS_VSYNC -Vertical sync signal
•DIS_VREF -Display vertical reference signal
•DIS_CK -Display clock
Display Digital Signals (JP502, JP503, JP504)
•BUS_DIS_D7-0-Digital display data
•BUS_DIS_D15-8-Digital display data
•BUS_DIS_D23-16-Digital display data

10
ULB Signals (JP505, JP506)
•BUS_D31-0-ULB interface data bus
•BUS_A20-0-ULB interface address bus
•ULB_INTRQ -ULB interrupt request
•ULB_ RDY -Ready signal for bus transfer
•ULB_RDX -Read enable for ULB data bus
•ULB_WRX3-0-Write enable for ULB data bus
•ULB_CLK -ULB interface clock
•ULB_CS -Chip select
•ULB_DREQ -DMA request signal
•ULB_DACK -DMA acknowledge signal
For more information please look at the Hardware Manual of the Jasmine graphic controller and the Data
Sheet of the Video Input Processor SAA7111A.

11
4. Schematics and Drawings

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