GOWIN DK-START-GW1NR9 User manual

DK-START-GW1NR9 V1.1
User Guide
DBUG361-1.2E, 2019/12/19

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Revision History
Date
Version
Description
03/19/2019
1.0E
Initial version published.
11/29/2019
1.1E
MIPI input function removed.
12/19/2019
1.2E
The version of DK-START-GW1NR9 added.

Contents
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Contents
Contents...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1About This Guide ..........................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Supported Products............................................................................................................1
1.3 Related Documents............................................................................................................1
1.4 Terminology and Abbreviation ............................................................................................ 2
1.5 Support and Feedback .......................................................................................................3
2Development Board Introduction.................................................................4
2.1 Overview.............................................................................................................................4
2.2 A Development Board Suite................................................................................................ 5
2.3 PCB Components............................................................................................................... 6
2.4 System Diagram................................................................................................................. 7
2.5 Feature ............................................................................................................................... 8
2.6 Development Board Specification ......................................................................................9
3Development Board Circuit........................................................................ 11
3.1 FPGA Module ................................................................................................................... 11
3.1.1 Overview........................................................................................................................ 11
3.1.2 I/O BANK Introduction ...................................................................................................12
3.2 Download.......................................................................................................................... 14
3.2.1 Overview........................................................................................................................14
3.2.2 USB Download Circuit...................................................................................................14
3.2.3 Download Flow..............................................................................................................14
3.2.4 Pins Distribution.............................................................................................................14
3.3 Power Supply....................................................................................................................15
3.3.1 Overview........................................................................................................................15

Contents
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3.3.2 Power System Distribution ............................................................................................16
3.3.3 Pins Distribution.............................................................................................................16
3.4 Clock, Reset ..................................................................................................................... 17
3.4.1 Overview........................................................................................................................17
3.4.2 Clock, Reset ..................................................................................................................17
3.4.3 Pins Distribution.............................................................................................................17
3.5 LED...................................................................................................................................18
3.5.1 Overview........................................................................................................................18
3.5.2 LED Circuit.....................................................................................................................18
3.5.3 Pins Distribution.............................................................................................................18
3.6 Switches ........................................................................................................................... 19
3.6.1 Overview........................................................................................................................19
3.6.2 Switch Circuit.................................................................................................................19
3.6.3 Pins Distribution.............................................................................................................19
3.7 Key....................................................................................................................................20
3.7.1 Overview........................................................................................................................20
3.7.2 Key Circuit ..................................................................................................................... 20
3.7.3 Pins Distribution.............................................................................................................20
3.8 GPIO.................................................................................................................................21
3.8.1 Overview........................................................................................................................21
3.8.2 GPIO Circuit................................................................................................................... 21
3.8.3 Pins Distribution.............................................................................................................22
3.9 MIPI/LVDS ........................................................................................................................24
3.9.1 Overview........................................................................................................................24
3.9.2 MIPI/LVDS Circuit..........................................................................................................24
3.9.3 Pins Distribution.............................................................................................................25
4Precautions..................................................................................................29
5Gowin YunYuan Software...........................................................................30

List of Figures
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List of Figures
Figure 2-1 DK-START-GW1NR9 V1.1 Development Board.............................................................. 4
Figure 2-2 ADevelopment Board Suite .............................................................................................5
Figure 2-3 PCB Components.............................................................................................................6
Figure 2-4 System Diagram...............................................................................................................7
Figure 3-1 GW1NR series FPGA Products I/O Bank Distribution ..................................................... 12
Figure 3-2 GW1N-9 LQ144 Package Pins Distribution (Top View) ...................................................13
Figure 3-3 Connection Diagram for FPGAUSB Download ...............................................................14
Figure 3-4 Power System Distribution ............................................................................................... 16
Figure 3-5 Clock, Reset..................................................................................................................... 17
Figure 3-6 LED Circuit .......................................................................................................................18
Figure 3-7 Switch Circuit.................................................................................................................... 19
Figure 3-8 Key Circuit Diagram.......................................................................................................... 20
Figure 3-9 GPIO Circuit .....................................................................................................................21
Figure 3-10 LVDS Circuit ...................................................................................................................24

List of Tables
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List of Tables
Table 1-1 Abbreviation and Terminology............................................................................................ 2
Table 2-1 Development Board Specification...................................................................................... 9
Table 3-1 GW1NR-9 FPGA Resources List....................................................................................... 11
Table 3-2 FPGA I/O Pins Distribution................................................................................................. 13
Table 3-3 FPGA Download Pins Distribution ..................................................................................... 14
Table 3-4 FPGA Power Pins Distribution ...........................................................................................16
Table 3-5 FPGA Clock and Reset Pins Distribution........................................................................... 17
Table 3-6 LED Pins Distribution.........................................................................................................18
Table 3-7 Switch Circuit Pins Distribution ..........................................................................................19
Table 3-8 Key Circut Pins Distribution ...............................................................................................20
Table 3-9 J14 GPIO Pins Distribution ................................................................................................22
Table3-10 J13 GPIO Pins Distribution ...............................................................................................22
Table 3-11 J15 FPGA Pin Distribution (IDES16:1 Supported)........................................................... 25
Table 3-12 J17 FPGA Pin Distribution ............................................................................................... 25
Table 3-13 J16 FPGA Pin Distribution (IDES16:1 Supported)........................................................... 27
Table 3-14 J18 FPGA Pin Distribution (IDES16:1 Supported)........................................................... 28

1 About This Guide
1.1 Purpose
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1About This Guide
1.1 Purpose
The DK-START-GW1NR9 V1.1 user manual consists of the following
four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the function, circuit, and pin distribution of each
module;
3. Attentions in use of the development board;
4. An introduction to the usage of the FPGA development software.
1.2 Supported Products
The information in the guide applies to GW1NR series of FPGA
products: GW1NR-9.
1.3 Related Documents
The user manuals are available on the GOWINSEMI Website. You can
find the related documents at www.gowinsemi.com
1. DS117, GW1NR Series FPGA Products Data Sheet
2. UG119, GW1NR Series of FPGAProducts Package and Pinout Manual
3. UG801, GW1NR-9 Devices Pinout Manual
4. UG290, Gowin FPGA Products Programming and Configuration
Manual
5. SUG100, Gowin YunYuan Software User Guide

1 About This Guide
1.4 Terminology and Abbreviation
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1.4 Terminology and Abbreviation
The terminology and abbreviation used in this manual are as shown in
Table 1-1 below.
Table 1-1 Abbreviation and Terminology
Terminology and Abbreviation
Meaning
FPGA
Field Programmable GateArray
SIP
System in Package
SDRAM
Synchronous Dynamic RAM
PSRAM
Pseudo static random access memory
CFU
Configurable Function Unit
CLS
Configurable Logic Slice
CRU
Configurable Routing Unit
LUT4
Four-input Look-up Tables
LUT5
Five-input Look-up Tables
LUT6
Six-input Look-up Tables
LUT7
Seven-input Look-up Tables
LUT8
Eight-input Look-up Tables
REG
Register
ALU
Arithmetic Logic Unit
IOB
Input / Output Block
S-SRAM
Shadow SRAM
B-SRAM
Block Static Random Access Memory
SP
Single Port
SDP
Semi Dual Port
DP
Dual Port
DSP
Digital Signal Processing
DQCE
Dynamic Quadrant Clock Enable
DCS
Dynamic Clock Selector
PLL
Phase-locked Loop
DLL
Delay-locked Loop
LQ144
LQFP144 package

1 About This Guide
1.5 Support and Feedback
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1.5 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com
E-mail: [email protected]
+Tel: [phone]