GOWIN GW1NS Series User manual

DK-START-GW1NS4&GW1NSR4&GW1NS
ER4_QN48
User Guide
DBUG371-1.0E, 7/8/2020

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Revision History
Date
Version
Description
7/8/2020
1.0E
Initial version published.

Contents
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Contents
Contents...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1About This Guide ..........................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Supported Products............................................................................................................1
1.1 Related Documents............................................................................................................1
1.2 Terminology and Abbreviations...........................................................................................2
1.3 Support and Feedback .......................................................................................................2
2Development Board Introduction.................................................................3
2.1 Overview.............................................................................................................................3
2.2 A Development Board Suite................................................................................................4
2.3 PCB Components............................................................................................................... 5
2.4 System Block Diagram .......................................................................................................6
2.5 Features..............................................................................................................................6
2.6 Development Board Specification ......................................................................................7
3Development Board Circuit..........................................................................9
3.1 FPGA Module .....................................................................................................................9
3.2 Download & Debug............................................................................................................. 9
3.2.1 Overview.......................................................................................................................... 9
3.2.2 USB ............................................................................................................................... 10
3.2.3 J- LINK...........................................................................................................................10
3.2.4 Procedure ...................................................................................................................... 10
3.2.5 Pins Distribution............................................................................................................. 11
3.3 Power Supply.................................................................................................................... 11
3.3.1 Overview........................................................................................................................ 11
3.3.2 Power System Distribution ............................................................................................12

Contents
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3.3.3 Pins Distribution.............................................................................................................13
3.4 Clock, Reset ..................................................................................................................... 13
3.4.1 Overview........................................................................................................................13
3.4.2 Clock, Reset ..................................................................................................................13
3.4.3 Pins Distribution.............................................................................................................14
3.5 LED...................................................................................................................................14
3.5.1 Overview........................................................................................................................14
3.5.2 LED Circuit.....................................................................................................................14
3.5.3 Pins Distribution.............................................................................................................15
3.6 Switches ........................................................................................................................... 15
3.6.1 Overview........................................................................................................................15
3.7 Key....................................................................................................................................15
3.7.1 Overview........................................................................................................................15
3.7.2 Key Circuit .....................................................................................................................15
3.7.3 Pins Distribution.............................................................................................................16
3.8 GPIO.................................................................................................................................16
3.8.1 Overview........................................................................................................................16
3.8.2 GPIO Circuit................................................................................................................... 16
3.8.3 Pins Distribution.............................................................................................................16
3.9 MIPI/LVDS ........................................................................................................................17
3.9.1 Overview........................................................................................................................17
3.9.2 MIPI/LVDS Circuit..........................................................................................................17
3.9.3 Pins Distribution.............................................................................................................18
3.10 RS232.............................................................................................................................20
3.10.1 Overview......................................................................................................................20
3.10.2 RS232 Circuit...............................................................................................................20
3.10.3 Pins Distribution...........................................................................................................20
4Precautions..................................................................................................21
5Gowin Software...........................................................................................22

List of Figures
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List of Figures
Figure 2-1 DK-START-GW1NS4&GW1NSR4& GW1NSER4_QN48 V1.1........................................3
Figure 2-2A Development Board Suite .............................................................................................. 4
Figure 2-3 PCB Components.............................................................................................................5
Figure 2--4 System Block Diagram.................................................................................................... 6
Figure 3-1 Connection Diagram for FPGA USB ................................................................................10
Figure 3-2 FPGA J-LINK Connection Diagram..................................................................................10
Figure 3-3 Power System Distribution ............................................................................................... 12
Figure 3-4 Clock, Reset..................................................................................................................... 13
Figure 3-5 LED Circuit .......................................................................................................................14
Figure 3-6 Key Circuit Diagram.......................................................................................................... 15
Figure 3-7 GPIO Circuit ..................................................................................................................... 16
Figure 3-8 LVDS Circuit .....................................................................................................................17
Figure 3-9 RS232 Download Connection ..........................................................................................20

List of Tables
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List of Tables
Table 1-1 Terminology and Abbreviations.......................................................................................... 2
Table 2-1 Development Board Specification...................................................................................... 7
Table 3-1 FPGA Download Pins Distribution ..................................................................................... 11
Table 3-2 FPGA Power Pins Distribution ...........................................................................................13
Table 3-3 FPGA Clock and Reset Pins Distribution........................................................................... 14
Table 3-4 LED Pins Distribution.........................................................................................................15
Table 3-5 Key Circut Pins Distribution ............................................................................................... 16
Table 3-6 J17 GPIO Pins Distribution ................................................................................................16
Table 3-7 J15 FPGA Pin Distribution..................................................................................................18
Table 3-8 J16 FPGA Pin Distribution..................................................................................................19
Table 3-9 RS232 Pins Distribution.....................................................................................................20

1 About This Guide
1.1 Purpose
DBUG371-1.0E
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1About This Guide
1.1 Purpose
DK-START-GW1NS4&GW1NSR4&GW1NSER4_QN48 V1.1 user
manual consists of the following four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the function, circuit, and pin distribution of each
module;
3. Attentions in use of the development board;
4. An introduction to the usage of the FPGA development software.
1.2 Supported Products
The information in the guide applies to GW1NS/GW1NSR/GW1NSER
series of FPGA products: GW1NS-4, GW1NS-4C, GW1NSR-4,
GW1NSR-4C, GW1NSER-4C.
1.1 Related Documents
You can find the related documents at www.gowinsemi.com:
1. DS821, GW1NS series FPGA Products Data Sheet
2. UG823, GW1NS series of FPGA Products Package and Pinout Manual
3. UG824, GW1NS-4&4C Pinout
4. DS861, GW1NSR series FPGA Products Data Sheet
5. DS881, GW1NSER series FPGA Products Data Sheet
6. UG864, GW1NSR-4 Pinout
7. UG865, GW1NSR-4C Pinout
8. DS881, GW1NSER series FPGA Products Data Sheet
9. UG884, GW1NSER series of FPGA Products Package and Pinout
Manual

1 About This Guide
1.2 Terminology and Abbreviations
DBUG371-1.0E
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10. UG883, GW1NSER-4C Pinout
11. UG290, Gowin FPGA Products Programming and Configuration Guide
12. SUG100, Gowin Software User Guide
1.2 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations
Full Name
FPGA
Field Programmable GateArray
MIPI
Mobile Industry Processor Interface
LVDS
Low Voltage Differential Signaling
GPIO
Gowin Programmable Input/output
MCU
Microprogrammed Control Unit
USB
Universal Serial Bus
SoC
System On Chip
JTAG
Joint Test Action Group
SRAM
Static Random Access Memory
RS232
Recommend Standard 232
ARM
Advanced RISC Machines
B-SRAM
Block SRAM
SPI
Serial Peripheral Interface
PLL
Phase-locked Loop
QN48
QFN48
1.3 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com
E-mail: [email protected]

2 Development Board Introduction
2.1 Overview
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2Development Board Introduction
Take GW1NS-4C for an instance, this chapter mainly introduces the
composition, functions and features of the development board. Compared
to the GW1NS-4C, the GW1NS-4 has no built-in Cortex-M3 processor, and
the GW1NSER-4C offers one-time programming and authentication code
features.
2.1 Overview
Figure 2-1 DK-START-GW1NS4&GW1NSR4& GW1NSER4_QN48 V1.1
The development board adopts the GW1NS-4 SoC FPGA. SoC FPFA
is embedded with an ARM Cortex-M3 hard core processor. When the ARM
Cortex-M3 hard-core processor is employed as the core, the needs of the
Min. memory can be met. FPGA logic resources and other embedded
resources can flexibly facilitate the peripheral control functions, which
provide excellent calculation functions and exceptional system response
interrupts. They also offer high performance, low power consumption,