GOWIN GW1N-LV9LQ144C6I5 V1.1 User manual

DK_START_GW1N-LV9LQ144C6I5_V1.1
User Guide
DBUG398-1.1E, 08/13/2021

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and is not responsible for any damage incurred to your hardware, software, data, or
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the GOWINSEMI Terms and Conditions of Sale. All information in this document should be
treated as preliminary. GOWINSEMI may make changes to this document at any time
without prior notice. Anyone relying on this documentation should contact GOWINSEMI for
the current documentation and errata.

Revision History
Date
Version
Description
08/13/2021
1.0E
Initial version published.

Contents
DBUG398-1.1E
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Contents
Contents ...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1About This Guide ............................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Related Documents ............................................................................................................1
1.3 Abbreviations and Terminology...........................................................................................1
1.4 Support and Feedback ....................................................................................................... 2
2Development Board Description....................................................................3
2.1 Overview.............................................................................................................................3
2.2 A Development Board Suite................................................................................................ 4
2.3 PCB Components ...............................................................................................................5
2.4 System Architecture............................................................................................................ 5
2.5 Features.............................................................................................................................. 6
2.6 Development Board Specification ......................................................................................7
3FPGA Circuits ..................................................................................................9
3.1 FPGA Module .....................................................................................................................9
3.2 Download Interface.............................................................................................................9
3.2.1 Overview..........................................................................................................................9
3.2.2 USB Download Circuit ...................................................................................................10
3.2.3 Downloading the Data Stream.......................................................................................10
3.2.4 Pinout............................................................................................................................. 11
3.3 Power Supply.................................................................................................................... 11
3.3.1 Overview........................................................................................................................ 11
3.3.2 Power System Distribution ............................................................................................12

Contents
DBUG398-1.1E
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3.3.3 Power Pinout .................................................................................................................12
3.4 Clock, Reset .....................................................................................................................13
3.4.1 Overview........................................................................................................................13
3.4.2 Clock, Reset ..................................................................................................................13
3.4.3 Pinout............................................................................................................................. 13
3.5 LED ...................................................................................................................................13
3.5.1 Overview........................................................................................................................13
3.5.2 LED Circuit..................................................................................................................... 14
3.5.3 Pinout............................................................................................................................. 14
3.6 Switches ...........................................................................................................................14
3.6.1 Overview........................................................................................................................14
3.6.2 Key Switch Circuit..........................................................................................................15
3.6.3 Pinout............................................................................................................................. 15
3.7 Key....................................................................................................................................15
3.7.1 Overview........................................................................................................................15
3.7.2 Key Circuit .....................................................................................................................16
3.7.3 Pinout............................................................................................................................. 16
3.8 GPIO .................................................................................................................................16
3.8.1 Overview........................................................................................................................16
3.8.2 GPIO Circuit................................................................................................................... 17
3.8.3 Pinout............................................................................................................................. 17
3.9 LVDS................................................................................................................................. 20
3.9.1 Overview........................................................................................................................20
3.9.2 LVDS Circuit ..................................................................................................................20
3.9.3 Pinout............................................................................................................................. 21
4Considerations ..............................................................................................23
5Gowin Software .............................................................................................25

List of Figures
DBUG398-1.1E
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List of Figures
Figure 2-1 DK_START_GW1N-LV9LQ144C6I5_V1.1 Development Board ...................................... 3
Figure 2-2 A Development Board Kit .................................................................................................4
Figure 2-3 PCB Components............................................................................................................. 5
Figure 2-4 System Architecture.......................................................................................................... 5
Figure 3-1 Connection Diagram of FPGA USB Downloading and Configuration ..............................10
Figure 3-2 Power System Distribution ............................................................................................... 12
Figure 3-3 Clock, Reset ..................................................................................................................... 13
Figure 3-4 LED Circuit .......................................................................................................................14
Figure 3-5 Key Switch Circuit.............................................................................................................15
Figure 3-6 Key Circuit Diagram..........................................................................................................16
Figure 3-7 GPIO Circuit .....................................................................................................................17
Figure 3-8 LVDS Circuit ..................................................................................................................... 20
Figure 4-1 Download Speed .............................................................................................................. 23

List of Tables
DBUG398-1.1E
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List of Tables
Table 1-1 Abbreviations and Terminologies .......................................................................................2
Table 2-1 Development Board Specification......................................................................................7
Table 3-1 FPGA Download and Pinout ..............................................................................................11
Table 3-2 GW1N-9 FPGA Power Pinout ............................................................................................12
Table 3-3 FPGA Clock and Reset Pinout...........................................................................................13
Table 3-4 LED Pinout .........................................................................................................................14
Table 3-5 Clock Circuit Pinout............................................................................................................ 15
Table 3-6 Key Pinout .......................................................................................................................... 16
Table 3-7 J8 FPGA Pinout.................................................................................................................. 17
Table 3-8 J9 FPGA Pinout.................................................................................................................. 19
Table 3-9 J10 FPGA Pinout................................................................................................................ 21
Table 3-10 J10 FPGA Pinout.............................................................................................................. 21

1 About This Guide
1.1 Purpose
DBUG398-1.1E
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1About This Guide
1.1 Purpose
The DK_START_GW1N-LV9LQ144C6I5_V1.1 user guide consists of
the following four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the hardware circuits functions, circuit, and pinouts;
3. Notes for using the development board;
4. Introduction to the use of the FPGA development software.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website. You
can find the related documents at www.gowinsemi.com:
DS100, GW1N series of FPGA Products Data Sheet
UG103, GW1N series of FPGA Products Package and Pinout
UG114, GW1N-9 Pinout
UG290, Gowin FPGA Products Programming and Configuration User
Guide
SUG100, Gowin Software User Guide
1.3 Abbreviations and Terminology
The abbreviations and terminology used in this manual are set out in
Table 1-1.

1 About This Guide
1.4 Support and Feedback
DBUG398-1.1E
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Table 1-1 Abbreviations and Terminologies
Abbreviations and Terminology
Full Name
FPGA
Field Programmable Gate Array
LED
Light Emitting Diode
LDO
Low Dropout Regulator
GPIO
Gowin Programmable I/O
LUT4
Four-input Look-up Tables
SSRAM
Shadow Static Random Access Memory
BSRAM
Block Static Random Access Memory
PLL
Phase-locked Loop
DLL
Delay-locked Loop
DSP
Digital Signal Processing
LQ144
LQFP144
1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly using the information provided below.
Website: www.gowinsemi.com
E-mail: [email protected]

2 Development Board Description
2.1 Overview
DBUG398-1.1E
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2Development Board Description
2.1 Overview
Figure 2-1 DK_START_GW1N-LV9LQ144C6I5_V1.1 Development Board
The Development board adopts the GW1N-LV9LQ144C6I5 devices of
the GW1N-9 series of FPGA products. It features a range of advanced
features including low power consumption, instant start-up, high security,
low-cost, and flexible extensions, all of which can effectively reduce the
learning cost and help users quickly design and develop programmable
logic devices.
The development board includes two GPIO ports and two LVDS ports.
These provide users with a hardware evaluation and testing platform that
offers a high integration level and stable performance via flexible VCCO
regulation (3.3 V, 2.5 V, and 1.2 V). The development board also offers