Holtek HT66F488 User manual

A/D Flash MCU with EEPROM
HT66F488/HT66F489
Revision: V1.21 Date: November 09, 2017November 09, 2017

Rev. 1.21 2 November 09, 2017 Rev. 1.21 3 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Table of Contents
Features............................................................................................................ 7
CPU Features ......................................................................................................................... 7
Peripheral Features................................................................................................................. 7
General Description ........................................................................................ 8
Selection Table................................................................................................. 8
Block Diagram.................................................................................................. 9
Pin Assignment................................................................................................ 9
Pin Descriptions ............................................................................................ 10
Absolute Maximum Ratings.......................................................................... 13
D.C. Characteristics....................................................................................... 13
A.C. Characteristics....................................................................................... 15
LVR & LVD Characteristics ........................................................................... 16
A/D Converter Electrical Characteristics..................................................... 17
Power on Reset Electrical Characteristics.................................................. 17
System Architecture...................................................................................... 18
Clocking and Pipelining......................................................................................................... 18
Program Counter................................................................................................................... 19
Stack ..................................................................................................................................... 20
Arithmetic and Logic Unit – ALU ........................................................................................... 20
Flash Program Memory................................................................................. 21
Structure................................................................................................................................ 21
Special Vectors ..................................................................................................................... 21
Look-up Table........................................................................................................................ 22
Table Program Example........................................................................................................ 22
In Circuit Programming ......................................................................................................... 23
On-Chip Debug Support – OCDS ......................................................................................... 24
RAM Data Memory ......................................................................................... 25
Structure................................................................................................................................ 25
General Purpose Data Memory ........................................................................................... 25
Special Purpose Data Memory ............................................................................................ 26
Special Function Register Description........................................................ 27
Indirect Addressing Register – IAR0, IAR1, IAR2 ................................................................. 27
Memory Pointers – MP0, MP1L, MP1H, MP2L, MP2H......................................................... 27
Accumulator – ACC............................................................................................................... 29
Program Counter Low Register – PCL.................................................................................. 29
Look-up Table Registers – TBLP, TBHP, TBLH..................................................................... 29
Status Register – STATUS ................................................................................................... 29

Rev. 1.21 2 November 09, 2017 Rev. 1.21 3 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
EEPROM Data Memory.................................................................................. 31
EEPROM Data Memory Structure ........................................................................................ 31
EEPROM Registers .............................................................................................................. 31
Reading Data from the EEPROM ........................................................................................ 33
Writing Data to the EEPROM................................................................................................ 33
Write Protection..................................................................................................................... 33
EEPROM Interrupt ................................................................................................................ 33
Programming Considerations................................................................................................ 34
Oscillator ........................................................................................................ 35
Oscillator Overview ............................................................................................................... 35
System Clock Congurations................................................................................................ 35
External Crystal/Ceramic Oscillator – HXT ........................................................................... 36
Internal RC Oscillator – HIRC ............................................................................................... 37
External 32.768kHz Crystal Oscillator – LXT ........................................................................ 37
Internal 32kHz Oscillator – LIRC........................................................................................... 38
Supplementary Oscillator ...................................................................................................... 38
Operating Modes and System Clocks ......................................................... 39
System Clocks ...................................................................................................................... 39
System Operation Modes...................................................................................................... 40
Control Register .................................................................................................................... 41
Fast Wake-up ........................................................................................................................ 42
Operating Mode Switching ................................................................................................... 43
Standby Current Considerations ........................................................................................... 45
Wake-up................................................................................................................................ 45
Programming Considerations................................................................................................ 46
Watchdog Timer............................................................................................. 46
Watchdog Timer Clock Source.............................................................................................. 46
Watchdog Timer Control Register ......................................................................................... 46
Watchdog Timer Operation ................................................................................................... 48
Reset and Initialisation.................................................................................. 49
Reset Functions .................................................................................................................... 49
Reset Initial Conditions ......................................................................................................... 51
Input/Output Ports ......................................................................................... 54
Pull-high Resistors ................................................................................................................ 55
Port A Wake-up ..................................................................................................................... 55
I/O Port Control Registers ..................................................................................................... 55
Pin-shared Functions ............................................................................................................ 55
I/O Pin Structures.................................................................................................................. 55
I/O Port source current selection........................................................................................... 57
Programming Considerations................................................................................................ 59

Rev. 1.21 4 November 09, 2017 Rev. 1.21 5 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Timer Modules – TM ...................................................................................... 59
Introduction ........................................................................................................................... 59
TM Operation ........................................................................................................................ 60
TM Clock Source................................................................................................................... 60
TM Interrupts......................................................................................................................... 60
TM External Pins................................................................................................................... 60
TM Input/Output Pin Control Register ................................................................................... 61
Programming Considerations................................................................................................ 63
Compact Type TM – CTM .............................................................................. 64
Compact TM Operation......................................................................................................... 64
Compact Type TM Register Description................................................................................ 65
Compact Type TM Operating Modes .................................................................................... 69
Standard Type TM – STM .............................................................................. 75
Standard TM Operation......................................................................................................... 75
Standard Type TM Register Description ............................................................................... 76
Standard Type TM Operating Modes .................................................................................... 80
Periodic Type TM – PTM0, PTM1 .................................................................. 90
Periodic TM Operation .......................................................................................................... 90
PTM register description ....................................................................................................... 91
Periodic Type TM Operating Modes...................................................................................... 95
Analog to Digital Converter ........................................................................ 104
A/D Overview ...................................................................................................................... 104
A/D Converter Register Description .................................................................................... 104
A/D Converter Data Registers – ADRL, ADRH ................................................................... 105
A/D Converter Control Registers – ADCR0, ADCR1, ACERL............................................. 105
A/D Operation ..................................................................................................................... 108
A/D Input Pins ......................................................................................................................110
Summary of A/D Conversion Steps......................................................................................110
Programming Considerations...............................................................................................112
A/D Transfer Function ..........................................................................................................112
A/D Programming Examples................................................................................................113
Serial Interface Module – SIM ......................................................................115
SPI Interface ........................................................................................................................115
SPI Register .........................................................................................................................116
SPI Communication .............................................................................................................119
I2C Interface ........................................................................................................................ 121
I2C Register ......................................................................................................................... 122
I2C Bus Communication ...................................................................................................... 126
I2C Bus Start Signal............................................................................................................. 127
Slave Address ..................................................................................................................... 127
I2C Bus Read/Write Signal .................................................................................................. 127
I2C Bus Slave Address Acknowledge Signal ....................................................................... 127
I2C Bus Data and Acknowledge Signal ............................................................................... 128
I2C Time-out Control............................................................................................................ 129

Rev. 1.21 4 November 09, 2017 Rev. 1.21 5 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
UART Module Serial Interface .................................................................... 131
UART External Interface ..................................................................................................... 131
UART Data Transfer Scheme.............................................................................................. 132
UART Status and Control Registers.................................................................................... 132
Baud Rate Generator .......................................................................................................... 138
Calculating the register and error values ............................................................................ 138
UART Setup and Control..................................................................................................... 139
Managing receiver errors .................................................................................................... 143
UART Module Interrupt Structure........................................................................................ 144
Address detect mode .......................................................................................................... 145
UART Module Power Down and Wake-up .......................................................................... 146
Interrupts ...................................................................................................... 146
Interrupt Registers............................................................................................................... 146
Interrupt Operation .............................................................................................................. 154
External Interrupt................................................................................................................. 155
Multi-function Interrupt ........................................................................................................ 156
A/D Converter Interrupt ....................................................................................................... 156
Time Base Interrupts........................................................................................................... 156
Serial Interface Module Interrupts ....................................................................................... 157
EEPROM Interrupt .............................................................................................................. 158
TM Interrupts....................................................................................................................... 158
LVD Interrupt ...................................................................................................................... 158
UART Interrupt .................................................................................................................... 158
Interrupt Wake-up Function................................................................................................. 159
Programming Considerations.............................................................................................. 159
Software LCD Driver.................................................................................... 160
LCD operation ..................................................................................................................... 160
LCD Control Registers ........................................................................................................ 160
LCD waveform .................................................................................................................... 165
Low Voltage Detector – LVD ....................................................................... 167
LVD Register ....................................................................................................................... 167
LVD Operation..................................................................................................................... 168
Conguration Option................................................................................... 169
Application Circuit....................................................................................... 169
Instruction Set.............................................................................................. 170
Introduction ......................................................................................................................... 170
Instruction Timing ................................................................................................................ 170
Moving and Transferring Data............................................................................................. 170
Arithmetic Operations.......................................................................................................... 170
Logical and Rotate Operation ............................................................................................. 171
Branches and Control Transfer ........................................................................................... 171
Bit Operations ..................................................................................................................... 171
Table Read Operations ....................................................................................................... 171
Other Operations................................................................................................................. 171

Rev. 1.21 6 November 09, 2017 Rev. 1.21 7 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Instruction Set Summary ............................................................................ 172
Table Conventions............................................................................................................... 172
Extended Instruction Set ..................................................................................................... 174
Instruction Denition................................................................................... 176
Extended Instruction Denition ........................................................................................... 185
Package Information ................................................................................... 192
28-pin SOP (300mil) Outline Dimensions ........................................................................... 193
28-pin SSOP (150mil) Outline Dimensions ......................................................................... 194

Rev. 1.21 6 November 09, 2017 Rev. 1.21 7 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Features
CPU Features
• OperatingVoltage

♦fSYS=8MHz:2.2V~5.5V

♦fSYS=10MHz:2.7V~5.5V

♦fSYS=12MHz:3.3V~5.5V

♦fSYS=16MHz:4.5V~5.5V
• Upto0.25μsinstructioncyclewith16MHzsystemclockatVDD=5V
• Powerdownandwake-upfunctionstoreducepowerconsumption
• FourOscillators:
• ExternalHighFrequencyCrystal–HXT
• External32.768kHzCrystal--LXT
• InternalHighFrequencyRC--HIRC
• Internal32kHz--LIRC
• Fullyintergratedinternal8MHzoscillatorrequiresnoexternalcomponents
• Multi-modeoperation:NORMAL,SLOW,IDLEandSLEEP
• Allinstructionsexecutedinonetothreeinstructioncycles
• Tablereadinstructions
• 115powerfulinstructions
• 8-levelsubroutinenesting
• Bitmanipulationinstruction
Peripheral Features
• FlashProgramMemory:8K×16(HT66F489)/4K×16(HT66F488)
• RAMDataMemory:384×8
• TrueEEPROMMemory:64×8
• WatchdogTimerfunction
• 30bidirectionalI/Olines
• LEDdriver
• 1/3BiasSoftwareLCD
• SerialInterfaceModule–SIMforSPIorI2C
• UARTFunction
• Sixpin-sharedexternalinterrupts
• MultipleTimerModulefortimemeasure,inputcapture,comparematchoutput,PWMoutput
functionorsinglepulseoutputfunction
• DualTime-Basefunctionsforgenerationofxedtimeinterruptsignals
• 8-channel12-bitresolutionA/Dconverter
• Lowvoltageresetfunction
• Lowvoltagedetectorfunction
• Package:28-pinSOP/SSOP

Rev. 1.21 8 November 09, 2017 Rev. 1.21 9 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
General Description
Thedevicesare8-bithighperformanceRISCarchitecturemicrocontroller,designedespeciallyfor
applicationsthatinterfacedirectlytoanalogsignals,suchasthosefromsensor.Offeringusersthe
convenienceofFlashMemorymulti-programmingfeatures,thisdevicealsoincludesawiderange
offunctionsandfeatures.OthermemoryincludesanareaofRAMDataMemoryaswellasanarea
oftrueEEPROMmemoryforstorageofnon-volatiledatasuchasserialnumbers,calibrationdata
etc.
Analogfeaturesincludeamulti-channel12-bitA/Dconverter.MultipleandextremelyexibleTimer
Modulesprovidetiming,pulsegenerationandPWMgenerationfunctions.Communicationwith
theoutsideworldcateredforbyincludingfullyintegratedSPI,I2CandUARTinterfacefunctions,
threepopularinterfaceswhichprovidedesignerswithameansofeasycommunicationwithexternal
peripheralhardware.ProtectivefeaturessuchasaninternalWatchdogTimer,LowVoltageReset
andLowVoltageDetectorcoupledwithexcellentnoiseimmunityandESDprotectionensurethat
reliableoperationismaintainedinhostileelectricalenvironments.
AfullchoiceofHXT,LXT,HIRCandLIRCoscillatorfunctionsareprovidedincludingafully
integratedsystemoscillatorwhichrequiresnoexternalcomponentsforitsimplementation.The
abilitytooperateandswitchdynamicallybetweenarangeofoperatingmodesusingdifferent
clocksourcesgivesuserstheabilitytooptimisemicrocontrolleroperationandminimizepower
consumption.
TheinclusionofflexibleI/Oprogrammingfeatures,Time-Basefunctionsalongwithmany
otherfeaturesensurethatthedevicewillfindexcellentuseinapplicationssuchassensorsignal
processing,chargers,motordriving,industrialcontrol,consumerproduct,subsystemcontroller,etc.
Selection Table
Mostfeaturesarecommontoalldevices,themainfeaturedistinguishingthemareMemorycapacity
andwhetherEEPROMornot.Thefollowingtablesummarisesthemainfeaturesofeachdevice.
Part No. Program
Memory
Data
Memory
Data
EEPROM I/O R-type LCD (1/3 Bias)
High Current
LED Output
HT66F488 4K×16
384×8 64×8 26 6(SCOM/SSEG)
+20SSEG 26
HT66F489 8K×16
Part No. Timer
Module RTC A/D Interface Stack Package
HT66F488 10-bit CTM×1
16-bit STM×1
10-bit PTM×2
√12-bit×8 SPI/I2C, UART 8 28SOP/SSOP
HT66F489

Rev. 1.21 8 November 09, 2017 Rev. 1.21 9 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Block Diagram
8-bit
RISC
MCU
Core
Flash
Program
Memory
EEPROM
Data
Memory
Flash/EEPROM
Programming Circuitry
(ICP)/OCDS
Time
Bases
I/O
Low
Voltage
Reset
Watchdog
Timer
Low
Voltage
Detect
Interrupt
Controller
Reset
Circuit
HXT/ LXT
Oscillators
12-bit A/D
Converter
RAM Data
Memory
Internal RC
Oscillators
UART
SIM
Software
LCD
CTM STM PTMs
Pin Assignment
PC4/AN4/SSEG22 PC5/AN5/INT3/SSEG21
PC3/AN3/SSEG23
PC0/AN2/SSEG26
PB7/STP/RX/AN1/SSEG27
PB6/STCK/TX/AN0/SSEG28
PB5/SSEG29
VSS/AVSS
PD0/ICPDA/SCOM0/SSEG0
PA6/PTCK1/SCS/SSEG12
PA5/PTP1/SCK/SCL/SSEG11
PA4/SDI/SDA/SSEG10
PA3/SDO/SSEG9
PA2/OCDSCK/SSEG8
PA1/SSEG7
PC6/AN6/VREF/INT2/SSEG20
PB1/PTCK0/INT1/AN7/SSEG17
PB2/CTP/INT0/SSEG16
PB3/OSC2/XT2/SSEG15
PB4/OSC1/XT1/ICPCK/SSEG14
VDD/AVDD
PA7/CTCK/SSEG13
PD1/SCOM1/SSEG1
PD2/SCOM2/SSEG2
PD3/SCOM3/SSEG3
PD4/SCOM4/SSEG4
PD5/SCOM5/SSEG5
PA0/OCDSDA/SSEG6
HT66F488/489
HT66V488/489
28 SOP-A/SSOP-A
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Note:1.Ifthepin-sharedpinfunctionshavemultipleoutputssimultaneously,thefunctionusedisdeterminedby
thecorrespondingsoftwarecontrolbitorcongurationoption.
2.AVDD&VDDmeanstheVDDandAVDDarethedoublebonding.VSS&AVSSmeanstheVSSand
AVSSarethedoublebonding.
3.HT66V488/489istheEVchip,andtheOCDSDA,OCDSCKpinsareforEVchiponly.

Rev. 1.21 10 November 09, 2017 Rev. 1.21 11 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Pin Descriptions
Pin Name Function OPT I/T O/T Description
PA0/OCDSDA/
SSEG6
PA0 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
OCDSDA — ST CMOS OCDS Data/Address pin, for EV chip only
SSEG6 SLCDC2 — CMOS Software LCD SEG output
PA1/SSEG7 PA1 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
SSEG7 SLCDC2 — CMOS Software LCD SEG output
PA2/OCDSCK/
SSEG8
PA2 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
OCDSCK — ST — OCDS Clock pin, for EV chip only.
SSEG8 SLCDC2 — CMOS Software LCD SEG output
PA3/SDO/SSEG9
PA3 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
SDO — — CMOS SPI Data output
SSEG9 SLCDC2 — CMOS Software LCD SEG output
PA4/SDI/SDA/
SSEG10
PA4 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
SDI — ST — SPI Data input
SDA — ST NMOS I2C Data
SSEG10 SLCDC2 — CMOS Software LCD SEG output
PA5/PTP1/SCK/
SCL/SSEG11
PA5 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
PTP1 TMPC0 ST CMOS PTM1 input/output
SCK — ST CMOS SPI Serial Clock
SCL — ST NMOS I2C Clock
SSEG11 SLCDC2 — CMOS Software LCD SEG output
PA6/PTCK1/SCS/
SSEG12
PA6 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
PTCK1 — ST — PTM1 input
SCS — ST CMOS SPI slaver selection
SSEG12 SLCDC2 — CMOS Software LCD SEG output
PA7/CTCK/
SSEG13
PA7 PAWU
PAPU ST CMOS General purpose I/O. Register enable pull-up and wake-up
CTCK — ST — CTM input
SSEG13 SLCDC2 — CMOS Software LCD SEG output
PB0/PTP0/INT4/
SSEG18
PB0 PBPU ST CMOS General purpose I/O. Register enable pull-up.
PTP0 TMPC0 ST CMOS PTM0 output
INT4 — ST — External interrupt input
SSEG18 SLCDC3 — CMOS Software LCD SEG output
PB1/PTCK0/
INT1/AN7/
SSEG17
PB1 PBPU ST CMOS General purpose I/O. Register enable pull-up.
PTCK0 — ST — PTM0 input
INT1 — ST — External interrupt input
AN7 ACERL AN — ADC input
SSEG17 SLCDC3 — CMOS Software LCD SEG output
PB2/CTP/INT0/
SSEG16
PB2 PBPU ST CMOS General purpose I/O. Register enable pull-up.
CTP TMPC0 ST CMOS CTM output
INT0 — ST — External interrupt input
SSEG16 SLCDC3 — CMOS Software LCD SEG output

Rev. 1.21 10 November 09, 2017 Rev. 1.21 11 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PB3/OSC2/XT2/
SSEG15
PB3 PBPU ST CMOS General purpose I/O. Register enable pull-up.
OSC2 CO — HXT HXT pin
XT2 CO — LXT LXT pin
SSEG15 SLCDC3 — CMOS Software LCD SEG output
PB4/OSC1/
XT1/ICPCK/
SSEG14
PB4 PBPU ST CMOS General purpose I/O. Register enable pull-up.
OSC1 CO HXT — HXT pin
XT1 CO LXT — LXT pin
ICPCK — ST — ICP Clock pin
SSEG14 SLCDC3 — CMOS Software LCD SEG output
PB5/SSEG29 PB5 PBPU ST CMOS General purpose I/O. Register enable pull-up.
SSEG29 SLCDC4 — CMOS Software LCD SEG output
PB6/STCK/TX/
AN0/SSEG28
PB6 PBPU ST CMOS General purpose I/O. Register enable pull-up.
STCK — ST — STM input
TX — — CMOS UART data transmission output
AN0 ACERL AN — ADC input
SSEG28 SLCDC4 — CMOS Software LCD SEG output
PB7/STP/RX/
AN1/SSEG27
PB7 PBPU ST CMOS General purpose I/O. Register enable pull-up.
STP TMPC0 ST CMOS STM input/output
RX — ST — UART data received input
AN1 ACERL AN — ADC input
SSEG27 SLCDC4 — CMOS Software LCD SEG output
PC0/AN2/
SSEG26
PC0 PCPU ST CMOS General purpose I/O. Register enable pull-up.
AN2 ACERL AN — ADC input
SSEG26 SLCDC4 — CMOS Software LCD SEG output
PC1/SSEG25 PC1 PCPU ST CMOS General purpose I/O. Register enable pull-up.
SSEG25 SLCDC4 — CMOS Software LCD SEG output
PC2/SSEG24 PC2 PCPU ST CMOS General purpose I/O. Register enable pull-up.
SSEG24 SLCDC4 — CMOS Software LCD SEG output
PC3/AN3/
SSEG23
PC3 PCPU ST CMOS General purpose I/O. Register enable pull-up.
AN3 ACERL AN — ADC input
SSEG23 SLCDC4 — CMOS Software LCD SEG output
PC4/AN4/
SSEG22
PC4 PCPU ST CMOS General purpose I/O. Register enable pull-up.
AN4 ACERL AN — ADC input
SSEG22 SLCDC4 — CMOS Software LCD SEG output
PC5/AN5/INT3/
SSEG21
PC5 PCPU ST CMOS General purpose I/O. Register enable pull-up.
AN5 ACERL AN — ADC input
INT3 — ST — External interrupt input
SSEG21 SLCDC3 — CMOS Software LCD SEG output
PC6/AN6/VREF/
INT2/SSEG20
PC6 PCPU ST CMOS General purpose I/O. Register enable pull-up.
AN6 ACERL AN — ADC input
VREF ADCR1 AN — ADC Reference voltage input
INT2 — ST — External interrupt input
SSEG20 SLCDC3 — CMOS Software LCD SEG output
PC7/INT5/
SSEG19
PC7 PCPU ST CMOS General purpose I/O. Register enable pull-up.
INT5 — ST — External interrupt input
SSEG19 SLCDC3 — CMOS Software LCD SEG output

Rev. 1.21 12 November 09, 2017 Rev. 1.21 13 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Pin Name Function OPT I/T O/T Description
PD0/ICPDA/
SCOM0/SSEG0
PD0 PDPU ST CMOS General purpose I/O. Register enable pull-up.
ICPDA — ST CMOS ICP Data/Address pin
SCOM0 SLCDC0
SLCDC1 — CMOS Software LCD COM output
SSEG0 SLCDC0
SLCDC1 — CMOS Software LCD SEG output
PD1/SCOM1/
SSEG1
PD1 PDPU ST CMOS General purpose I/O. Register enable pull-up.
SCOM1 SLCDC0
SLCDC1 — CMOS Software LCD COM output
SSEG1 SLCDC0
SLCDC1 — CMOS Software LCD SEG output
PD2/SCOM2/
SSEG2
PD2 PDPU ST CMOS General purpose I/O. Register enable pull-up.
SCOM2 SLCDC0
SLCDC1 — CMOS Software LCD COM output
SSEG2 SLCDC0
SLCDC1 — CMOS Software LCD SEG output
PD3/SCOM3/
SSEG3
PD3 PDPU ST CMOS General purpose I/O. Register enable pull-up.
SCOM3 SLCDC0
SLCDC1 — CMOS Software LCD COM output
SSEG3 SLCDC0
SLCDC1 — CMOS Software LCD SEG output
PD4/SCOM4/
SSEG4
PD4 PDPU ST CMOS General purpose I/O. Register enable pull-up.
SCOM4 SLCDC1 — CMOS Software LCD COM output
SSEG4 SLCDC1 — CMOS Software LCD SEG output
PD5/SCOM5/
SSEG5
PD5 PDPU ST CMOS General purpose I/O. Register enable pull-up.
SCOM5 SLCDC1 — CMOS Software LCD COM output
SSEG5 SLCDC1 — CMOS Software LCD SEG output
VDD/AVDD VDD — PWR — Positive Power Supply
AVDD — PWR — Analog Positive Power Supply
VSS/AVSS VSS — PWR — Negative Power Supply. Ground
AVSS — PWR — Analog Negative Power Supply
Note:I/T:Inputtype;  O/T:Outputtype
OP:Optionalbycongurationoption(CO)orregisteroption
PWR:Power;  CO:Congurationoption; ST:SchmittTriggerinput
CMOS:CMOSoutput; AN:Analoginputpin
HXT:Highfrequencycrystaloscillator
LXT:Lowfrequencycrystaloscillator
*:VDDisthedevicepowersupplywhileAVDDistheADCpowersupply.TheAVDDpinisbonded
togetherinternallywithVDD.
**:VSSisthedevicegroundpinwhileAVSSistheADCgroundpin.TheAVSSpinisbondedtogether
internallywithVSS.
Note:1.ThisPinDescriptionSummarytabledescribesallresourceswhichmaynotbeconnectedtoexternalpins.
2.For28-SKDIP/SOPpackagePB0,PC1,PC2andPC7arenotbondedtoexternalpinsandshouldbe
properlyconguredtoavoidaoatingconditionwhichwillresultinadditionalcurrentleakage.

Rev. 1.21 12 November 09, 2017 Rev. 1.21 13 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Absolute Maximum Ratings
SupplyVoltage.................................................................................................VSS−0.3VtoVSS+6.0V
InputVoltage................................................................................................... VSS−0.3VtoVDD+0.3V
StorageTemperature.....................................................................................................-50˚Cto125˚C
OperatingTemperature...................................................................................................-40˚Cto85˚C
IOHTotal................................................................................................................................... -150mA
IOLTotal.................................................................................................................................... 100mA
TotalPowerDissipation.......................................................................................................... 500mW
Note:Thesearestressratingsonly.Stressesexceedingtherangespecifiedunder“Absolute
MaximumRatings”maycausesubstantialdamagetothesedevices.Functionaloperationof
thesedevicesatotherconditionsbeyondthoselistedinthespecicationisnotimpliedand
prolongedexposuretoextremeconditionsmayaffectdevicesreliability.
D.C. Characteristics
Ta=25°C
Symbol Parameter Test Conditons Min. Typ. Max. Unit
VDD Conditons
VDD
Operating Voltage
(HXT) —
fSYS=8MHz 2.2 — 5.5 V
fSYS=10MHz 2.7 — 5.5 V
fSYS=12MHz 3.3 — 5.5 V
fSYS=16MHz 4.5 — 5.5 V
Operating Voltage
(HIRC) — fSYS=8MHz 2.2 — 5.5 V
IDD
Operating Current, Normal Mode,
fSYS =fH(HXT), fS=fLIRC
3V No load, fSYS= fH=8MHz
ADC off, WDT enable
— 1.0 1.5 mA
5V — 2.5 4.0 mA
3V No load, fSYS= fH=10MHz
ADC off, WDT enable
— 1.2 2.0 mA
5V — 2.8 4.5 mA
5V No load, fSYS= fH=12MHz
ADC off, WDT enable — 3.5 5.5 mA
5V No load, fSYS= fH=16MHz
ADC off, WDT enable — 4.5 7.0 mA
Operating Current, Normal Mode,
fSYS=fH(HIRC), fS=fLXT or fLIRC
3V No load, fSYS= fH=8MHz
ADC off, WDT enable
— 1.2 2.0 mA
5V — 2.8 4.5 mA
Operating Current, Slow Mode 1
fH=12MHz (HXT), fS=fLIRC
5V No load, fSYS= fH/2,
ADC off, WDT enable — 2.1 3.3 mA
5V No load, fSYS= fH/4,
ADC off, WDT enable — 1.6 2.5 mA
5V No load, fSYS= fH/8,
ADC off, WDT enable — 1.2 2.5 mA
5V No load, fSYS= fH/16
ADC off, WDT enable — 1.1 2.0 mA
5V No load, fSYS= fH/32,
ADC off, WDT enable — 1.0 2.0 mA
5V No load, fSYS= fH/64,
ADC off, WDT enable — 1.0 2.0 mA

Rev. 1.21 14 November 09, 2017 Rev. 1.21 15 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Symbol Parameter Test Conditons Min. Typ. Max. Unit
VDD Conditons
IDD
Operating Current, Slow Mode 0
fSYS=fS=fLXT
3V No load, ADC off,
WDT enable, LXTLP=0
— 15 25 μA
5V — 30 50 μA
3V No load, ADC off,
WDT enable, LXTLP=1
— 10 20 μA
5V — 25 45 μA
Operating Current, Slow Mode 0
fSYS=fS=fLIRC
3V No load, ADC off,
WDT enable
— 10 20 μA
5V — 20 40 μA
ISTB
Standby Current, IDLE Mode
(fSYS=off, fS=fSUB= fLIRC)
3V No load, system HALT,
IDLEN=1, WDT enable
— 1.3 3.0 μA
5V — 2.2 5.0 μA
Standby Current, SLEEP Mode
(fSYS=off, fS=fSUB= fLIRC)
3V No load, system HALT,
IDLEN=0, WDT enable
— 1.3 3.0 μA
5V — 2.2 5.0 μA
Standby Current, SLEEP Mode
fSYS=12MHz (HXT),
fSYS =off, fS=fSUB= fLIRC
—No load, system HALT,
ADC off, WDT enable — 65 95 μA
VIL Input Low Voltage for I/O Ports 5V — 0 — 1.5 V
— — 0 — 0.2VDD V
VIH Input High Voltage for I/O Ports 5V — 3.5 — 5 V
— — 0.8VDD — VDD V
IOL
I/O Port Sink Current
Large Sink I/O (PD)
5V VOL=1.5V 120 200 — mA
3V VOH=0.1VDD 15 30 — mA
5V VOH=0.1VDD 30 60 — mA
I/O Port Sink Current
(PA, PB, PC)
3V VOL=0.1VDD 15 30 — mA
5V VOL=0.1VDD 30 60 — mA
IOH
I/O Port Source Current
(PA, PB, PC, PD)
3V
VOH=0.9VDD, select full source
current option -3.0 -6.0 — mA
VOH=0.9VDD, select 10/22 full
source current option -1.5 -3.0 — mA
VOH=0.9VDD, select 7/22 full
source current option -1.0 -2.0 — mA
VOH=0.9VDD, select 4/22 full
source current option -0.8 -1.5 — mA
5V
VOH=0.9VDD, select full source
current option -9.0 -18.0 — mA
VOH=0.9VDD, select 10/22 full
source current option -4.0 -8.0 — mA
VOH=0.9VDD, select 7/22 full
source current option -3.0 -6.0 — mA
VOH=0.9VDD, select 4/22 full
source current option -2.0 -3.6 — mA
RPH Pull-high Resistance 3V —20 60 100 kΩ
5V 10 30 50 kΩ
IBIAS Bias current for LCD 5V
ISEL[1:0]=00 4.2 8.3 13 μA
ISEL[1:0]=01 8.3 16.7 25 μA
ISEL[1:0]=10 25 50 75 μA
ISEL[1:0]=11 50 100 150 μA
VSEG_H 1/3 bias LCD SEG output (SEG_H) 2.2~5.5V No load 0.645 0.67 0.695 VDD
VSEG_L 1/3 bias LCD SEG output (SEG_L) 2.2~5.5V No load 0.305 0.33 0.355 VDD

Rev. 1.21 14 November 09, 2017 Rev. 1.21 15 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
A.C. Characteristics
Ta=25°C
Symbol Parameter Test Conditons Min. Typ. Max. Unit
VDD Conditions
fSYS
System clock (HXT)
2.2V~5.5V
—
0.4 — 8 MHz
2.7V~5.5V 0.4 — 10 MHz
3.3V~5.5V 0.4 — 12 MHz
4.5V~5.5V 0.4 — 16 MHz
System clock (HIRC) 5V Ta=0°C~70°C -2% 8 2% MHz
System clock (LXT) — — — 32768 — Hz
System clock (LIRC) 5V Ta=25°C -10% 32 +10% kHz
2.2V~5.5V Ta=-40°C~85°C -50% 32 +60% kHz
tTIMER xTCKn Input Pin Minimun Pulse width — — 0.06 0.15 0.3 μs
tSST
System Start-up Timer Period
(wake up from HALT) —
fSYS=HXT 128 — — tSYS
fSYS=LXT 128 — — tSYS
fSYS=HIRC 16 — — tSYS
fSYS=LIRC 2 — — tSYS
System Start-up Timer Period
(wake up from HALT, fSYS on at HALT) — — 2 — — tSYS
tRSTD
System Reset Delay Time
(POR, LVR, LVR S/W, WDT S/W reset) — — 25 50 100 ms
System Reset Delay Time
(WDT reset) — — 8.3 16.7 33.3 ms
tINT Interrupt Minimum Pulse Width — — 1 3.3 5 μs
tLVR Low Voltage width to reset — — 120 240 480 μs
tSRESET Software Reset width to reset — — 45 90 120 μs
tEERD EEPROM Read Time — — 1 2 4 tSYS
tEEWR EEPROM Write Time — — 1 2 4 ms
Note:tSYS=1/fSYS

Rev. 1.21 16 November 09, 2017 Rev. 1.21 17 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
LVR & LVD Characteristics
Ta=25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VLVR Low Voltage Reset Voltage —
LVR Enable, 2.10V option
-5%
2.10
+5%
V
LVR Enable, 2.55V option 2.55 V
LVR Enable, 3.15V option 3.15 V
LVR Enable, 3.80V option 3.80 V
VLVD Low Voltage Detector Voltage —
LVDEN = 1, VLVD = 2.0V
-5%
2.0
+5%
V
LVDEN = 1, VLVD = 2.2V 2.2 V
LVDEN = 1, VLVD = 2.4V 2.4 V
LVDEN = 1, VLVD = 2.7V 2.7 V
LVDEN = 1, VLVD = 3.0V 3.0 V
LVDEN = 1, VLVD = 3.3V 3.3 V
LVDEN = 1, VLVD = 3.6V 3.6 V
LVDEN = 1, VLVD = 4.0V 4.0 V
ILVR
Additional Power
Consumption if LVR is Used
3V LVR disable→LVR enable — 30 45 μA
5V — 60 90 μA
ILVD
Additional Power
Consumption if LVD is Used
3V LVD disable→LVD enable
(LVR disable)
─40 60 μA
5V ─75 115 μA
3V LVD disable→LVD enable
(LVR enable)
─30 45 μA
5V ─60 90 μA
tLVR Low Voltage Width to Reset — — 120 240 480 μs
tLVD Low Voltage Width to Interrupt — — 65 125 250 μs
tLVDS LVDO stable time
—LVD disable→LVD enable
(LVR enable) — — 15 μs
—LVD disable→LVD enable
(LVR disable) — — 200 μs

Rev. 1.21 16 November 09, 2017 Rev. 1.21 17 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
A/D Converter Electrical Characteristics
Ta=25°C
Symbol Parameter Test Conditons Min. Typ. Max. Unit
VDD Conditons
AVDD A/D Converter Operating Voltage — — 2.2 — 5.5 V
VAD ADC Input Voltage — — 0 — AVDD/VREF V
VREF ADC Reference Voltage — — 2 — AVDD+0.1 V
tADC A/D Conversion Time —12-bit ADC — 16 — tAD
tAD A/D Clock Period 2.2V~2.7V — 8 — 10 μs
2.7V~5.5V — 0.5 — 10 μs
tON2ST A/D Converter On-to-Start Time — — 2 — — μs
DNL1 A/D Differential Non-linearity
2.2V~2.7V VREF=VDD, tAD=8μs
Ta=25°C — ±15 — LSB
2.7V~5.5V VREF=VDD, tAD=0.5μs
Ta=25°C -3 — +3 LSB
DNL2 A/D Differential Non-linearity 3V/5V VREF=VDD, tAD=0.5μs
Ta=-40°C ~ 85°C -4 — +4 LSB
INL1 A/D Integral Non-linearity
2.2V~2.7V VREF=VDD, tAD=8μs
Ta=25°C — ±16 — LSB
2.7V~5.5V VREF=VDD, tAD=0.5μs
Ta=25°C -4 — +4 LSB
INL2 A/D Integral Non-linearity 3V/5V VREF=VDD, tAD=0.5μs
Ta=-40°C ~ 85°C -6 — +6 LSB
IADC
Additonal Power consumption if A/D
Converter is used
3V No load, tAD=0.5μs — 1.0 2.0 mA
5V — 1.5 3.0 mA
tBGS VBG turn on stable time — — 10 — — ms
VBG Bandgap reference with buffer voltage — — -5% 1.25 +5% V
IBG
Additional power consumption if
reference with buffer is used — — — 200 300 μA
Power on Reset Electrical Characteristics
Ta = 25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VPOR VDD Start Voltage to Ensure Power-on Reset ─ ─ ─ ─ 100 mV
RRVDD VDD Rising Rate to Ensure Power-on Reset ─ ─ 0.035 ─ ─ V/ms
tPOR
Minimum time for VDD Stays at VPOR to
ensure Power-on Reset ─ ─ 10 ─ ─ ms










Rev. 1.21 18 November 09, 2017 Rev. 1.21 19 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
System Architecture
Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed
totheirinternalsystemarchitecture.Thedevicetakesadvantageoftheusualfeaturesfoundwithin
RISCmicrocontrollersprovidingincreasedspeedofoperationandPeriodicperformance.The
pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecutionare
overlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranchor
callinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,whichcarries
outarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions,etc.
TheinternaldatapathissimpliedbymovingdatathroughtheAccumulatorandtheALU.Certain
internalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectlyaddressed.
Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitecturalfeaturesensure
thataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/OandA/Dcontrol
systemwithmaximumreliabilityandflexibility.Thismakesthedevicesuitableforlow-cost,
high-volumeproductionforcontrollerapplications.
Clocking and Pipelining
Themainsystemclock,derivedfromeitheraHXT,LXT,HIRCorLIRCoscillatorissubdivided
intofourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincremented
atthebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.Theremaining
T2~T4clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clock
cycleformsoneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplace
inconsecutiveinstructioncycles,thepipeliningstructureofthemicrocontrollerensuresthat
instructionsareeffectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructions
wherethecontentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhich
casetheinstructionwilltakeonemoreinstructioncycletoexecute.
  
      
      
  
  


    

   



  
System Clock and Pipelining

Rev. 1.21 18 November 09, 2017 Rev. 1.21 19 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twomachinecyclesare
requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone
cycletorstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe
branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming
sensitiveapplications.
   
  
 





 
  
 
 



 
  
   
  
Instruction Fetching
Program Counter
Duringprogramexecution,theProgramCounterisusedtokeeptrackoftheaddressofthe
nextinstructiontobeexecuted.Itisautomaticallyincrementedbyoneeachtimeaninstruction
isexecutedexceptforinstructions,suchas“JMP”or“CALL”thatdemandajumptoanon-
consecutiveProgramMemoryaddress.Onlythelower8bits,knownastheProgramCounterLow
Register,aredirectlyaddressablebytheapplicationprogram.
Whenexecutinginstructionsrequiringjumpstonon-consecutiveaddressessuchasajump
instruction,asubroutinecall,interruptorreset,etc.,themicrocontrollermanagesprogramcontrol
byloadingtherequiredaddressintotheProgramCounter.Forconditionalskipinstructions,once
theconditionhasbeenmet,thenextinstruction,whichhasalreadybeenfetchedduringthepresent
instructionexecution,isdiscardedandadummycycletakesitsplacewhilethecorrectinstructionis
obtained.
Device Program Counter
Program Counter High byte PCL Register
HT66F488 PC11~PC8 PCL7~PCL0
HT66F489 PC12~PC8 PCL7~PCL0
ThelowerbyteoftheProgramCounter,knownastheProgramCounterLowregisterorPCL,is
availableforprogramcontrolandisareadableandwriteableregister.Bytransferringdatadirectly
intothisregister,ashortprogramjumpcanbeexecuteddirectly,however,asonlythislowbyte
isavailableformanipulation,thejumpsarelimitedtothepresentpageofmemory,thatis256
locations.Whensuchprogramjumpsareexecuteditshouldalsobenotedthatadummycycle
willbeinserted.ManipulatingthePCLregistermaycauseprogrambranching,soanextracycleis
neededtopre-fetch.

Rev. 1.21 20 November 09, 2017 Rev. 1.21 21 November 09, 2017
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
Stack
ThisisaspecialpartofthememorywhichisusedtosavethecontentsoftheProgramCounter
only.Thestackisneitherpartofthedatanorpartoftheprogramspace,andisneitherreadablenor
writeable.TheactivatedlevelisindexedbytheStackPointer,andisneitherreadablenorwriteable.
Atasubroutinecallorinterruptacknowledgesignal,thecontentsoftheProgramCounterarepushed
ontothestack.Attheendofasubroutineoraninterruptroutine,signaledbyareturninstruction,
RETorRETI,theProgramCounterisrestoredtoitspreviousvaluefromthestack.Afteradevice
reset,theStackPointerwillpointtothetopofthestack.
Ifthestackisfullandanenabledinterrupttakesplace,theinterruptrequestagwillberecorded
buttheacknowledgesignalwillbeinhibited.WhentheStackPointerisdecremented,byRETor
RETI,theinterruptwillbeserviced.Thisfeaturepreventsstackoverowallowingtheprogrammer
tousethestructuremoreeasily.However,whenthestackisfull,aCALLsubroutineinstructioncan
stillbeexecutedwhichwillresultinastackoverow.Precautionsshouldbetakentoavoidsuch
caseswhichmightcauseunpredictableprogrambranching.Ifthestackisoverow,therstProgram
Countersaveinthestackwillbelost.
Progra m Counte r
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 8
Progra m
Memory
Top of S ta ck
Stack
Poin te r
Bottom o f Stack
Arithmetic and Logic Unit – ALU
Thearithmetic-logicunitorALUisacriticalareaofthemicrocontrollerthatcarriesoutarithmetic
andlogicoperationsoftheinstructionset.Connectedtothemainmicrocontrollerdatabus,theALU
receivesrelatedinstructioncodesandperformstherequiredarithmeticorlogicaloperationsafter
whichtheresultwillbeplacedinthespeciedregister.AstheseALUcalculationoroperationsmay
resultincarry,borroworotherstatuschanges,thestatusregisterwillbecorrespondinglyupdatedto
reectthesechanges.TheALUsupportsthefollowingfunctions:
• Arithmeticoperations:ADD,ADDM,ADC,ADCM,SUB,SUBM,SBC,SBCM,DAA,LADD,
LADDM,LADC,LADCM,LSUB,LSUBM,LSBC,LSBCM,LDAA
• Logicoperations:AND,OR,XOR,ANDM,ORM,XORM,CPL,CPLA,LAND,LANDM,
LOR,LORM,LXOR,LXORM,LCPL,LCPLA
• Rotation:RRA,RR,RRCA,RRC,RLA,RL,RLCA,RLC,LRR,LRRA,LRRCA,LRRC,
LRLA,LRLCA,LRLC
• IncrementandDecrement:INCA,INC,DECA,DEC,LINCA,LINC,LDECA,LDEC
• Branchdecision:JMP,SZ,SZA,SNZ,SIZ,SDZ,SIZA,SDZA,CALL,RET,RETI,LSNZ,LSZ,
LSZA,LSIZ,LSDZ,LSIZA,LSDZA