Infineon Technologies XMC4500 series User manual

Microcontroller
XMC4000
XMC4500 Family
User Guide
Device Guide
<Revision 1.0>, <2012-03-31>
Event Request Unit Output Gating
Control by Event Pattern Match

Edition <2012-03-31>
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all
warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual
property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the
failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the human body or to support and/or maintain and
sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other
persons may be endangered.

Device Guide XMC4500
Template: IFX_Template_2011-02-24.dot
Revision History
Page or Item
Subjects (major changes since previous revision)
<Revision 1.0>, <2012-03-31>
Trademarks of Infineon Technologies AG
AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™,
CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™,
EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™,
ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™,
PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™,
SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by
AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum.
COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™
of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium.
HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™
of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR
STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc.
MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc.
MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE
OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc.
Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of
Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd.
Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc.
TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company
Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments
Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex
Limited.
Last Trademarks Update 2011-02-24

Device Guide XMC4500
Table of Contents
User Guide 4 <Revision 1.0>, <2012-03-31>
Device Guide
Table of Contents
1Control by Event Pattern Match........................................................................................................6
1.1 The Output Gating Unit in Detail..........................................................................................................7
1.1.1 Pattern Detect status –PDOUT...........................................................................................................7
1.1.2 Pattern Event Edge Detection..............................................................................................................7
1.1.3 Output Gating Selection.......................................................................................................................7
1.1.4 Trigger and Interrupt Output - IOUT.....................................................................................................8

Device Guide XMC4500
List of Figures
User Guide 5 <Revision 1.0>, <2012-03-31>
Device Guide
List of Figures
Figure 1 ERU and the Output Gating Unit (OGUy, y=0-3).................................................................................6
Figure 2 The Output Gating Unit (OGUy) in Detail.............................................................................................7

Device Guide XMC4500
Control by Event Pattern Match
User Guide 6 <Revision 1.0>, <2012-03-31>
Device Guide
1 Control by Event Pattern Match
An Output Gating Unit OGUy (y=0-3) may gate all the event signals of an ERU into one output trigger signal
(TRIGGER) at the IOUTy output pin - controlled by an Event Pattern Detect status (LEVEL) at the PDOUTy pin.
An Event Pattern is a combination of true events, selected by an Input Enable IPENx bit for each event flag FLx.
Figure 1 ERU and the Output Gating Unit (OGUy, y=0-3)

Device Guide XMC4500
Control by Event Pattern Match
User Guide 7 <Revision 1.0>, <2012-03-31>
Device Guide
1.1 The Output Gating Unit in Detail
See Figure 2.
The Output Gating Unit OGUy (y=0-3) comprises 1) a Pattern Detect stage, 2) a Pattern Edge Trigger stage,
3) an Output Gating Select MUX that controls the Gated Trigger stage. Only the enabled inputs of event flags
FLx values will satify the pattern that may gate ERU trigger events as a “TRIGGER” from the IOUTy output pin.
Figure 2 The Output Gating Unit (OGUy) in Detail
1.1.1 Pattern Detect status –PDOUT
The Pattern Detect function is an AND-operation of all event memorizing flags FLx that are regarded by the
Pattern Enable EXOCONy.IPENx bits. The PD Result flag will be affected and the status will be linked to the
Output Gating Select MUX –and (in ERU1 only) delivered as a “LEVEL”event to the PDOUTy output pin too.
1.1.2 Pattern Event Edge Detection
If at least one pattern detection input flag FLx is enabled (by IPENx) and a change of the pattern detection result
from pattern match to pattern miss (or vice-versa) is detected, then a trigger event is generated to indicate a
pattern edge trigger event (if enabled by EXOCONy.GEEN) and linked to the Gated Trigger stage at the IOUTy.
1.1.3 Output Gating Selection
The Output Gating condition to be selected by the EXOCONy.GP case switch (MUX) is one of the following:
case 3: on Pattern Mismatch
case 2: on Pattern Match
case 1: no Output Gating
case 0: no Trigger Pulse (nor any Interrupt Request)
Note:The Pattern Detect status (LEVEL) is distributed in any case via the PDOUTy pin. (ERU1 only.)

Device Guide XMC4500
Control by Event Pattern Match
User Guide 8 <Revision 1.0>, <2012-03-31>
Device Guide
1.1.4 Trigger and Interrupt Output - IOUT
The Trigger and Interrupt pin IOUTy is the derived OR combination of three trigger cathegoriies (which will be
gated according to the Output Gating condition selection that is mapped to the EXOCONy.GP register bitfield):
A Pattern-Match / Pattern-Miss Event Edge Trigger
Any combination of the Event Edge Triggers TR0, TR1, TR2 or TR3, detected by the ERU input channels x
A Peripheral Trigger (ERU1 only though) that is bypassed directly to the OGUy (via the “Kitchen Entrance”)

w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG