Intel E5345 - Xeon 2.33 GHz 8M L2 Cache 1333MHz FSB LGA771 Active Quad-Core... User manual

Order Number: 315338-020
Notice: The Intel® Xeon® Processor 5300 Series may contain design defects or errors known as errata which
may cause the product to deviate from published specifications. Current characterized errata are available on
request.
Intel® Xeon® Processor 5300 Series
Specification Update
December 2010

2Intel® Xeon® Processor 5300 Series
Specification Update, December 2010
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changes to them.
The Intel®Xeon® Processor 5300 Series may contain design defects or errors known as errata which may cause the product to
deviate from published specifications. Current characterized errata are available on request.
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64-bit Intel®Xeon®processors with Intel®64 requires a computer system with a processor, chipset, BIOS, OS, device drivers and
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Contents
Intel® Xeon® Processor 5300 Series 3
Specification Update, December 2010
Contents
Revision History ........................................................................................................4
Preface......................................................................................................................5
Summary Tables of Changes......................................................................................7
Identification Information.......................................................................................17
Errata...................................................................................................................... 19
Specification Changes.............................................................................................. 53
Specification Clarifications ...................................................................................... 54
Documentation Changes..........................................................................................55

4Intel® Xeon® Processor 5300 Series
Specification Update, December 2010
Revision History
Revision Version Description Date
-001 1.0 Initial Release November 2006
-002 1.0 Deleted AJ83 and AJ87. Added AJ86 through AJ89. December 2006
-003 1.0 Updated AJ67. Added AJ90 through AJ93. January 2006
-004 1.0 Updated AJ46. Added AJ94 through AJ100. Deleted AJ82 and
AJ84. March 2007
-005 1.0 Added AJ101 through AJ103. April 2007
-006 1.0 Added AJ104 and Specification Clarification AJ1 April 2007
Out of Cycle
-007 1.0 Updated AJ14, AJ25 and AJ26 May 2007
-008 1.0 Added AJ105 and AJ106 June 2007
-009 1.0 Added AJ107 and AJ108 July 2007
-010 1.0 Added AJ109 through AJ111
Added G-0 Information August 2007
-011 1.0 Added AJ112 through AJ117, Updated AJ108 October 2007
-012 1.0 Added AJ118 November 2007
-013 1.0 Added AJ119. Updated AJ8
Added L5318 Information December 2007
-014 1.0 Added AJ120 January 2008
-015 1.0 Added AJ121
Updated AJ10 and AJ51 February 2008
-016 1.0 Added AJ122 through AJ123 April 2008
-017 1.0 Update errata AJ56 and AJ61 March 2009
-018 1.0 Added errata AJ124 and AJ125
Added Specification Change AJ1 July 2009
-019 1.0 Added errata AJ126 March 2010
-020 1.0 Added errata AJ127, deleted AJ1 December 2010

Intel® Xeon® Processor 5300 Series 5
Specification Update, December 2010
Preface
This document is an update to the specifications contained in the Affected Documents
table below. This document is a compilation of device and documentation errata,
specification clarifications and changes. It is intended for hardware system
manufacturers and software developers of applications, operating systems, or tools.
Information types defined in Nomenclature are consolidated into the specification
update and are no longer published in other documents.
This document may also contain information that was not previously published.
Affected Documents
Note: Contact your Intel representative for the latest revision and document number of this document.
Related Documents
Note: Contact your Intel representative for the latest revision and document number of this document.
Nomenclature
Errata are design defects or errors. These may cause the Intel® Xeon® Processor
5300 Series behavior to deviate from published specifications. Hardware and software
designed to be used with any given stepping must assume that all errata documented
for that stepping are present on all devices.
S-Spec Number is a five-digit code used to identify products. Products are
differentiated by their unique characteristics,e.g., core speed, L2 cache size, package
type, etc. as described in the processor identification information table. Read all notes
associated with each S-Spec number.
Document Title Document Number/
Location
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet 315569
Document Title Document Number/
Location
AP-485, Intel® Processor Identification and the CPUID Instruction 241618
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1:
Basic Architecture
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A:
Instruction Set Reference Manual A-M
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2B:
Instruction Set Reference Manual N-Z
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:
System Programming Guide
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B:
System Programming Guide
Intel® 64 and IA-32 Intel Architecture Optimization Reference Manual
http://www.intel.com/
products/processor/
manuals/index.htm
Intel® 64 and IA-32 Architectures Software Developer’s Manual
Documentation Changes
http://www.intel.com/
design/processor/specupdt/
252046.htm
Intel® Virtualization Technology Specification for the IA-32 Intel® Architecture C97063

6Intel® Xeon® Processor 5300 Series
Specification Update, December 2010
Specification Changes are modifications to the current published specifications.
These changes will be incorporated in any new release of the specification.
Specification Clarifications describe a specification in greater detail or further
highlight a specification’s impact to a complex design situation. These clarifications will
be incorporated in any new release of the specification.
Documentation Changes include typos, errors, or omissions from the current
published specifications. These will be incorporated in any new release of the
specification.
Note: Errata remain in the specification update throughout the product’s lifecycle, or until a
particular stepping is no longer commercially available. Under these circumstances,
errata removed from the specification update are archived and available upon request.
Specification changes, specification clarifications and documentation changes are
removed from the specification update when the appropriate changes are made to the
appropriate product specification or user documentation (datasheets, manuals, and so
forth).

Intel® Xeon® Processor 5300 Series 7
Specification Update, December 2010
Summary Tables of Changes
The following tables indicate the errata, specification changes, specification
clarifications, or documentation changes which apply to the Intel® Xeon® Processor
5300 Series product. Intel may fix some of the errata in a future stepping of the
component, and account for the other outstanding issues through documentation or
specification changes as noted. These tables uses the following notations:
Codes Used in Summary Tables
Stepping
X: Errata exists in the stepping indicated. Specification Change or
Clarification that applies to this stepping.
(No mark)
or (Blank box): This erratum is fixed in listed stepping or specification change
does not apply to listed stepping.
Page
(Page): Page location of item in this document.
Status
Doc: Document change or update will be implemented.
Plan Fix: This erratum may be fixed in a future stepping of the product.
Fixed: This erratum has been previously fixed.
No Fix: There are no plans to fix this erratum.
Row
Each Specification Update item is prefixed with a capital letter to distinguish the
product. The key below details the letters that are used in Intel’s microprocessor
Specification Updates:
A = Intel® Xeon® processor 7000 sequence
C = Intel® Celeron® processor
D = Intel® Xeon® processor 2.80 GHz
E = Intel® Pentium® III processor
F = Intel® Pentium® processor Extreme Edition and Intel® Pentium®D processor
I = Intel® Xeon® processor 5000 series
J = 64-bit Intel® Xeon® processor MP with 1MB L2 cache
K = Mobile Intel® Pentium® III processor

8Intel® Xeon® Processor 5300 Series
Specification Update, December 2010
L = Intel® Celeron® D processor
M = Mobile Intel® Celeron® processor
N = Intel® Pentium® 4 processor
O = Intel® Xeon® processor MP
P = Intel ® Xeon® processor
Q = Mobile Intel® Pentium® 4 processor supporting Intel® Hyper-Threading Technology
on 90-nm process technology
R = Intel® Pentium® 4 processor on 90 nm process
S = 64-bit Intel® Xeon® processor with 800 MHz system bus (1 MB and 2 MB L2 cache
versions)
T = Mobile Intel® Pentium® 4 processor-M
U = 64-bit Intel® Xeon® processor MP with up to 8MB L3 cache
V = Mobile Intel® Celeron® processor on .13 micron process in Micro-FCPGA package
W= Intel® Celeron® M processor
X = Intel® Pentium® M processor on 90nm process with 2-MB L2 cache and Intel®
processor A100 and A110 with 512-KB L2 cache
Y = Intel® Pentium® M processor
Z = Mobile Intel® Pentium® 4 processor with 533 MHz system bus
AA = Intel® Pentium® D processor 900 sequence and Intel® Pentium® processor
Extreme Edition 955, 965
AB = Intel® Pentium® 4 processor 6x1 sequence
AC = Intel® Celeron® processor in 478 pin package
AD = Intel® Celeron® D processor on 65nm_process
AE = Intel® Core™ Duo processor and Intel® Core™ Solo processor on 65nm process
AF = Intel® Xeon® processor LV
AG = Intel® Xeon® processor 5100 series
AH = Intel® Core™2 Duo/Solo Processor for Intel® Centrino® Duo Processor Technology
AI = Intel® Core™2 Extreme processor X6800? and Intel® Core™2 Duo desktop proces-
sor E6000 and E4000? sequence
AJ = Intel® Xeon® processor 5300 series

Intel® Xeon® Processor 5300 Series 9
Specification Update, December 2010
AK = Intel® Core™2 Extreme quad-core processor QX6000? sequence and Intel® Core™2
Quad processor Q6000 sequence
AL = Intel® Xeon® processor 7100 series
AM = Intel® Celeron® processor 400 sequence
AN = Intel® Pentium® dual-core processor
AO = Intel® Xeon® processor 3200 series
AP = Intel® Xeon® processor 3000 series
AQ = Intel® Pentium® dual-core desktop processor E2000 sequence
AR = Intel® Celeron processor 500 series
AS = Intel® Xeon® processor 7200, 7300 series
AT = Intel® Celeron® processor 200 series
AV = Intel® Core™2 Extreme processor QX9000 series and Intel® Core™2 Quad proces-
sor Q9000 series
AX = Intel® Xeon® processor 5400 series
AY = Intel® Xeon® processor 5200 series
AZ = Intel® Core™2 Duo Processor and Intel® Core™2 Extreme Processor on 45-nm Pro-
cess
AAA= Intel® Xeon® processor 3300 series
AAB= Intel® Xeon® E3110 Processor
AAC= Intel® Celeron® dual-core processor E1000 series
AAD= Intel® Core™2 Extreme Processor QX9775
AAE= Intel® Atom™ processor Z5xx series
AAF= Intel® Atom™ processor 200 series

10 Intel® Xeon® Processor 5300 Series
Specification Update, December 2010
Errata (Sheet 1 of 6)
Number Steppings Status ERRATA
B-3 G-0
AJ1 Deleted
AJ2 X X No Fix LOCK# Asserted During a Special Cycle Shutdown Transaction May
Unexpectedly De-assert
AJ3 X X No Fix Address Reported by Machine-Check Architecture (MCA) on Single-
bit L2 ECC Errors May be Incorrect
AJ4 X X No Fix VERW/VERR/LSL/LAR Instructions May Unexpectedly Update the
Last Exception Record (LER) MSR
AJ5 X X No Fix DR3 Address Match on MOVD/MOVQ/MOVNTQ Memory Store
Instruction May Incorrectly Increment Performance Monitoring Count
for Saturating SIMD Instructions Retired (Event CFH)
AJ6 X Plan Fix SYSRET May Incorrectly Clear RF (Resume Flag) in the RFLAGS
Register
AJ7 X X No Fix General Protection Fault (#GP) for Instructions Greater than 15 Bytes
May be Preempted
AJ8 X X No Fix Pending x87 FPU Exceptions (#MF) Following STI May Be Serviced
Before Higher Priority Interrupts
AJ9 X X No Fix The Processor May Report a #TS Instead of a #GP Fault
AJ10 X X No Fix Code Segment Limit/Canonical Faults on RSM May be Serviced
before Higher Priority Interrupts/Exceptions
AJ11 X X No Fix A Write to an APIC Register Sometimes May Appear to Have Not
Occurred
AJ12 X X No Fix Programming the Digital Thermal Sensor (DTS) Threshold May Cause
Unexpected Thermal Interrupts
AJ13 X X No Fix Count Value for Performance-Monitoring Counter PMH_PAGE_WALK
May be Incorrect
AJ14 X X No Fix LER MSRs May be Incorrectly Updated
AJ15 X X No Fix Performance Monitoring Events for Retired Instructions (C0H) May
Not Be Accurate
AJ16 X X No Fix Performance Monitoring Event For Number Of Reference Cycles
When The Processor Is Not Halted (3CH) Does Not Count According
To The Specification
AJ17 X X No Fix Using 2M/4M Pages When A20M# Is Asserted May Result in Incorrect
Address Translations
AJ18 X X No Fix Writing Shared Unaligned Data that Crosses a Cache Line without
Proper Semaphores or Barriers May Expose a Memory Ordering
Issue
AJ19 X X No Fix Code Segment limit violation may occur on 4-Gbyte limit check
AJ20 X Plan Fix FP Inexact-Result Exception Flag May Not Be Set
AJ21 X Plan Fix Global Pages in the Data Translation Look-Aside Buffer (DTLB) May
Not Be Flushed by RSM instruction before Restoring the Architectural
State from SMRAM
AJ22 X Plan Fix Sequential Code Fetch to Non-canonical Address May have Non-
deterministic Results