iWave iW-RainboW-G33M Installation manual

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i.MX8M SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
iW-RainboW-G33M
i.MX8M Quad/QuadLite/Dual
SMARC System On Module
Hardware User Guide
DRAFT VERSION SUBJECT TO CHANGE

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Document Revision History
Document Number
iW-PRFSZ-UM-01-R1.0-REL0.2-Hardware
Revision
Date
Description
0.2
15th March 2019
Initial Draft Version
PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do
not read this document if you are not the intended recipient. Any review, use, distribution or disclosure by others is
strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby
notified that any disclosure, copying distribution or use of any of the information contained within this document is
STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”

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Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any Product
specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this publication. To the
extent permitted by law no liability (including liability to any person by reason of negligence) will be accepted by iWave
Systems, its subsidiaries or employees for any direct or indirect loss or damage caused by omissions from or
inaccuracies in this document.
CPU and other major components used in this product may have several silicon errata associated with it. Under no
circumstances, iWave Systems shall be liable for the silicon errata and associated issues.
Trademarks
All registered trademarks, product names mentioned in this publication are the property of their respective owners
and used for identification purposes only.
Certification
iWave Systems Technologies Pvt. Ltd. is an ISO 9001:2015 Certified Company.
Warranty & RMA
Warranty support for Hardware: 1 Year from iWave or iWave's EMS partner.
For warranty terms, go through the below web link,
http://www.iwavesystems.com/support/warranty.html
For Return Merchandise Authorization (RMA), go through the below web link,
http://www.iwavesystems.com/support/rma.html
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our customers so that
our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Email : [e-mail]
Website : www.iwavesystems.com
Address : iWave Systems Technologies Pvt. Ltd.
# 7/B, 29th Main, BTM Layout 2nd Stage,
Bangalore, Karnataka,
India –560076

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Table of Contents
1. INTRODUCTION ............................................................................................................................................7
1.1 Purpose .............................................................................................................................................................7
1.2 SMARC SOM Overview......................................................................................................................................7
1.3 List of Acronyms................................................................................................................................................7
1.4 Terminlogy Description.....................................................................................................................................9
1.5 References ........................................................................................................................................................9
1.6 Important Note ...............................................................................................................................................10
2. ARCHITECTURE AND DESIGN....................................................................................................................... 11
2.1 i.MX8M SMARC SOM Block Diagram..............................................................................................................11
2.2 i.MX8M SMARC SOM Features .......................................................................................................................12
2.3 i.MX8M CPU....................................................................................................................................................14
2.4 PF4210 PMIC...................................................................................................................................................15
2.5 Memory...........................................................................................................................................................15
2.5.1 LPDDR4 RAM...............................................................................................................................................15
2.5.2 eMMC Flash ................................................................................................................................................15
2.5.3 Micro SD Connector slot (Optional).............................................................................................................15
2.5.4 QSPI Flash (Optional) ..................................................................................................................................16
2.6 Network & Communiation..............................................................................................................................16
2.6.1 Wi-Fi and Bluetooth Interface.....................................................................................................................16
2.7 SMARC PCB Edge Connector...........................................................................................................................17
2.7.1 Gigabit Ethernet..........................................................................................................................................22
2.7.2 SD Interface.................................................................................................................................................24
2.7.3 USB Interface...............................................................................................................................................24
2.7.4 PCIe Interface ..............................................................................................................................................26
2.7.5 MIPI CSI Camera..........................................................................................................................................27
2.7.6 HDMI Interface............................................................................................................................................29
2.7.7 MIPI DSI Display Interface...........................................................................................................................29
2.7.8 Audio Interface............................................................................................................................................30
2.7.9 SPI Interface ................................................................................................................................................31
2.7.10 Data UART...................................................................................................................................................32
2.7.11 SMARC GPIOs ..............................................................................................................................................33
2.7.12 Power control & Management signals........................................................................................................34
2.8 Expansion Connector ......................................................................................................................................36
2.8.1 SAI Interface................................................................................................................................................38
2.8.2 MIPI CSI Camera Interface ..........................................................................................................................39
2.8.3 GPIOs...........................................................................................................................................................39
2.9 Other Features................................................................................................................................................40
2.9.1 Fan Header..................................................................................................................................................40
2.9.2 RTC Controller .............................................................................................................................................40
2.9.3 JTAG Header (Optional)...............................................................................................................................41
2.9.4 Debug UART Header (Optional) ..................................................................................................................42

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2.10 i.MX8M PinMultiplexing on SMARC Edge.......................................................................................................43
2.11 i.MX8M Pin Multiplexing on Expansion Connector ........................................................................................48
3. TECHNICAL SPECIFICATION.......................................................................................................................... 50
3.1 Electrical Characteristics .................................................................................................................................50
3.1.1 Power Input Sequencing..............................................................................................................................50
3.1.2 Power Consumption ....................................................................................................................................51
3.2 Environmental Characteristics........................................................................................................................52
3.2.1 Environmental Specification........................................................................................................................52
3.2.2 Heat Sink .....................................................................................................................................................52
3.2.3 RoHS Compliance ........................................................................................................................................53
3.2.4 Electrostatic Discharge................................................................................................................................53
3.3 Mechanical Characteristics .............................................................................................................................54
3.3.1 i.MX8M SMARC SOM Mechanical Dimensions ...........................................................................................54
4. ORDERING INFORMATION .......................................................................................................................... 55
5. APPENDIX................................................................................................................................................... 57
5.1 i.MX8M SMARC Development Platform .........................................................................................................57

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List of Figures
Figure 1: i.MX8M SMARC SOM Block Diagram...............................................................................................................11
Figure 2: i.MX8MBlock Diagram .....................................................................................................................................14
Figure 3: SMARC Edge Connector...................................................................................................................................17
Figure 4: Fan Header.......................................................................................................................................................40
Figure 5: Power Input Sequencing..................................................................................................................................50
Figure 6: Mechanical dimension Heat Sink.....................................................................................................................53
Figure 7: Mechanical dimension of i.MX8M SMARC SOM Top View..............................................................................54
Figure 8: Mechanical dimension of i.MX8M SMARC SOM- Side View............................................................................54
Figure 9: i.MX8M SMARC Development Platform ..........................................................................................................57
List of Tables
Table 1: Acronyms & Abbreviations..................................................................................................................................7
Table 2: Terminology ........................................................................................................................................................9
Table 3: SMARC Edge Connector Pinouts .......................................................................................................................18
Table 4: Expansion Connector Pinouts ...........................................................................................................................36
Table 5: FAN Header Pin Assignment..............................................................................................................................40
Table 6: JTAG Header Pin Assignment (Optional)...........................................................................................................41
Table 7: Debug UART Header Pin Out (Optional) ...........................................................................................................42
Table 8: i.MX8M CPU IOMUX for SMARC Edge Connector interfaces............................................................................43
Table 9: i.MX8M Pin Multiplexing on Expansion Connector interfaces..........................................................................48
Table 10: Power Input Requirement...............................................................................................................................50
Table 11: Power Sequence Timing..................................................................................................................................51
Table 12: Power Consumption........................................................................................................................................51
Table 13: Environmental Specification ...........................................................................................................................52
Table 14: Orderable Product Part Numbers ...................................................................................................................55

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1. INTRODUCTION
1.1 Purpose
This document is the Hardware User Guide for the SMARC SOM based on the NXP’s i.MX8M Dual/Quad/QuadLite
Application processor. This board is fully supported by iWave Systems Technologies Pvt. Ltd. This Guide provides
detailed information on the overall design and usage of the i.MX8M SMARC SOM from a Hardware Systems
perspective.
1.2 SMARC SOM Overview
The SMARC (“Smart Mobility ARChitecture”) is a versatile small form factor computer Module definition targeting
application that require low power, low costs, and high performance. The Module PCBs have 314 edge fingers that
mate with a low profile 314 pin 0.5mm pitch right angle connector. The Modules are used as building blocks for
portable and stationary embedded systems. The core CPU and support circuits, including DRAM, boot flash, power
sequencing, CPU power supplies, GBE and dual channel LVDS display transmitter are concentrated on the Module. The
Modules are used with application specific Carrier Boards that implement other features such as audio CODECs, touch
controllers, wireless devices, etc. The modular approach allows scalability, fast time to market and upgradability while
still maintaining low costs, low power and small physical size.
NXP’s i.MX8M SoC based SMARC System on Module is rich i.MX8M features along with LPDDR4, eMMC, Dual Ethernet
PHY and comes in compact 82mm x 50mm form factor. The Module PCB has 314 edge fingers that mate with a low
profile 314 pin 0.5mm pitch right angle connector.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
Table 1: Acronyms & Abbreviations
Acronyms
Abbreviations
ARM
Advanced RISC Machine
BT
Bluetooth
CAN
Controller Area Network
CMOS
Complementary Metal-Oxide Semiconductor
CPU
Central Processing Unit
CTS
Clear to Send
CSI
Camera Serial Interface
DSI
Display Serial Interface
eMMC
Enhanced Multi Media Card
GB
Giga Byte
Gbps
Gigabits per sec

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Acronyms
Abbreviations
GPIO
General Purpose Input Output
I2C
Inter-Integrated Circuit
I2S
Inter-Integrated Sound
IC
Integrated Circuit
LPDDR4
Low Power Double Data Rate4
LVDS
Low-voltage differential signalling
MHz
Mega Hertz
MIPI
Mobile Industry Processor Interface
PCB
Printed Circuit Board
RoHS
Restriction of Hazardous Substances
RTC
Real Time Clock
RTS
Request to Send
SAI
Serial Audio Interface
SD
Secure Digital
SMARC
Smart Mobility ARChitecture
SOM
System On Module
TBD
To Be Defined
UART
Universal Asynchronous Receiver/Transmitter
USB
Universal Serial Bus
USB OTG
USB On The Go
Wi-Fi
Wireless Fidelity

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1.4 Terminlogy Description
In this document, wherever Signal Type is mentioned, below terminology is used.
Table 2: Terminology
Terminology
Description
I
Input Signal
O
Output Signal
IO
Bidirectional Input/output Signal
CMOS
Complementary Metal Oxide Semiconductor Signal
LVDS
Low Voltage Differential Signal
GBE
Gigabit Ethernet Media Dependent Interface differential pair signals
USB
Universal Serial Bus differential pair signals
MIPI
Mobile Industry Processor Interface signals
OD
Open Drain Signal
OC
Open Collector Signal
Power
Power Pin
PU
Pull Up
PD
Pull Down
NA
Not Applicable
NC
Not Connected
Note: Signal Type does not include internal pull-ups or pull-downs implemented by the chip vendors and only includes
the pull-ups or pull-downs implemented On-SMARC SOM.
1.5 References
•IMX8MDQLQIEC.pdf
•IMX8MDQLQRM.pdf
•SMARC Specification V2.0

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1.6 Important Note
In this document, wherever i.MX8M CPU signal name is mentioned, it is followed as per below format for easy
understanding.
•If CPU pin doesn’t have multiplexing option or used for dedicated functionality then the signal name is
mentioned as functionality name.
“Functionality Name”
Example: ENET1_RGMII_TXC
In this signal, ENET1_RGMII_TXC pad is used for same functionality.
•If CPU pin has multiplexing option and selected particular function other than default option, then the signal
name is mentioned as
“Selected Function Name (CPU Pad name)”
Example: UART2_CTS_B(UART4_RXD)
In this signal, UART2_CTS_B is the functionality which we are using and UART4_RXD is the CPU Pad name.
•If CPU pin selected as GPIO function, then the signal name is mentioned as
“GPIO_Functionality Description (GPIO Number)”
Example: GPIO_BCONFIG_0(GPIO1_05)
In this signal, BCONFIG_0 is the GPIO functionality which we are using and GPIO1_05 is the GPIO number.
Note: The above naming is not applicable for other signals which are not connected to CPU.

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2. ARCHITECTURE AND DESIGN
This section provides detailed information about i.MX8M SMARC SOM features and Hardware architecture with high
level block diagram.
2.1 i.MX8M SMARC SOM Block Diagram
SMARC Edge
Connector
(314Pin)
iW-RainboW-G27M –i.MX8M Q/QL/D SMARC SOM Block Diagram
i.MX8M
Quad/QuadLite/Dual
SD x 1
Ethernet PHY Gigabit Ethernet
RGMII
LPDDR4 (32bit)
LPDDR4-2GB
(Upgradable) ENET
MicroSD
(Optional)
WiFi/BT
PCIe2
PCIe1
PCIe x 1
USB2.0 HUB
USB2
USB2.0 Host x 4
USB1
USB3.0 OTG x 1
USB2.0 OTG x 1
uSDHC2
HDMI TX HDMI x 1
MIPI DSI MIPI DSI x 1
MIPI CSI0,1 MIPI CSI x 2 (1 x2 lane, 1 x4lane)
DDRC
MMC (8bit)
eMMC –8GB
(Upgradable) uSDHC1
QSPI
QSPI Flash
(Optional) QSPI0A
UART UART1
UART1,UART2 UART x 2
SAI2, SAI5 I2S x 2
Ethernet PHY Gigabit Ethernet
PCIe
PCIe x 1
100Pin
Expansion
Connector
(Optional)
SAI x 1
GPIO GPIO
PWM x 2
JTAG JTAG
Debug Header
(Optional)
JTAG Header
(Optional)
SAI1 QSPI0B QSPI x 1
I2C x 4
I2C1, I2C2,
I2C3, I2C4
PWM1, PWM3
SPI x 1
USB3.0 x 1
USB2.0 x 1
eCSPI1
MIPI CSI0[3:2] MIPI CSI0
I2C
RTC Ctrl I2C1
UART4
Figure 1: i.MX8M SMARC SOM Block Diagram

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2.2 i.MX8M SMARC SOM Features
i.MX8M SMARC SOM supports the following features.
CPU
•i.MX8M Q/QL/D Core Processor:
oi.MX8MQuad Core : 4 x Cortex-A53 & 1 x Cortex-M4F
oi.MX8MQuadLite : 4 x Cortex-A53 & 1 x Cortex-M4F (Hardware Acceleration not supported)
oi.MX8MDual Core : 2 x Cortex-A53 & 1 x Cortex-M4F
Power
•PF4210 PMIC
Memory
•LPDDR4 - 2GB (Expandable)
•eMMC Flash - 8GB (Expandable)1
•Micro SD slot (Optional)1
•QSPI Flash (Optional)
Other On-SOM Features
•Wi-Fi & BT Module2
•Gigabit Ethernet PHY Transceiver x 1
•PCIe to Gigabit Ethernet Transceiver x 13
•USB 2.0 High Speed 2-Port Hub
•FAN Header
•RTC Controller
•Debug UART Header (Optional)
•JTAG Header (Optional)
SMARC PCB Edge Interfaces
•Gigabit Ethernet x 2 Ports
•SD (4bit) x 1 Port2
•USB 3.0 OTG x 1 Port
•USB 3.0 Host x 1 Ports
•USB 2.0 Host x 4Ports (through On-SOM USB Hub)
•PCIe x 1 Port3
•MIPI CSI x 2 Channel (1x2lane and 1x4lane)4

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•HDMI Transmitter x 1 Port
•MIPI DSI x 1 Channel
•SAI/I2S (Audio Interface) x 2 Ports
•Data UART (with CTS & RTS) x 1 Port (One more optional port available)
•Data UART (without CTS & RTS) x 1 Ports (Can be used as Debug Port)
•QSPI x 1 Port (One more optional port available)
•I2C x 2 Ports
•12 GPIOs
Expansion Connector Interfaces (Optional)
•SAI x 1 Port
•MIPI CSI0 (Lane2 & Lane3)4
•GPIOs
General Specification
•Power Supply : 5V, 3A
•Form Factor : 82mm X 50mm (SMARC V2.0 Specification)
1 In i.MX8M SMARC SOM, SD1 interface signals are connected to both eMMC Flash and MicroSD connector. So either
one feature only can be supported at a time in the SOM and by default, eMMC is supported.
2 In i.MX8M SMARC SOM, SD2 interface signals are connected to both SMARC Edge Connector and Wi-Fi Module. In the
SOM by default, SD2 is connected to SMARC Edge connector and Wi-Fi is supported via ECSPI1 interface.
3 In i.MX8M SMARC SOM, PCIe-2 interface signals are connected to both SMARC Edge Connector and PCIe to Ethernet
controller. In the SOM by default, PCIe-2 is connected to PCIe to Ethernet controller and only PCIe-1 is supported at
SMARC edge connector.
3 The i.MX8M Support two 4 lane MIPI_CSI interface, but SMARC support only two lane for MIPI_CSI0 over Edge
connector. In i.MX8M SMARC SOM remaining two lane of MIPI_CSI0 are connected to Expansion connector.

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2.3 i.MX8M CPU
iW-RainboW-G33M SMARC SOM can support i.MX8M CPUs from NXP. The i.MX8MFamily consists of three processors:
i.MX8M Quad Core, i.MX8M QuadLite & i.MX8M Dual Core. The Major Difference between i.MX8M CPUs are:
•i.MX8M Quad Core : 4 x Cortex-A53 & 1 x Cortex-M4F
•i.MX8M QuadLite : 4 x Cortex-A53 & 1 x Cortex-M4F (Hardware Acceleration not supported)
•i.MX8M Dual Core : 2 x Cortex-A53 & 1 x Cortex-M4F
The i.MX 8M Dual / 8M QuadLite / 8M Quad processors feature advanced implementation of a quad Arm® Cortex®-
A53 core, which operates at speeds of up to 1.5 GHz. A general-purpose Cortex®-M4 core processor is for low-power
processing. The DRAM controller supports 32-bit/16-bit LPDDR4, DDR4, and DDR3L memory. There are a number of
other interfaces for connecting peripherals, such as WLAN, Bluetooth, GPS, displays, and camera sensors. The i.MX
8M Quad and i.MX 8M Dual processors have hardware acceleration for video playback up to 4K, and can drive the
video outputs up to 60 fps. Although the i.MX 8M QuadLite processor does not have hardware acceleration for video
decode, it allows for video playback with software decoders if needed.
Figure 2: i.MX8MBlock Diagram
Note: The i.MX8M processor offers numerous advanced features, please refer the latest i.MX8MDatasheet & Reference
Manual for Electrical characteristics and other information, which may be revised from time to time.

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2.4 PF4210 PMIC
i.MX8M SMARC SOM uses one PF4210 PMIC for SOM Power management. The PF4210 PMIC are programmed with
standard A1 Sequence from NXP.
The PF4210 is defined to power low-cost audio/video applications using the i.MX 8M family of applications processors.
The PF4210 high performance power management integrated circuit (PMIC) provides a highly
programmable/configurable architecture with fully integrated power devices and minimal external components. With
up to six buck converters, six linear regulators, an RTC supply, and a coin cell charger, the PF4210 can provide power
for a complete system, including applications processors, memory, and system peripherals, in a wide range of
applications. In i.MX8M SMARC SOM PF4210 PMIC (U9) is placed on Top side.
2.5 Memory
2.5.1 LPDDR4 RAM
The i.MX8M SMARC SOM supports 2GB RAM using 32bit DDR_CH0 channel of CPU to support LPDDR4 up to 1.6 GHz.
LPDDR4 part (U11) is placed on Top side of the SOM. LPDDR4 memory size can be customised based on the
requirement by contacting iWave support team.
2.5.2 eMMC Flash
The i.MX8M SMARC SOM supports 8GB eMMC as default boot device and storage device. This is connected to uSDHC1
controller of the i.MX8M CPU and operates at 1.8V (I/O supply) and 3.3V (NAND core supply) Voltage levels.
The eMMC flash (U20) memory is physically located on Top side of the SMARC SOM. The memory size of the eMMC
Flash can be customised based on the requirement by contacting iWave Support Team.
2.5.3 Micro SD Connector slot (Optional)
The i.MX8M SMARC SOM optionally supports Micro SD slot which can be used to connect Micro SD card as optional
boot device as well as Mass storage device. Micro SD card connector (J3) is and eMMC both share uSDHC1 controller
of the i.MX8M CPU, hence either eMMC or microSD can be used at a time. The main power to Micro SD Card Connector
is 3.3 Voltage. The i.MX8M SMARC SOM supports configurable IO voltage levels for uSDHC1 lines through a GPIO. And
the micro SD Connector is physically located on Top side of the i.MX8M SMARC SOM.
Note: In default configuration uSDHC1 is used for on board eMMC module. Contact iWave Support team if microSD
feature is required.

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2.5.4 QSPI Flash (Optional)
The i.MX8M SMARC SOM optionally supports 2MB QSPI Flash for storage and can be used as boot device. This is
connected to QSPI_A controller of the i.MX8M processor and operates at 1.8V Voltage levels. The QSPI flash (U31)
memory is physically located on Bottom side of the SMARC SOM. The QSPI can be supported with customised memory
size based on the requirement by contacting iWave Support Team.
2.6 Network & Communiation
2.6.1 Wi-Fi and Bluetooth Interface
The i.MX8M SMARC SOM is integrated with Microchip’s “ATWILC3000-MR110CA” based Wi-Fi & Bluetooth module
The ATWILC3000-MR110CA module is an IEEE 802.11 b/g/n RF/Baseband/Medium Access Control (MAC) link
controller and Bluetooth 4.0 compliant module, optimized for low power mobile applications.
This module supports single stream 1x1 IEEE 802.11n mode providing up to 72 Mbps PHY rate. The ATWILC3000-
MR110CA module features small form factor when integrating Power Amplifier (PA), Low Noise Amplifier (LNA),
Transmit/Receive switch, Power Management, and chip Antenna. This module offers very low power consumption
while simultaneously providing high performance. This module contains all circuitry required including a chip antenna,
26 MHz crystal, and PMU circuitry. The ATWILC3000-MR110CA module as on-board Antenna but it requires a 32.768
kHz clock for sleep operation.
The ATWILC3000-MR110CA module utilizes highly optimized IEEE 802.11 Bluetooth coexistence protocols and
provides Serial Peripheral Interface (SPI) and Secure Digital Input Output (SDIO) for interfacing with the host controller.
The i.MX8M SMARC SOM uses processor’s ECSPI1 interface as default configuration and also provide option for
uSDHC2 interface.

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2.7 SMARC PCB Edge Connector
SMARC PCB edge connector has standard pin out as per SMARC Specification V2.0. The interfaces which are
available at 314pin SMARC Edge connector are explained in the following sections.
Figure 3: SMARC Edge Connector
Number of Pins - : 314
Connector Part - : Not Applicable (On Board PCB Edge connector)
Mating Connector - : 91782-3140M-001 from Aces

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Table 3: SMARC Edge Connector Pinouts
Signal
SMARC Pin
(Top)
SMARC Pin
(Bottom)
Signal
GPIO_SMB_ALERT(GPIO1_00)
P1
S1
I2C1_SCL
GND
P2
S2
I2C1_SDA
MIPI_CSI2_CLK_P
P3
S3
GND
MIPI_CSI2_CLK_N
P4
S4
NC
NC
P5
S5
I2C3_SCL
NC
P6
S6
MCLK
MIPI_CSI2_DATA0_P
P7
S7
I2C3_SDA
MIPI_CSI2_DATA0_N
P8
S8
MIPI_CSI1_CLK_P
GND
P9
S9
MIPI_CSI1_CLK_N
MIPI_CSI2_DATA1_P
P10
S10
GND
MIPI_CSI2_DATA1_N
P11
S11
MIPI_CSI1_DATA0_P
GND
P12
S12
MIPI_CSI1_DATA0_N
MIPI_CSI2_DATA2_P
P13
S13
GND
MIPI_CSI2_DATA2_N
P14
S14
MIPI_CSI1_DATA1_P
GND
P15
S15
MIPI_CSI1_DATA1_N
MIPI_CSI2_DATA3_P
P16
S16
GND
MIPI_CSI2_DATA3_N
P17
S17
GBE1_MDI0+
GND
P18
S18
GBE1_MDI0-
GBE0_MDI3-
P19
S19
GBE1_LINK100#
GBE0_MDI3+
P20
S20
GBE1_MDI1+
GBE0_LINK100#
P21
S21
GBE1_MDI1-
GBE0_LINK1000#
P22
S22
GBE1_LINK1000#
GBE0_MDI2-
P23
S23
GBE1_MDI2+
GBE0_MDI2+
P24
S24
GBE1_MDI2-
GBE0_LINK_ACT#
P25
S25
GND
GBE0_MDI1-
P26
S26
GBE1_MDI3+
GBE0_MDI1+
P27
S27
GBE1_MDI3-
VPHY0_DVDDL
P28
S28
NC
GBE0_MDI0-
P29
S29
NC
GBE0_MDI0+
P30
S30
NC
NC
P31
S31
GBE1_LINK_ACT#
GND
P32
S32
NC
SDIO_WP
P33
S33
NC
SMARC_SD_CMD
P34
S34
GND
SDIO_CD#
P35
S35
USB_HUB3OUT_DP
SMARC_SD_CLK
P36
S36
USB_HUB3OUT_DM
GPIO_SDIO_PWR_EN(GPIO2_19)
P37
S37
VBUS_OTG
GND
P38
S38
SAI2_MCLK
SMARC_SD_DATA0
P39
S39
SAI2_TXFS
SMARC_SD_DATA1
P40
S40
SAI2_TXD0

REL0.2
Page 19 of 58
i.MX8M SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Signal
SMARC Pin
(Top)
SMARC Pin
(Bottom)
Signal
SMARC_SD_DATA2
P41
S41
SAI2_RXD0
SMARC_SD_DATA3
P42
S42
SAI2_TXC
ECSPI1_SS0
P43
S43
NC
ECSPI1_SCLK
P44
S44
NC
ECSPI1_MISO
P45
S45
NC
ECSPI1_MOSI
P46
S46
NC
GND
P47
S47
GND
NC
P48
S48
I2C2_SCL
NC
P49
S49
I2C2_SDA
GND
P50
S50
SAI3_TXFS
NC
P51
S51
SAI3_TXD0
NC
P52
S52
SAI3_RXD0
GND
P53
S53
SAI3_TXC
QSPI_B_SS0_B(NAND_CE2_B)
P54
S54
NC
QSPI_B_SS1_B(NAND_CE3_B)
P55
S55
USB_HUB4_OC
QSPI_B_SCLK(NAND_CLE)
P56
S56
QSPI_B_DATA2(NAND_DATA06)
QSPI_B_DATA0(NAND_DATA04)
P57
S57
QSPI_B_DATA3(NAND_DATA07)
QSPI_B_DATA1(NAND_DATA05)
P58
S58
GPIO_QSPI_RST(GPIO3_15)
GND
P59
S59
USB_HUB4OUT_DP
USB0_DP*
P60
S60
USB_HUB4OUT_DM
USB0_DM*
P61
S61
GND
USB0_EN_OC
P62
S62
USB1_TX_P
VBUS_OTG*
P63
S63
USB1_TX_N
USB0_OTG_ID
P64
S64
GND
USB_HUB1OUT_DP
P65
S65
USB1_RX_P
USB_HUB1OUT_DM
P66
S66
USB1_RX_N
USB_HUB1_OC
P67
S67
GND
GND
P68
S68
USB3_DP
USB_HUB2OUT_DP
P69
S69
USB3_DM
USB_HUB2OUT_DM
P70
S70
GND
USB2_EN_OC
P71
S71
USB2_TX_P
NC
P72
S72
USB2_TX_N
NC
P73
S73
GND
USB3_EN_OC
P74
S74
USB2_RX_P
S75
USB2_RX_N
Key
Key
GPIO_PCIE_RST_3V3(GPIO5_4)
P75
S76
GPIO_PCIE_RST_3V3(GPIO5_4)*
USB_HUB3_OC
P76
S77
NC
NC
P77
S78
NC
NC
P78
S79
NC
GND
P79
S80
GND

REL0.2
Page 20 of 58
i.MX8M SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Signal
SMARC Pin
(Top)
SMARC Pin
(Bottom)
Signal
NC
P80
S81
NC
NC
P81
S82
NC
GND
P82
S83
GND
PCIE1_REFCLK_P
P83
S84
PCIE2_REFCLK_P*
PCIE1_REFCLK_N
P84
S85
PCIE2_REFCLK_N*
GND
P85
S86
GND
PCIE1_RXP
P86
S87
PCIE2_RXP*
PCIE1_RXN
P87
S88
PCIE2_RXN*
GND
P88
S89
GND
PCIE1_TXP
P89
S90
PCIE2_TXP*
PCIE1_TXN
P90
S91
PCIE2_TXN*
GND
P91
S92
GND
HDMI_TX_DATA2_P
P92
S93
HDMI_TX_DATA0_P*
HDMI_TX_DATA2_N
P93
S94
HDMI_TX_DATA0_N*
GND
P94
S95
NC
HDMI_TX_DATA1_P
P95
S96
HDMI_TX_DATA1_P*
HDMI_TX_DATA1_N
P96
S97
HDMI_TX_DATA1_N*
GND
P97
S98
NC
HDMI_TX_DATA0_P
P98
S99
HDMI_TX_DATA2_P*
HDMI_TX_DATA0_N
P99
S100
HDMI_TX_DATA2_N*
GND
P100
S101
GND
HDMI_TX_CLK_P
P101
S102
HDMI_CLK_P*
HDMI_TX_CLK_N
P102
S103
HDMI_CLK_N*
GND
P103
S104
USB3_OTG_ID
HDMI_HPD
P104
S105
HDMI_AUX_P*
HDMI_CTRL_SCL
P105
S106
HDMI_AUX_N*
HDMI_CTRL_SDA
P106
S107
NC
NC
P107
S108
NC
SMARC_GPIO_0(GPIO3_16)
P108
S109
NC
SMARC_GPIO_1(GPIO1_12)
P109
S110
GND
SMARC_GPIO_2(GPIO1_15)
P110
S111
NC
SMARC_GPIO_3(GPIO1_11)
P111
S112
NC
SMARC_GPIO_4(GPIO1_10)
P112
S113
NC
SMARC_GPIO_5(GPIO1_01)
P113
S114
NC
SMARC_GPIO_6(GPIO1_09)
P114
S115
NC
SMARC_GPIO_7(GPIO1_06)
P115
S116
NC
SMARC_GPIO_8(GPIO1_08)
P116
S117
NC
SMARC_GPIO_9(GPIO1_03)
P117
S118
NC
SMARC_GPIO_10(GPIO1_07)
P118
S119
GND
SMARC_GPIO_11(GPIO1_04)
P119
S120
NC
GND
P120
S121
NC