Kontron MOPSlcdGX1 User manual

MOPSlcdGX1
Product Manual
Document Revision 1.3
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MOPSlcdGX1 Product Manual Contents
Kontron Embedded Modules Revision 1.3
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CONTENTS
1. USER INFORMATION...................................................................................................1
1.1 ABOUT THIS MANUAL ............................................................................................1
1.2 COPYRIGHT NOTICE................................................................................................1
1.3 TRADEMARKS .........................................................................................................2
1.4 STANDARDS............................................................................................................2
1.5 WARRANTY ............................................................................................................2
1.6 TECHNICAL SUPPORT..............................................................................................3
2. INTRODUCTION ............................................................................................................4
3. SPECIFICATIONS ..........................................................................................................5
3.1 FUNCTIONAL SPECIFICATIONS ................................................................................5
3.2 MECHANICAL SPECIFICATIONS ...............................................................................7
3.3 ELECTRICAL SPECIFICATIONS .................................................................................7
3.4 ENVIRONMENTAL SPECIFICATIONS .........................................................................7
4. CPU, CHIPSET, AND SUPER I/O.................................................................................9
4.1 CPU........................................................................................................................9
4.2 CHIPSET ..................................................................................................................9
4.3 SUPER I/O.............................................................................................................10
5. SYSTEM MEMORY......................................................................................................11
5.1 CONNECTOR (X1) .................................................................................................11
6. ISA EXPANSION...........................................................................................................12
6.1 CONNECTORS (X2A AND X2B)..............................................................................12
6.2 CONFIGURATION...................................................................................................13
6.3 ADAPTER CARD MOUNTING .................................................................................13
7. USB INTERFACE..........................................................................................................14
7.1 CONNECTORS (X6 AND X7)..................................................................................14
7.2 CONFIGURATION...................................................................................................14
8. SERIAL-COMMUNICATION INTERFACE.............................................................15
8.1 CONNECTORS (X11 AND X12)..............................................................................15
8.2 CONFIGURATION...................................................................................................15
9. PARALLEL-COMMUNICATION INTERFACE......................................................16
9.1 CONNECTOR (X15) ...............................................................................................16
9.2 CONFIGURATION...................................................................................................17
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10. KEYBOARD AND FRONT-PANEL INTERFACE...................................................18
10.1 CONNECTOR (X10) ...............................................................................................18
10.2 CONFIGURATION...................................................................................................18
10.3 SIGNAL DESCRPITIONS..........................................................................................19
10.4 ADAPTER CABLE PINOUT......................................................................................20
11. PS/2-MOUSE INTERFACE..........................................................................................21
11.1 CONNECTOR (X20) ...............................................................................................21
11.2 CONFIGURATION...................................................................................................21
12. FLOPPY-DRIVE INTERFACE....................................................................................22
12.1 CONNECTOR (X13) ...............................................................................................22
12.2 CONFIGURATION...................................................................................................23
13. IDE-CONTROLLER INTERFACE.............................................................................24
13.1 IDE CONNECTOR (X5)..........................................................................................24
13.2 CONFIGURATION...................................................................................................25
13.3 COMPACTFLASH CONNECTOR (X14)....................................................................25
14. CHIPDISK-IDE INTERFACE......................................................................................26
14.1 CONNECTOR (X5) .................................................................................................28
14.2 CONFIGURATION...................................................................................................28
14.3 SIGNAL DESCRIPTIONS..........................................................................................28
15. ETHERNET-CONTROLLER INTERFACE..............................................................31
15.1 CONNECTOR (X17 AND X18)................................................................................32
15.2 CONFIGURATION...................................................................................................32
15.3 ETHERNET TECHNICAL SUPPORT ..........................................................................32
16. GRAPHICS-CONTROLLER INTERFACE...............................................................33
16.1 FLAT PANEL LVDS (JILI) CONNECTOR (X16).....................................................33
16.2 CONFIGURATION...................................................................................................33
16.3 VGA CONNECTOR (X9)........................................................................................34
16.4 CONFIGURATION...................................................................................................34
17. OPERATING SYSTEMS ..............................................................................................35
18. POWER...........................................................................................................................36
18.1 VBAT (SYSTEM BATTERY CONNECTION)............................................................36
18.2 CONNECTOR (X2C)...............................................................................................36
19. WATCHDOG TIMER...................................................................................................37
19.1 CONFIGURATION...................................................................................................37
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20. APPENDIX A: SYSTEM-RESOURCE ALLOCATIONS.........................................38
20.1 I/O PORT ASSIGNMENTS .......................................................................................38
20.2 INTERRUPT REQUEST LINES..................................................................................38
20.3 DIRECT MEMORY ACCESS (DMA) CHANNELS .....................................................39
20.4 UPPER MEMORY AREA MAP.................................................................................39
20.5 PCI DEVICES ........................................................................................................39
21. APPENDIX B: BIOS OPERATION.............................................................................40
21.1 CONFIGURING THE SYSTEM BIOS.........................................................................40
21.2 MAIN MENU .........................................................................................................42
21.3 ADVANCED MENU ................................................................................................44
21.4 SECURITY MENU...................................................................................................50
21.5 POWER MENU .......................................................................................................51
21.6 SETUP BOOT MENU...............................................................................................52
21.7 EXIT MENU...........................................................................................................55
21.8 UPDATING OR RESTORING BIOS USING PHOENIX PHLASH...................................55
22. APPENDIX C: BLOCK DIAGRAM............................................................................58
23. APPENDIX D: MECHANICAL DIMENSIONS ........................................................59
23.1 TOP.......................................................................................................................59
23.2 BOTTOM................................................................................................................59
24. APPENDIX E: CONNECTOR LAYOUT....................................................................60
24.1 CONNECTOR LAYOUT ...........................................................................................60
24.2 CONNECTOR TABLE ..............................................................................................60
25. APPENDIX F: JIDA STANDARD ...............................................................................61
25.1 OBTAINING INFORMATION ABOUT BOARDS THAT USE THE JIDA STANDARD ......61
26. APPENDIX G: LITERATURE AND STANDARDS..................................................62
26.1 BUSES ...................................................................................................................62
26.2 GENERAL PC ARCHITECTURE...............................................................................63
26.3 PORTS ...................................................................................................................63
26.4 PROGRAMMING.....................................................................................................64
27. APPENDIX H: DOCUMENT-REVISION HISTORY...............................................65
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MOPSlcdGX1 Product Manual User Information
Kontron Embedded Modules Revision 1.3
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1. USER INFORMATION
1.1 About This Manual
This document provides information about products from Kontron Embedded Computers
AG and/or its subsidiaries. No warranty of suitability, purpose, or fitness is implied.
While every attempt has been made to ensure that the information in this document is
accurate, the information contained within is supplied “as-is” and is subject to change
without notice.
For the circuits, descriptions and tables indicated, Kontron assumes no responsibility as
far as patents or other rights of third parties are concerned.
1.1.1 JUMPtec Brand
JUMPtec Industrielle Computertechnik AG and Kontron Embedded Computers AG
merged in July 2002. JUMPtec is now known as Kontron Embedded Modules GmbH.
Products labeled and sold under the Kontron Embedded Modules name (formerly
JUMPtec) are now considered Kontron products for all practical purposes, including
warranty and support.
DIMM-PC®, PISA®, ETX Components SBC, JUMPtec®, and Kontron Embedded
Modules are registered trademarks of Kontron Embedded Modules GmbH.
1.2 Copyright Notice
Copyright © 2002 Kontron Embedded Computers AG.
All rights reserved. No part of this manual may be reproduced, transmitted, transcribed,
stored in a retrieval system, or translated into any language or computer language, in any
form or by any means (electronic, mechanical, photocopying, recording, or otherwise),
without the express written permission of Kontron.
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1.3 Trademarks
The following lists the trademarks of components used in this board.
• IBM, XT, AT, PS/2 and Personal System/2 are trademarks of International
Business Machines Corp.
• Microsoft is a registered trademark of Microsoft Corp.
• Intel is a registered trademark of Intel Corp.
• All other products and trademarks mentioned in this manual are trademarks of
their respective owners.
1.4 Standards
Kontron Embedded Modules is certified to ISO 9000 standards.
1.5 Warranty
This Kontron Embedded Modules product is warranted against defects in material and
workmanship for the warranty period from the date of shipment. During the warranty
period, Kontron Embedded Modules will at its discretion decide to repair or replace
defective products.
Within the warranty period, the repair of products is free of charge as long as warranty
conditions are observed.
You may receive a bill for test costs if Kontron Embedded Modules finds no fault with
the product. You also may receive a bill for repairs if a product’s warranty has expired.
For warranty service or repair, return the product to a Kontron Embedded Modules
service facility listed in the Technical Support section of this document.
The warranty does not apply to defects resulting from improper or inadequate
maintenance or handling by the buyer, unauthorized modification or misuse, operation
outside of the product’s environmental specifications or improper installation or
maintenance.
Kontron Embedded Modules will not be responsible for any defects or damages to other
products not supplied by Kontron Embedded Modules that are caused by a faulty
Kontron Embedded Modules product.
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MOPSlcdGX1 Product Manual User Information
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1.6 Technical Support
Technicians and engineers from Kontron Embedded Modules and/or its subsidiaries are
available for technical support. We are committed to making our product easy to use and
will help you use our products in your systems.
Before contacting Kontron Embedded Modules technical support, please consult our
Web site for the latest product documentation, utilities, and drivers. If the information
does not help solve the problem, contact us by email or telephone.
The table below lists technical support contacts and service facilities for Kontron
Embedded Modules.
Asia Europe North/South America
Kontron Asia Kontron Embedded Modules Kontron Americas
5F-1, 341, Sec 4
Chung Hsiao E. Road
Taipei, Taiwan
Brunnwiesenstr. 16
94469 Deggendorf – Germany
3988 Trust Way
Hayward, CA 94545
Tel: [phone] Tel: [phone] Tel: [phone]
Fax: [phone] Fax: [phone] Fax: [phone]
techsupport@KontronEmbeddedModules
techsupport@KontronAmericas
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MOPSlcdGX1 Product Manual Introduction
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2. INTRODUCTION
The MOPSlcdGX1 provides a complete embedded solution and offers the latest in
features and technology. The board uses the National GX1 CPU.
PC/AT subsystems found in desktop units are built into the MOPSlcdGX1. Subsystems
include:
• CPU
• System ROM (BIOS)
• Direct memory access (DMA)
• Counters
• Interrupt controllers
• Keyboard
• Motherboard speaker
• Floppy-drive interface
• Integrated Drive Electronics (IDE) hard-disk interface
• Serial ports (COM1 and COM2)
• Parallel port (LPT1)
• Integrated memory controller with up to 4MB unified memory architecture
(UMA) for VGA
Additional subsystems integrated into the MOPSlcdGX1 enhance its PC/AT
functionality. Subsystems include:
• PS/2 style mouse
• Universal serial bus (USB) ports
• Up to two peripheral component interconnect (PCI) Fast Ethernet chips
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MOPSlcdGX1 Product Manual Specifications
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3. SPECIFICATIONS
3.1 Functional Specifications
• National Semiconductor Geode GX1 Processor
• Bus
♦ 200MHz (33Mhz bus clock)
♦ 266MHz (33Mhz bus clock)
♦ 300MHz (33Mhz bus clock)
• Geode I/O Companion Multifunction South Bridge (CS5530A) chipset
• Winbond W83977AF Super I/O
• 16KB-integrated cache
• Memory
♦ One SO-DIMM socket for 8/16/32/64/128/256MB SDRAM module
• Two serial ports
♦ COM1 and COM2
♦ Transistor-to-transistor logic (TTL) signals only
• One parallel port
♦ LPT1
♦ Extended capabilities port (ECP) and enhanced parallel port (EPP) with bi-
directional capability
• Floppy-drive interface
• One PCI Bus Master IDE port support for up to two IDE devices
♦ Ultra 33 DMA mode
♦ Programmable input/output (PIO) modes up to Mode 4 timing
♦ Multiword DMA Mode 0, 1, 2 with independent timing
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• Onboard CompactFlash socket
♦ Type 1 only for commercial compact flashes
♦ Master on secondary IDE
♦ Located on bottom of MOPSlcdGX1 board
• USB
♦ Two USB-1.1 ports (OHCI)
♦ USB legacy-keyboard support
• Two Davicom 9102A PCI Ethernet chips
♦ 10BASE-T/100BASE-T LAN
♦ Fast Ethernet, network-interface card (NIC) controller
• Onboard VGA integrated in Geode I/O Companion Multifunction South
Bridge (CS5530A) chipset
♦ 2D-graphics accelerator and display controller
♦ Cathode ray tube (CRT) and liquid crystal display (LCD) panel support
♦ Low voltage differential signaling (LVDS): 110MHz channel that uses the
JUMPtec Intelligent LVDS Interface (JILI)
♦ Digital signals: using JUMPtec Intelligent Digital Interface (JIDI)
♦ Resolution up to 1280 x 1024 x 8 x 16bpp
♦ Up to 4MB Video RAM based on UMA
• Phoenix 512Kbyte Flash BIOS
• NV-EEPROM for CMOS setup
• Keyboard controller
• PS/2 mouse interface
• Watchdog timer (WDT)
• Real-time clock (requires external battery)
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MOPSlcdGX1 Product Manual Specifications
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3.2 Mechanical Specifications
• Mechanical: 96mm x 90mm (3.8" x 3.6")
• Mounting: Two pieces of 2x32 pin-male and 2x20 pin-male connector
3.3 Electrical Specifications
3.3.1 Supply Voltage
When operating a LCD panel, make sure you use a stable power supply, using the
following volts.
• 5V DC +/- 5%
3.3.2 Supply Voltage Ripple
• 100 mV peak to peak 0-20 MHz
3.3.3 Supply Current
• Typical: 1.2A
• Maximum: 1.2A
3.3.4 External RTC Battery
• External real-time clock (RTC) battery voltage: 2.2 - 3.5V (typ. 3.0V)
• External RTC battery quiescent current: max. 2.4uA
3.4 Environmental Specifications
3.4.1 Temperature
• Operating: 0 to + 60°C
• Nonoperating: -10 to + 85 °C
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MOPSlcdGX1 Product Manual Specifications
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3.4.2 Humidity
• Operating: 10% to 90% (noncondensing)
• Nonoperating: 5% to 95% (noncondensing)
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MOPSlcdGX1 Product Manual CPU, Chipset, and Super I/O
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4. CPU, CHIPSET, AND SUPER I/O
4.1 CPU
National Semiconductor Geode GX1 Processor features include:
• Support for Intel’s MultiMedia eXtensions (MMX) instruction set extension for
acceleration of multimedia applications
• 16KB unified L1 cache
• Advanced Power Management (APM 1.2) for legacy power management
• PCI host controller
• 2D-graphics accelerator and display controller
• Synchronous dynamic random access memory (SDRAM) interface tightly
coupled to CPU core and graphics subsystem for maximum efficiency
4.2 Chipset
Geode I/O Companion Multifunction South Bridge (CS5530A) features include:
• 3.3V or 5.0V, PCI-bus compatible
• 5.0V-tolerant I/O interfaces
• PCI-2.1 compliant
• Support for PCI initiator to Industry Standard Architecture (ISA) and ISA master-
to-PCI cycle translations
• PCI master for audio I/O and IDE controllers
• PCI-to-ISA interrupt mapper/translator distributed DMA supported
• Two 8259A-equivalent interrupt controllers
• 8254-equivalent timer
• Two 8237-equivalent DMA controllers
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MOPSlcdGX1 Product Manual CPU, Chipset, and Super I/O
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• Boot-read only memory (ROM) and keyboard-chip select
• Two controllers with support for up to three IDE devices
• Independent timing for master and slave devices for both channels
• PCI bus master burst reads and writes
• Ultra DMA/33 support
• Two independent USB interfaces
♦ Open-host controller interface (OpenHCI)
♦ Second-generation design
4.3 Super I/O
The Winbond W83977AF Super I/O integrates the following:
• Disk-drive adapter
• Serial port (Universal Asynchronous Receiver/Transmitter [UART])
• Parallel port
• Configurable plug-and-play (PNP) registers for the whole chip
Other features include:
• PNP 1.0A compatible
• Supports 13 interrupt request (IRQ) lines, 4 DMA channels, full 16-bit address
decoding
• Sharing ISA-bus IRQs
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MOPSlcdGX1 Product Manual System Memory
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5. SYSTEM MEMORY
5.1 Connector (X1)
The MOPSlcdGX1 uses only small outline dual inline memory modules (SO-DIMMs).
One socket is available for 3.3-volt (power level), unbuffered synchronous dynamic
random access memory (SDRAM) of 8, 16, 32, 64, 128, or 256MB.
To find the location of Connector X1 on the MOPSlcdGX1 board, please see the
Appendix E: Connector Layout chapter.
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MOPSlcdGX1 Product Manual ISA Expansion
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6. ISA EXPANSION
For expansion, the MOPSlcdGX1 provides a PC/104 socket. This industry-standard bus
provides ISA bus signals.
6.1 Connectors (X2a and X2b)
X2b is a 64-pin, dual-row socket connector with 0.1" x 0.1" pitch. The connector
implements standard, 8-bit, ISA-bus signals. X2a is a 40-pin connector of the same style
and implements 16-bit expansion signals on the ISA bus.
To find the location of Connectors X2a and X2b on the MOPSlcdGX1 board, please see
the Appendix E: Connector Layout chapter.
ISA-Lower/X2a ISA-Upper/X2b
Pin # Signal Pin # Signal Pin # Signal Pin # Signal
A1 IOCHK# B1 GND C0 GND D0 GND
A2 SD7 B2 RESDRV C1 BHE# D1 MEMCS16#
A3 SD6 B3 VCC (***) C2 LA23 D2 IOCS16#
A4 SD5 B4 IRQ9 C3 LA22 D3 IRQ10
A5 SD4 B5 -5V C4 LA21 D4 IRQ11
A6 SD3 B6 DREQ2 C5 LA20 D5 IRQ12
A7 SD2 B7 -12V C6 LA19 D6 IRQ15
A8 SD1 B8 WS0# C7 LA18 D7 IRQ14
A9 SD0 B9 +12V C8 LA17 D8 DACK0#
A10 IOCHRDY B10 GND (*) C9 MEMR# D9 DREQ0
A11 AEN B11 SMEMW# C10 MEMW# D10 DACK5#
A12 SA19 B12 SMEMR# C11 SD8 D11 DREQ5
A13 SA18 B13 IOW# C12 SD9 D12 DACK6#
A14 SA17 B14 IOR# C13 SD10 D13 DREQ6
A15 SA16 B15 DACK3# C14 SD11 D14 DACK7#
A16 SA15 B16 DREQ3 C15 SD12 D15 DREQ7
A17 SA14 B17 DACK1# C16 SD13 D16 VCC (***)
A18 SA13 B18 DREQ1 C17 SD14 D17 \MASTER (**)
A19 SA12 B19 REFSH# C18 SD15 D18 GND
A20 SA11 B20 SYSCLK C19 KEY(*) D19 GND
A21 SA10 B21 IRQ7
A22 SA9 B22 IRQ6
A23 SA8 B23 IRQ5
A24 SA7 B24 IRQ4
A25 SA6 B25 IRQ3
A26 SA5 B26 DACK2#
A27 SA4 B27 TC
A28 SA3 B28 ALE
A29 SA2 B29 VCC (***)
A30 SA1 B30 OSC
A31 SA0 B31 GND
A32 GND B32 GND
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MOPSlcdGX1 Product Manual ISA Expansion
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Notes:
(*) Key pin for PC/104; GND for PC/104+ specification
(**) Not supported on MOPSlcdGX1.
(***) To protect external power lines of peripheral devices, make sure that
-- the wires have the right diameter to withstand maximum available current
-- the enclosure of the peripheral device fulfils fire-protecting requirements
of IEC/EN 60950.
6.2 Configuration
Refer to the PCI Configuration Submenu in the Appendix B: BIOS Operation chapter
for information on configuraton.
6.3 Adapter Card Mounting
PC/104 adapter cards are mounted in a stack-through manner. Adapter cards are designed
with plugs on their undersides that mate with the PC/104 socket connectors of the
MOPSlcdGX1. PC/104 adapters can support the socket-connector version on their
topside and allow further stacking of adapters.
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MOPSlcdGX1 Product Manual USB Interface
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7. USB INTERFACE
The MOPSlcdGX1 comes with two USB ports, which you can expand by adding external
hubs. You can connect up to 127 USB peripherals on each hub.
For more information on USB interfaces, please see the Appendix G: Literature and
Standards chapter.
7.1 Connectors (X6 and X7)
To find the location of Connectors X6 and X7 on the MOPSlcdGX1 board, please see the
Appendix E: Connector Layout chapter.
Pin Pin Function
1 +5V
2 USB-
3 USB+
4 GND
Use power contacts on Pin 1 and Pin 4 for internal USB devices only.
Note: Use a fuse to power on external USB connectors.
7.2 Configuration
Refer to the I/O Device Configuration Submenu in the Appendix B: BIOS Operation
chapter for information on configuraton.
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