Motorola 56F805 Instructions for use

© Motorola, Inc., 2003. All rights reserved.
56F805 Evaluation Module
Hardware User’s Manual
Order this document by
DSP56F805EVMUM/D
Rev 4, 06/04/2003
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MOTOROLA Table of Contents iii
Prefa e
Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Suggested Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
Notation onventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
Chapter 1
Introdu tion
1.1 56F805EVM Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.2 56F805EVM onfiguration Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.3 56F805EVM onnections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Chapter 2
Te hni al Summary
2.1 56F805 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.2 Program and Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.3 RS-232 Serial ommunications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4 lock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.5 Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2.6 Debug LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.7 Debug Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2.7.1 JTAG onnector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.7.2 Parallel JTAG Interface onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.8 External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.9 Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.10 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.11 Primary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
2.12 Secondary UNI-3 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2.13 General Purpose Switches and Run/Stop Switch. . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.14 Serial 10-bit 4-channel D/A onverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2.15 Motor ontrol PWM Signals and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2.16 Motor Protection Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
Table of Contents
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iv 56F805EVM Hardware User’s Manual MOTOROLA
2.16.1 Primary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2.16.2 Secondary UNI-3 Motor Protection Logic. . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
2.17 Back-EMF and Motor Phase urrent Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.18 Quadrature Encoder/Hall-Effect Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.19 Zero- rossing Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.20 AN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2.21 Software Feature Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
2.22 Peripheral onnectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
2.22.1 Port B Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2.22.2 Port D Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2.22.3 Port E Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2.22.4 External Memory ontrol Signal Expansion onnector . . . . . . . . . . . . . . . 2-26
2.22.5 Primary Encoder/Timer hannel A Expansion onnector . . . . . . . . . . . . . 2-26
2.22.6 Secondary Encoder/Timer hannel B Expansion onnector . . . . . . . . . . . 2-27
2.22.7 Timer hannel Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2.22.8 Timer hannel D Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
2.22.9 Address Bus Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
2.22.10 Data Bus Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
2.22.11 A/D Port Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
2.22.12 Serial ommunications Port 0 Expansion onnector . . . . . . . . . . . . . . . . . 2-30
2.22.13 Serial ommunications Port 1 Expansion onnector . . . . . . . . . . . . . . . . . 2-30
2.22.14 Serial Peripheral Interface Expansion onnector . . . . . . . . . . . . . . . . . . . . 2-31
2.22.15 AN Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31
2.22.16 PWM Port A Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
2.22.17 PWM Port B Expansion onnector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
2.23 Secondary UNI-3 Unattached Signal onnector. . . . . . . . . . . . . . . . . . . . . . . . 2-34
2.24 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
Appendix A
56F805EVM S hemati s
Appendix B
56F805EVM Bill of Material
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MOTOROLA List of Figures v
1-1 Block Diagram of the 56F805EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-2 56F805EVM Jumper Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-3 onnecting the 56F805EVM ables . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
2-1 Schematic Diagram of the External Memory Interface . . . . . . . . . . . . . . 2-4
2-2 Schematic Diagram of the RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . 2-5
2-3 Schematic Diagram of the lock Interface . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2-4 Schematic Diagram of the Debug LED Interface . . . . . . . . . . . . . . . . . . . 2-7
2-5 Block Diagram of the Parallel JTAG Interface. . . . . . . . . . . . . . . . . . . . . 2-9
2-6 Schematic Diagram of the User Interrupt Interface . . . . . . . . . . . . . . . . 2-10
2-7 Schematic Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . 2-11
2-8 Schematic Diagram of the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2-9 Run/Stop and General Purpose Switches . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2-10 Serial 10-bit, 4- hannel D/A onverter . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2-11 PWM Group A Interface and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-16
2-12 FAULTA1 Selection ircuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2-13 D -Bus Over-Voltage and Phase Over- urrent Detection ircuits. . . . 2-18
2-14 FAULTB1 Selection ircuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2-15 Primary Back-EMF or Motor Phase urrent Sense Signals . . . . . . . . . . 2-20
2-16 Zero- rossing Encoder Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2-17 AN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2-18 Software Feature Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
A-1 56F805 Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A-2 Reset, Mode, lock & IRQs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
A-3 Program & Data SRAM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4
A-4 RS-232 and S I onnectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5
A-5 Debug Serial D/A onverter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6
A-6 PWM A AND 3 User LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7
List of Figures
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vi 56F805EVM Hardware User’s Manual MOTOROLA
A-7 Primary UNI-3 Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8
A-8 Secondary UNI-3 Back-EMF, Over-Voltage and Over- urrent Sense . . A-9
A-9 User General Purpose Switches and Jumpers. . . . . . . . . . . . . . . . . . . . . A-10
A-10 Motor Phase- urrent/Back-EMF Voltage Analog Input Selector . . . . . A-11
A-11 Primary and Secondary 3-Phase Over- urrent Sense . . . . . . . . . . . . . . A-12
A-12 Primary Zero- rossing/Quadrature-Encoder or Hall-Effect Selector . . A-13
A-13 Secondary Zero- rossing/Quadrature-Encoder or Hall-Effect
Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-14
A-14 Port Expansion onnectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-15
A-15 High-Speed AN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-16
A-16 Parallel JTAG Host Target Interface and JTAG onnector. . . . . . . . . . A-17
A-17 Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-18
A-18 Bypass apacitors and Spare Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-19
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MOTOROLA List of Tables vii
1-1 56F805EVM Default Jumper Options . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
2-1 RS-232 Serial onnector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2-2 Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2-3 JTAG onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2-4 Parallel JTAG Interface Disable Jumper Selection. . . . . . . . . . . . . . . . . . 2-8
2-5 Parallel JTAG Interface onnector Description . . . . . . . . . . . . . . . . . . . . 2-9
2-6 On-Board Host Target Interface Power Source Jumper Selection . . . . . 2-10
2-7 Primary UNI-3 onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
2-8 Secondary UNI-3 onnector Description . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2-9 Unused Secondary UNI-3 onnector Signal Description. . . . . . . . . . . . 2-14
2-10 D/A Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2-11 FAULTA1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2-12 FAULTB1 Source Selection Jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2-13 AN Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2-14 Port B onnector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2-15 Port D onnector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2-16 Port E onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2-17 External Memory ontrol Signal onnector Description . . . . . . . . . . . 2-26
2-18 Timer A onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26
2-19 Timer B onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2-20 Timer onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2-21 Timer D onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28
2-22 External Memory Address Bus onnector Description . . . . . . . . . . . . . 2-28
2-23 External Memory Address Bus onnector Description . . . . . . . . . . . . . 2-29
2-24 A/D onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29
2-25 S I0 onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
2-26 S I1 onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30
List of Tables
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viii 56F805EVM Hardware User’s Manual MOTOROLA
2-27 SPI onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31
2-28 AN onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31
2-29 PWM Port A onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32
2-30 PWM Port B onnector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33
2-31 Secondary UNI-3 Unattached Signal onnector Description . . . . . . . . 2-34
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MOTOROLA Preface ix
Prefa e
This reference manual describes in detail the hardware on the 56F805 Evaluation Module.
Audien e
This document is intended for application developers who are creating software for
devices using the Motorola 56F805 part.
Organization
This manual is organized into two chapters and two appendixes.
•Chapter 1, Introduction - provides an overview of the EVM and its features.
•Chapter 2, Technical Summary - describes in detail the 56F805EVM hardware.
•Appendix A, 56F805 VM Schematics - contains the schematics of the
56F805EVM.
•Appendix B, 56F805 VM Bill of Material - provides a list of the materials used on the
56F805EVM board.
Suggested Reading
Documentation on the 56F805 and the 56F805EVM kit may be found at this URL:
http://www.motorola.com/semiconductors
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x 56F805EVM Hardware User’s Manual MOTOROLA
Notation Conventions
This document uses the following conventions:
Definitions, A ronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.
Term or Value Symbol Examples Ex eptions
Active High Signals
(Logic One)
No special symbol
attached to the
signal name
A0
CLKO
Active Low Signals
(Logic Zero)
Noted with an
overbar in text and
in most figures
WE
OE
In s ch e ma t ic d ra w in g s,
Active Low Signals
may be noted by a
backslash: /WE
Hexadecimal
Values
Begin with a “$”
symbol
$0FF0
$80
Decimal Values No special symbol
attached to the
number
10
34
Binary Values Begin with the letter
“b” attached to the
number
b1010
b0011
Numbers Considered positive
unless specifically
noted as a negative
value
5
-10
Voltage is often shown
as positive: +3 3V
Bold Reference sources,
paths, emphasis
see: http://www.motorola. om
A/D Analog-to-Digital
CAN ontroller Area Network, a serial communications peripheral and
method
CiA AN in Automation, an international AN user’s group that coordinates
standards for AN communications protocols
D/A Digital-to-Analog
DSP Digital Signal Processor or Digital Signal Processing
VM Evaluation Module
GPIO General Purpose Input and Output Port
IC Integrated ircuit
JTAG Joint Test Action Group, a bus protocol/interface used for test and debug
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MOTOROLA Preface xi
Referen es
The following sources were referenced to produce this manual:
[1] DSP56800 Family Manual, Motorola, DSP56800FM/D
[2] DSP56F801/803/805/807 User’s Manual, Motorola, DSP56F801-7UM/D
[3] 56F805 Technical Data, Motorola, DSP56F805/D
[4] Ci Draft Recommendation DR-303-1, Cabling and Connector Pin
ssignment, Version 1.0, AN in Automation
[5] C N Specification 2.0B, BOS H or AN in Automation
LQFP Low-profile Quad Flat Pack
MPIO Multi Purpose Input and Output Port; shares package pins with other
peripherals on the chip and can function as a GPIO
OnC TM On- hip Emulation, a debug bus and port created by Motorola to enable
designers to create a low-cost hardware interface for a
professional-quality debug environment
PCB Printed ircuit Board
PLL Phase Locked Loop
PWM Pulse Width Modulation
RAM Random Access Memory
ROM Read-Only Memory
SCI Serial ommunications Interface
SPI Serial Peripheral Interface Port
SRAM Static Random Access Memory
UART Universal Asynchronous Receiver/Transmitter
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xii 56F805EVM Hardware User’s Manual MOTOROLA
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MOTOROLA Introduction 1-1
Chapter 1
Introdu tion
The 56F805EVM is used to demonstrate the abilities of the 56F805 and to provide a
hardware tool allowing the development of applications that use the 56F805.
The 56F805EVM is an evaluation module board that includes a 56F805 part, peripheral
expansion connectors, external memory and a AN interface. The expansion connectors
are for signal monitoring and user feature expandability.
The 56F805EVM is designed for the following purposes:
• Allowing new users to become familiar with the features of the 56800 architecture.
The tools and examples provided with the 56F805EVM facilitate evaluation of the
feature set and the benefits of the family.
• Serving as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines, download the software to on-chip or
on-board RAM, run it, and debug it using a debugger via the JTAG/On ETM port.
The breakpoint features of the On E port enable the user to easily specify complex
break conditions and to execute user-developed software at full-speed, until the
break conditions are satisfied. The ability to examine and modify all user
accessible registers, memory and peripherals through the On E port greatly
facilitates the task of the developer.
• Serving as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the hybrid
controller’s peripherals. The On E port's unobtrusive design means that all of the
memory on the board and on the chip are available to the user.
1.1 56F805EVM Ar hite ture
The 56F805EVM facilitates the evaluation of various features present in the 56F805 part.
The 56F805EVM can be used to develop real-time software and hardware products based
on the 56F805. The 56F805EVM provides the features necessary for a user to write and
debug software, demonstrate the functionality of that software and interface with the
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1-2 56F805EVM Hardware User’s Manual MOTOROLA
customer's application-specific device(s). The 56F805EVM is flexible enough to allow a
user to fully exploit the 56F805's features to optimize the performance of his product, as
shown in Figure 1-1.
Figure 1-1. Blo k Diagram of the 56F805EVM
1.2 56F805EVM Configuration Jumpers
Eighteen jumper groups, (JG1-JG18), shown in Figure 1-2, are used to configure various
features on the 56F805EVM board. Table 1-1 describes the default jumper group settings.
56F805
RESET
MODE/IRQ
Address,
Data &
Control
JTAG/OnCE
XTAL/EXTAL
SPI
SCI #0
SCI #1
CAN
TIMER
GPIO
PWM #1
A/D
PWM #2
3 3 V & GND
Peripheral
Expansion
Connector(s)
RESET
LOGIC
MODE/IRQ
LOGIC
Program Memory
64Kx16-bit
Memory
Expansion
Connector(s)
JTAG
Connector
Parallel
JTAG
Interface
Low Freq
Crystal
DSub
25-Pin
Data Memory
64Kx16-bit
DSub
9-Pin
CAN Interface
Debug LEDs
PWM LEDs
Over V Sense
Over I Sense
Zero Crossing
Detect
Secondary
UNI-3
Primary
UNI-3
RS-232
Interface
4-Channel
10-bit D/A
Power Supply
3 3V, 5 0V & 3 3VA
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56F805EVM Configuration Jumpers
MOTOROLA Introduction 1-3
Figure 1-2. 56F805EVM Jumper Referen e
Table 1-1. 56F805EVM Default Jumper Options
Jumper
Group Comment Jumpers Conne tions
JG1 PD0 input selected as a high 1–2
JG2 PD1 input selected as a high 1–2
JG3 Primary UNI-3 serial selected 1–2, 3–4, 5–6 & 7–8
JG4 Secondary UNI-3 serial selected 1–2, 3–4, 5–6 & 7–8
JG5 Enable on-board Parallel JTAG Host Target Interface NC
JG6 Use on-board crystal for oscillator input 2–3
JG7 Selects the device’s Mode 0 operation upon exit from reset 1-2
JG8 Enable on-board SRAM 1–2
JG9 Enable RS-232 output 1–2
JG10 Secondary UNI-3 Analog Temperature Input unused 1–2
JG11 Use Host power for Host Target Interface 1–2
JG12 Primary Encoder Input Selected 2–3, 5–6 & 8–9
JG13 Secondary Encoder Input Selected 2–3, 5–6 & 8–9
JG14 Primary UNI-3 3-Phase Current Sense Selected as Analog Inputs 2–3, 5–6 & 8–9
JG15 Primary UNI-3 Phase A Over-Current Selected for FAULTA1 1–2
JG16 Secondary UNI-3 Phase B Over-Current Selected for FAULTB1 1–2
JG8
JG9
DSP56F805 VM
JG3
1
J29
JTAG
JG14
1
P3
US R
S/N
L D3
P1
Y1
U1
U15
S2 S3
3
1
2
JG13
S1
S4 S5 S6
P1
J31
J2
PWM
4
7
3
6
9
JG12
1
3
2
JG13
1
3
2
J23 J24
JG6
JG1 JG2
1
1
JG9
JG7
JG5
U9 U10
JG4
1
JG8
R S T
IRQB
IRQA
RUN/STOP
GP2
GP1
1
2
78
JG4
12
78
JG3
3
1
2
JG12
31
4
JG14
JG10
6
97
JG10
1
JG1
3
1
JG6
3
1
JG2
3
JG5
JG15
31
JG11
31
JG16
31
JG15
1
JG16
1
JG11
1
JG18
JG17
JG17
JG18
JG7
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1-4 56F805EVM Hardware User’s Manual MOTOROLA
1.3 56F805EVM Conne tions
An interconnection diagram is shown in Figure 1-3 for connecting the P and the external
+12V D power supply to the 56F805EVM board.
Perform the following steps to connect the 56F805EVM cables:
1. onnect the parallel extension cable to the Parallel port of the host computer
2. onnect the other end of the parallel extension cable to P1, shown in Figure 1-3,
on the 56F805EVM board. This provides the connection which allows the host
computer to control the board.
3. Make sure that the external +12V D , 4.0A power supply is not plugged into a
120V A power source
4. onnect the 2.1mm output power plug from the external power supply into P2,
shown in Figure 1-3, on the 56F805EVM board
5. Apply power to the external power supply. The green Power-On LED, LED10, will
illuminate when power is correctly applied.
JG17 CAN termination unselected NC
JG18 Use on-board crystal for oscillator input 1–2
Figure 1-3. Conne ting the 56F805EVM Cables
Table 1-1. 56F805EVM Default Jumper Options (Continued)
Jumper
Group Comment Jumpers
Conne tions
PC-compatible
Cable
Computer
Parallel Extension
56F805EVM
External
+12V
Power
P1
P2
Connect cable
to Parallel/Printer port
with 2 1mm,
receptacle
connector
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MOTOROLA Technical Summary 2-1
Chapter 2
Te hni al Summary
The 56F805EVM is designed as a versatile hybrid controller development card for
developing real-time software and hardware products to support a new generation of
applications in digital and wireless messaging, servo and motor control, digital answering
machines, feature phones, modems, and digital cameras. The power of the 16-bit 56F805
controller, combined with the on-board 64K ×16-bit external program static RAM
(SRAM), 64K ×16-bit external data SRAM, AN interface, Hall-Effect/Quadrature
Encoder interface, motor zero crossing logic, motor bus over-current logic, motor bus
over-voltage logic and parallel JTAG interface, makes the 56F805EVM ideal for
developing and implementing many motor controlling algorithms, as well as for learning
the architecture and instruction set of the 56F805 processor.
The main features of the 56F805EVM include:
• 56F805 16-bit +3.3V hybrid controller operating at 80MHz [U1]
• External fast static RAM (FSRAM) memory [U15], configured as:
—64K×16-bit of program memory with 0 wait states at 70MHz
—64K×16-bit of data memory with 0 wait states at 70MHz
• 4- hannel 10-bit Serial D/A, SPI for real-time user data display [U18]
• 8.00MHz crystal oscillator for frequency generation [Y1]
• Optional external oscillator frequency input connector [JG6 and JG18]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J29]
• On-board Parallel JTAG Host Target Interface, with a connector for a P printer
port cable [P1]
• RS-232 interface for easy connection to a host processor [U16 and P3]
• AN interface for high speed, 1.0Mbps, communications [U20 and J26]
• AN bypass and bus termination [J32 and JG17]
• onnector to allow the user to connect his own SPI0 / MPIO-compatible peripheral
[J16]
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2-2 56F805EVM Hardware User’s Manual MOTOROLA
• onnector to allow the user to connect his own S I1 / MPIO-compatible peripheral
[J17]
• onnector to allow the user to connect his own SPI / MPIO-compatible peripheral
[J19]
• onnector to allow the user to connect his own PWMA or MPIO-compatible
peripheral [J21]
• onnector to allow the user to connect his own PWMB / MPIO-compatible
peripheral [J22]
• onnector to allow the user to connect his own AN physical layer peripheral
[J25]
• onnector to allow the user to connect his own Timer A / MPIO-compatible
peripheral [J3]
• onnector to allow the user to connect his own Timer B / MPIO-compatible
peripheral [J6]
• onnector to allow the user to connect his own Timer / MPIO-compatible
peripheral [J8]
• onnector to allow the user to connect his own Timer D / MPIO-compatible
peripheral [J5]
• onnector to allow the user to attach his own Port B GPIO-compatible peripheral
[J28]
• onnector to allow the user to attach his own Port D GPIO-compatible peripheral
[J4]
• onnector to allow the user to attach his own Port E GPIO-compatible peripheral
[J7]
• 56F805’s external memory expansion connectors [J1, J2 and J27]
• On-board power regulation from an external +12V D -supplied power input [P2]
• Light Emitting Diode (LED) power indicator [LED10]
• Three on-board real-time user debugging LEDs [LED1-3]
• Six on-board Primary PWM monitoring LEDs [LED4-9]
• Primary UNI-3 Motor interface [J30]
— Encoder/Hall-Effect interface
— Over-Voltage sensing [U8]
— Over- urrent sensing [U5]
— Phase urrent sensing [U8 and U21]
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56F805
MOTOROLA Technical Summary 2-3
— Back-EMF sensing
— Temperature sensing
— Zero rossing detection
— Pulse Width Modulation
• Secondary UNI-3 Motor interface [J31]
— Encoder/Hall-Effect interface
— Over-Voltage sensing [U6]
— Over- urrent sensing [U22]
— Phase urrent sensing [U6 and U7]
— Back-EMF sensing
— Temperature sensing
— Zero rossing detection
— Pulse Width Modulation
• Manual RESET push-button [S1]
• Manual interrupt push-button for IRQA [S2]
• Manual interrupt push-button for IRQB [S3]
• General purpose push-button on GPIO PD3 [S4]
• General purpose push-button on GPIO PD4 [S5]
• General purpose toggle switch for RUN/STOP control(PD5) [S6]
2.1 56F805
The 56F805EVM uses a Motorola DSP56F805FV80 part, designated as U1 on the board
and in the schematics. This part will operate at a maximum speed of 80MHz. A full
description of the 56F805, including functionality and user information, is provided in the
following documents:
•DSP56800 Family Manual, (DSP56800FM/D): Provides a detailed description of
the core processor, including internal status and control registers and a detailed
description of the family instruction set.
•DSP56F801/803/805/807 User’s Manual, (DSP56F801-7UM/D): Provides an
overview description of the hybrid controller and detailed information about the
on-chip components including the memory and I/O maps, peripheral functionality,
and control/status register descriptions for each subsystem.
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2-4 56F805EVM Hardware User’s Manual MOTOROLA
•56F805 Technical Data, (DSP56F805/D): Provides features list and specifications
including signal descriptions, D power requirements, A timing requirements
and available packaging.
Refer to these documents for detailed information about chip functionality and operation.
They can be found on the following URL:
http://www.motorola.com/semiconductors
2.2 Program and Data Memory
The 56F805EVM uses one bank of 128K×16-bit Fast Static RAM (GSI GS72116, labeled
U15) for external memory expansion; see the FSRAM schematic diagram in Figure 2-1.
This physical memory bank is split into two logical memory banks of 64Kx16-bits: one
for Program memory and the other for Data memory. By using the device’s program
strobe, PS, signal line, along with the memory chip’s A0 signal line, half of the memory
chip is selected when Program memory accesses are requested and the other half of the
memory chip is selected when Data memory accesses are requested. This memory bank
will operate with zero wait-state accesses while the 56F805 is running at 70MHz.
However, when running at 80MHz, the memory bank operates with four wait-state
accesses. This memory bank can be disabled by removing the jumper at JG8.
Figure 2-1. S hemati Diagram of the External Memory Interfa e
56F805 GS72116
A0-A15
PS
D0-D15
RD
WR
A1-A16
A0
D0-D15
RD
WR
CS
1 2
JG8
+3 3V
Connect Pin 1-2:
Enable SRAM
Jumper Removed:
Disable SRAM
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