Phytec phyCORE-LPC3180 User manual

phyCORE-LPC3180
HARDWARE MANUAL
EDITION APRIL 2007
A product of a PHYTEC Technology Holding company

phyCORE-LPC3180
©PHYTEC America LLC 2007 L-681e_3
In this manual are descriptions for copyrighted products that are not explicitly
indicated as such. The absence of the trademark (™) and copyright (©) symbols
does not imply that a product is not protected. Additionally, registered patents and
trademarks are similarly not expressly indicated in this manual.
The information in this document has been carefully checked and is believed to be
entirely reliable. However, PHYTEC America LLC assumes no responsibility for any
inaccuracies. PHYTEC America LLC neither gives any guarantee nor accepts any
liability whatsoever for consequential damages resulting from the use of this manual
or its associated product. PHYTEC America LLC reserves the right to alter the
information contained herein without prior notification and accepts no responsibility
for any damages which might result.
Additionally, PHYTEC America LLC offers no guarantee nor accepts any liability for
damages arising from the improper usage or improper installation of the hardware or
software. PHYTEC America LLC further reserves the right to alter the layout and/or
design of the hardware without prior notification and accepts no liability for doing so.
©Copyright 2007 PHYTEC America LLC, Bainbridge Island, WA.
Rights - including those of translation, reprint, broadcast, photomechanical or similar
reproduction and storage or processing in computer systems, in whole or in part - are
reserved. No reproduction may occur without the express written consent from
PHYTEC America LLC.
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Address: PHYTEC Technologie Holding AG
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PHYTEC America LLC
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Web Site: http://www.phytec.de http://www.phytec.com
3rd Edition April 2007

Contents
©PHYTEC America LLC 2007 L-681e_3
Preface ............................................................................................................ 1
1Introduction............................................................................................. 2
1.1 Block Diagram .................................................................................. 4
1.2 View of the phyCORE-LPC3180 ...................................................... 5
2Pin Description....................................................................................... 7
3Jumpers................................................................................................. 17
3.1 J503 MCKO Signal........................................................................ 23
3.2 J504 A/D Positive Supply/Reference Voltage ............................... 23
3.3 A/D Negative Supply/Reference Voltage........................................ 23
4Power Requirements............................................................................ 24
4.1 Real Time Clock and SRAM Battery .............................................. 24
4.1.1 Real Time Clock and SRAM Power Source (J506)............ 25
4.2 Voltage Supervision (U409)............................................................ 25
5System Configuration.......................................................................... 26
5.1 Boot Process .................................................................................. 26
5.2 Boot Modes..................................................................................... 29
6System Memory.................................................................................... 30
6.1 Memory Model................................................................................ 30
6.2 SDR SDRAM (U602, U603) ........................................................... 31
6.3 NAND Flash Memory (U600).......................................................... 31
6.3.1 NAND Flash Write Protection Control (J604)..................... 32
6.4 I²C EEPROM (U601) ...................................................................... 32
6.4.1 Setting the EEPROM Lower Address bits
(J600, J601, J602).............................................................. 33
6.4.2 EEPROM Write Protection Control (J603).......................... 33
7SIBL, U-Boot and Linux....................................................................... 34
8Serial Interfaces.................................................................................... 35
8.1 RS-232 Transceivers (U301, U302)............................................... 35
8.1.1 UART2 Routing Jumpers J300, J301, J302 and J303....... 35
8.2 USB Transceiver (U300)................................................................. 36
9Processor Independent Watchdog (U408)......................................... 37
9.1 Setting the Watchdog Timeout Period (J400)................................. 37
9.2 Interfacing the WDI Watchdog Input (J401) ................................... 38
10 Debug Interface X201........................................................................... 39
11 Technical Specifications ..................................................................... 42
12 Hints for Handling the phyCORE-LPC3180 ....................................... 44

phyCORE-LPC3180
©PHYTEC America LLC 2007 L-681e_3
13 The phyCORE-LPC3180 on the phyCORE-LPC3180 Carrier Board 45
13.1phyCORE-LPC3180 Carrier Board Peripherals ............................. 45
13.1.1 Jumpers on the phyCORE-LPC3180 Carrier Board........... 48
13.2Functional Components on the phyCORE-LPC3180
Carrier Board.................................................................................. 53
13.2.1 Power Supply at X304........................................................ 53
13.2.2 System Reset Button S300 ................................................ 53
13.2.3 Boot Selection using JP306................................................ 53
13.2.4 Accessing UART5 through Socket P300A ......................... 54
13.2.5 Accessing UART2 through Socket P300B ......................... 54
13.2.6 SD Card Interface at Connector X300................................ 55
13.2.7 User Buttons S302 and S303............................................. 56
13.2.8 User LEDs D400, D401, D402, and D403.......................... 56
13.2.9 Accessing the USB through Connectors X301, X302, and
X303.................................................................................... 57
13.2.10 A/D Potentiometer R313................................................. 57
13.2.11 Battery Connector BAT300............................................. 58
13.2.12 Power Connectors X306 and X307................................. 58
13.2.13 Keyboard Connector at X203.......................................... 59
13.2.14 Debug Interface X202..................................................... 60
13.2.15 Pin Assignment Summary of the phyCORE, the
Expansion Bus and the Patch Field.................................... 61
14 Revision History................................................................................... 71
15 Component Placement Diagram......................................................... 72
Appendix A ................................................................................................... 74
Index.............................................................................................................. 75

Contents
©PHYTEC America LLC 2007 L-681e_3
Index of Figures
Figure 1: Block Diagram phyCORE-LPC3180............................................... 4
Figure 2: Top View of the phyCORE-LPC3180 (controller side)................... 5
Figure 3: Bottom View of the phyCORE-LPC3180 (connector side)............. 6
Figure 4: Pinout of the phyCORE-Connector (Top View, with Cross
Section Insert) ................................................................................ 8
Figure 5: Numbering of the Jumper Pads.................................................... 17
Figure 6: Location of the Jumpers (Top View)............................................. 18
Figure 7: Location of the Jumpers (Bottom View) ....................................... 19
Figure 8: Default Jumper Settings on the phyCORE-LPC3180 (Top Side). 21
Figure 9: Default Jumper Settings on the phyCORE-LPC3180
(Bottom Side).....................................................................................
............................................................................................ 22
Figure 10: Small Page SLC NAND Flash Structure ...................................... 27
Figure 11: JTAG Interface X201 (Top View).................................................. 39
Figure 12: JTAG Interface X201 (Bottom View) ............................................ 40
Figure 13: Physical Dimensions .................................................................... 42
Figure 14: Component Locations on the phyCORE-LPC3180 Development
Board............................................................................................ 47
Figure 15: Typical Jumper Pad Numbering Scheme (solderless jumpers)... 48
Figure 16: Location of the Jumpers (View of the Component Side).............. 50
Figure 17: Default Jumper Settings of the phyCORE-LPC3180 Carrier
Board (J300, JP302-304) ............................................................. 51
Figure 18: Default Jumper Settings of the phyCORE-LPC3180 Carrier
Board (JP300-301, JP307-311, JP400-403)................................ 51
Figure 19: Default Jumper Settings of the phyCORE-LPC3180 Carrier
Board (JP305-JP306)................................................................... 52
Figure 20: Supply Voltage Connector Dimensions at X304 .......................... 53
Figure 21: Carrier Board Keyboard Connector X203 .................................... 59
Figure 22: Carrier Board JTAG Connector X202........................................... 60
Figure 23: Pin Assignment Scheme of the Expansion Bus X201.................. 61

phyCORE-LPC3180
©PHYTEC America LLC 2007 L-681e_3
Figure 24: Pin Assignment Scheme of the Patch Field on the Optional
GPIO Expansion Board................................................................ 62
Figure 25: phyCORE-LPC3180 Component Placement, Top View.............. 72
Figure 26: phyCORE-LPC3180 Component Placement, Bottom View......... 73

Contents
©PHYTEC America LLC 2007 L-681e_3
Index of Tables
Table 1: Pinout of the phyCORE-Connector X200....................................... 9
Table 2: Jumper Settings............................................................................ 20
Table 3: J503 MCKO Signal Configuration ................................................ 23
Table 4: J504, A/D Positive Supply/Reference Voltage Selection............. 23
Table 5: VBAT Operating Limits................................................................. 24
Table 6: J506 Real Time Clock and SRAM Power Source........................ 25
Table 7: LPC3180 Memory Map................................................................. 30
Table 8: Valid SDRAM Memory Address Ranges...................................... 31
Table 9: Compatible NAND Flash Devices ................................................ 31
Table 10: J604, EEPROM Write Protection States...................................... 32
Table 11: J600, J601, J602 EEPROM Lower Address Bits ........................ 33
Table 12: J603, EEPROM Write Protection States...................................... 33
Table 13: J300, J301, J302, J303 High Speed Serial Interface
Configuration ................................................................................ 36
Table 14: J400, Processor Independent Watchdog Timeout Period
Configuration ................................................................................ 37
Table 15: J401 First Serial Interface Configuration..................................... 38
Table 16: JTAG Connector X201 Signal Assignment .................................. 41
Table 17: Carrier Board Connectors............................................................. 45
Table 18: Carrier Board Buttons................................................................... 46
Table 19: Carrier Board LEDs...................................................................... 46
Table 20: Carrier Board Potentiometers....................................................... 46
Table 21: phyCORE-LPC3180 Carrier Board Jumper Settings ................... 48
Table 22: P300A BOOT/RESET Signal Operating Limits............................ 54
Table 23: A/D Potentiometer Output Routing Options ................................. 57
Table 24: Keyboard Connector X203 Signal Assignment............................ 59
Table 25: JTAG Connector X202 Signal Assignment .................................. 60

phyCORE-LPC3180
©PHYTEC America LLC 2007 L-681e_3
Table 26: GPI Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 63
Table 27: GPO Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 64
Table 28: GPIO Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 64
Table 29: SPI Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 65
Table 30: SD Card Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 65
Table 31: USB Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 65
Table 32: JTAG/DEBUG Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 66
Table 33: System Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 66
Table 34: A/D Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 67
Table 35: PWM Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 67
Table 36: I²C Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 67
Table 37: UART Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 68
Table 38: Keyboard Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 69
Table 39: Power Pin Assignment for the phyCORE-LPC3180 /
Carrier Board / Expansion Board ................................................. 69
Table 40: Carrier Board Generated Signal Pin Assignment for the
phyCORE-LPC3180 / Carrier Board / Expansion Board.............. 70
Table 41: Unused Pins on the phyCORE-LPC3180 / Carrier Board /
Expansion Board.......................................................................... 70

Preface
PREFACE
This phyCORE-LPC3180 Hardware Manual describes the single board computer’s design and
functions. Precise specifications for the NXP Semiconductors (founded by Philips) LPC3180
microcontrollers can be found in the enclosed microcontroller Data Sheet/User's Manual. If software is
included please also refer to additional documentation for this software.
In this hardware manual and in the attached schematics, low active signals are denoted by a "/"
preceding the signal name (i.e.: /RD). A "0" indicates a logic-zero or low-level signal, while a "1"
represents a logic-one or high-level signal.
Declaration of Electro Magnetic Conformity of the PHYTEC
©PHYTEC America LLC 2007 L-681e_3 1
phyCORE-LPC3180
PHYTEC Single Board Computers (henceforth products) are designed for installation in electrical
appliances or as dedicated Evaluation Boards (i.e.: for use as a test and prototype platform for
hardware/software development) in laboratory environments.
Caution:
PHYTEC products lacking protective enclosures are subject to damage by ESD and, hence, may only
be unpacked, handled or operated in environments in which sufficient precautionary measures have
been taken in respect to ESD-dangers. It is also necessary that only appropriately trained personnel
(such as electricians, technicians and engineers) handle and/or operate these products. Moreover,
PHYTEC products should not be operated without protection circuitry if connections to the product's
pin header rows are longer than 3 m.
PHYTEC products fulfill the norms of the European Union’s Directive for Electro Magnetic Conformity
only in accordance to the descriptions and rules of usage indicated in this hardware manual
(particularly in respect to the pin header row connectors, power connector and serial interface to a
host-PC).
Implementation of PHYTEC products into target devices, as well as user modifications and extensions
of PHYTEC products, is subject to renewed establishment of conformity to, and certification of,
Electro Magnetic Directives. Users should ensure conformance following any modifications to the
products as well as implementation of the products into target systems.
The phyCORE-LPC3180 is one of a series of PHYTEC Single Board Computers that can be
populated with different controllers and, hence, offers various functions and configurations. PHYTEC
supports a variety of 8-/16- and 32-bit controllers in two ways:
(1) as the basis for Rapid Development Kits which serve as a reference and evaluation platform
(2) as insert-ready, fully functional phyCORE OEM modules, which can be embedded directly into
the user’s peripheral hardware, design.
PHYTEC's microcontroller modules allow engineers to shorten development horizons, reduce design
costs and speed project concepts from design to market. For more information go to:
http://www.phytec.com/services/phytec-advantage.html

phyCORE-LPC3180
2©PHYTEC America LLC 2007 L-681e_3
1INTRODUCTION
The phyCORE-LPC3180 belongs to PHYTEC’s phyCORE Single Board Computer module family.
The phyCORE SBCs represent the continuous development of PHYTEC Single Board Computer
technology. Like its mini-, micro- and nanoMODUL predecessors, the phyCORE boards integrate all
core elements of a microcontroller system on a subminiature board and are designed in a manner
that ensures their easy expansion and embedding in peripheral hardware developments.
As independent research indicates that approximately 70 % of all EMI (Electro Magnetic Interference)
problems stem from insufficient supply voltage grounding of electronic components in high frequency
environments the phyCORE board design features an increased pin package. The increased pin
package allows dedication of approximately 20 % of all pin header connectors on the phyCORE
boards to Ground. This improves EMI and EMC characteristics and makes it easier to design complex
applications meeting EMI and EMC guidelines using phyCORE boards even in high noise
environments.
phyCORE boards achieve their small size through modern SMD technology and multi-layer design. In
accordance with the complexity of the module, 0402-packaged SMD components and laser-drilled
Microvias are used on the boards, providing phyCORE users with access to this cutting edge
miniaturization technology for integration into their own design.
The phyCORE-LPC3180 is a subminiature (60 x 53 mm) insert-ready Single Board Computer
populated with the NXP Semiconductors (founded by Philips) LPC3180 microcontroller. Its universal
design enables its insertion in a wide range of embedded applications. All controller signals and ports
extend from the controller to high-density pitch (0.635 mm) connectors aligning two sides of the
board, allowing it to be plugged like a "big chip" into a target application.
Precise specifications for the controller populating the board can be found in the applicable controller
User’s Manual or datasheet. The descriptions in this manual are based on the NXP Semiconductors
(founded by Philips) LPC3180. No description of compatible microcontroller derivative functions is
included, as such functions are not relevant for the basic functioning of the phyCORE-LPC3180.