Phytec phyCORE-MPC5554 User manual

A product of a PHYTEC Technology Holding company
phyCORE-MPC5554
Hardware Manual
Edition January 2007

phyCORE-MPC5554
©PHYTEC Messtechnik GmbH 2006 L-484e_1
In this manual are descriptions for copyrighted products that are not explicitly
indicated as such. The absence of the trademark (™) and copyright (©) symbols
does not imply that a product is not protected. Additionally, registered patents and
trademarks are similarly not expressly indicated in this manual.
The information in this document has been carefully checked and is believed to be
entirely reliable. However, PHYTEC Messtechnik GmbH assumes no
responsibility for any inaccuracies. PHYTEC Messtechnik GmbH neither gives
any guarantee nor accepts any liability whatsoever for consequential damages
resulting from the use of this manual or its associated product. PHYTEC
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without prior notification and accepts no responsibility for any damages which
might result.
Additionally, PHYTEC Messtechnik GmbH offers no guarantee nor accepts any
liability for damages arising from the improper usage or improper installation of
the hardware or software. PHYTEC Messtechnik GmbH further reserves the right
to alter the layout and/or design of the hardware without prior notification and
accepts no liability for doing so.
©Copyright 2006 PHYTEC Messtechnik GmbH, D-55129 Mainz.
Rights - including those of translation, reprint, broadcast, photomechanical or
similar reproduction and storage or processing in computer systems, in whole or
in part - are reserved. No reproduction may occur without the express written
consent from PHYTEC Messtechnik GmbH.
EUROPE NORTH AMERICA
Address: PHYTEC Technologie Holding AG
Robert-Koch-Str. 39
D-55129 Mainz
GERMANY
PHYTEC America LLC
203 Parfitt Way SW, Suite G100
Bainbridge Island, WA 98110
USA
Ordering
Information:
[phone]
[email protected] 1 [phone] [email protected]
Technical
Support: [phone] [email protected] 1 [phone] [email protected]
Fax: [phone] [phone]
Web Site: http://www.phytec.de http://www.phytec.com
Preliminary Edition: January 2007

Contents
©PHYTEC Messtechnik GmbH 2006 L-484e_1
Preface...........................................................................................................1
1Introduction.........................................................................................3
1.1 Block Diagram .............................................................................6
1.2 View of the phyCORE-MPC5554................................................7
1.3 Minimum Requirements to Operate the phyCORE-MPC5554 ...9
2Pin Description..................................................................................11
3Jumpers..............................................................................................25
4Power Requirements.........................................................................35
4.1 Voltage Supervision and Reset ..................................................36
5System Start-Up Configuration.......................................................37
6System Memory.................................................................................39
6.1 External Standard Flash Memory (U3, U4)...............................40
6.2 Synchronous Burst SRAM (U5 – U8) .......................................41
6.3 Serial Memory (U15).................................................................42
7FPGA System Logic Device U21......................................................45
7.1 FPGA Firmware Development...................................................47
8Serial Interfaces.................................................................................49
8.1 RS-232 Interface ........................................................................49
8.2 CAN Interface ............................................................................50
8.3 JTAG/OnCE/Nexus Debug Interface.........................................51
9LAN91C111 Ethernet Controller....................................................53
9.1 Addressing the Ethernet Controller............................................53
9.2 Interrupt......................................................................................53
9.3 MAC Address.............................................................................54
9.4 Ethernet EEPROM U18.............................................................54
9.5 10/100Base-T Interface..............................................................54
10 Real-Time Clock RTC-8564 (U16)..................................................55
11 phyCORE Development Board PCM-979......................................57
11.1 Concept of the phyCORE Development Board PCM-979 ........57
11.2 Development Board PCM-979 Overview..................................58
11.2.1 Connectors, Buttons, LED’s .........................................58
11.2.2 Jumpers on the phyCORE Development Board PCM-
979.................................................................................61
11.3 Functional Components on the phyCORE Development Board
PCM-979....................................................................................65
11.3.1 Power Supply at X5 ......................................................65
11.3.2 First Serial Interface at Socket P2A..............................67
11.3.3 Second Serial Interface at Socket P2B..........................67
11.3.4 First CAN Interface at Plug P1A ..................................68
11.3.5 Second CAN Interface at Plug P1B..............................70
11.3.6 Programmable LED D6.................................................72

phyCORE-MPC5554
©PHYTEC Messtechnik GmbH 2006 L-484e_1
11.3.7 Pin Assignment Summary of the phyCORE, the
Expansion Bus and the Patch Field............................... 72
11.3.8 JTAG/Once/Nexus Debug Interface............................. 82
11.3.9 Reduced JTAG/OnCE/NEXUS Pin Header Connector
X2.................................................................................. 82
11.3.10 Full JTAG/OnCE/NEXUS Pin Header Connector X3. 83
11.4 Technical Specification of the Development Board.................. 84
11.5 Release Notes............................................................................. 86
12 Technical Specifications...................................................................87
13 Hints for Handling the Module ....................................................... 91
14 Design Considerations - Check List................................................92
15 Revision History................................................................................93
AAppendices......................................................................................... 94
A.1 Release Notes.............................................................................94
Index ...........................................................................................................95

Contents
©PHYTEC Messtechnik GmbH 2006 L-484e_1
Index of Figures
Figure 1: Block Diagram phyCORE-MPC5554........................................6
Figure 2: Top View of the phyCORE-MPC5554 Revision 1239.1...........7
Figure 3: Bottom View of the phyCORE-MPC5554 Revision 1239.1.....8
Figure 4: Pinout of the phyCORE-MPC5554 (Bottom View)................11
Figure 5: Numbering of the Jumper Pads................................................25
Figure 6: Location of the Jumpers (Controller Side)and Default Settings
(phyCORE-MPC5554 Standard Version)................................26
Figure 7: Location of the Jumpers (Connector Side) and Default Settings
(phyCORE-MPC5554 Standard Version)................................27
Figure 8: Serial Memory I2C Slave Address...........................................43
Figure 9: 14-Pin JTAG/OnCE Connector (X3) and Corresponding Pins
on the phyCORE-Connector (X2)............................................52
Figure 10: Location of Connectors, Buttons and LED's on the phyCORE
Development Board PCM-979.................................................60
Figure 11: Numbering of Jumper Pads......................................................61
Figure 12: Location of the Jumpers (View of the Component Side) ........62
Figure 13: Default Jumper Settings of the phyCORE Development Board
PCM-979 with phyCORE-MPC5554 ......................................64
Figure 14: Connecting the Supply Voltage at X5......................................66
Figure 15: Pin Assignment of P2A as First RS-232 (Front View)............67
Figure 16: Pin Assignment of P2B as Second RS-232 (Front View)........67
Figure 17: Pin Assignment of the DB-9 Plug P1A (CAN Transceiver on
phyCORE- MPC5554, Front View).........................................68
Figure 18: Pin Assignment of the DB-9 Plug P1A (CAN Transceiver on
Development Board with Galvanic Separation) ......................69
Figure 19: Pin Assignment of the DB-9 Plug P1B (CAN Transceiver on
phyCORE-MPC5554, Front View)..........................................70
Figure 20: Pin Assignment of the DB-9 Plug P1B (CAN Transceiver on
Development Board)................................................................71
Figure 21: Pin Assignment Scheme of the Expansion Bus.......................73
Figure 22: Pin Assignment Scheme of the Patch Field.............................73

phyCORE-MPC5554
©PHYTEC Messtechnik GmbH 2006 L-484e_1
Figure 23 Physical Dimensions of the Development Board PCM-979 ... 84
Figure 24: Physical Dimensions (Top View)............................................ 87
Index of Tables
Table 1: Pinout of the phyCORE-Connector X2................................... 23
Table 2: Jumper Settings........................................................................ 33
Table 3: Serial Boot Mode Baud Rate................................................... 38
Table 4: Choice of Standard Flash Memory Devices and Manufacturers40
Table 5: Memory Options for the Synchronous Burst SRAM .............. 41
Table 6: Serial Memory Options for U15.............................................. 42
Table 7: Serial Memory I2C Address (Examples) ................................. 43
Table 8: Development Board Jumper Overview.................................... 63
Table 9: JP8, JP9 Configuration of the Main Supply Voltages............ 65
Table 10: Jumper Configuration for CAN Plug P1A using the CAN
Transceiver on the phyCORE- MPC5554............................... 68
Table 11: Jumper Configuration for CAN Plug P1A Using Transceiver on
the Development Board with Galvanic Separation ................. 69
Table 12: Jumper Configuration for CAN Plug P1B Using the CAN
Transceiver on the phyCORE-MPC5554................................ 70
Table 13: Jumper Configuration for CAN Plug P1B using the CAN
Transceiver on the Development Board PCM-979 ................. 71
Table 14: JP7 Configuration of the Programmable LED D6.................. 72
Table 15: Signal Pin Assignment for the phyCORE-MPC5554 /
Development Board / Expansion Board .................................. 80
Table 16: Pin Assignment Power Supply for the phyCORE-MPC5554 /
Development Board / Expansion Board .................................. 81
Table 17: Pin Assignment of the Reduced JTAG/OnCE/Nexus Pin
Header X2................................................................................ 82
Table 18: Pin Assignment of the Full JTAG/OnCE/Nexus Pin Header X383
Table 19: Technical Data of the Development Board PCM-979............. 85
Table 20: Technical Data ......................................................................... 88

Contents
©PHYTEC Messtechnik GmbH 2006 L-484e_1

Preface
©PHYTEC Messtechnik GmbH 2006 L-484e_1 1
Preface
This phyCORE-MPC5554 Hardware Manual describes the board’s
design and functions. Precise specifications for the Freescale
MPC5554 microcontroller series can be found in the MPC5554
microcontroller Data Sheet/User’s Manual. If software is included
please also refer to additional documentation for this software.
In this hardware manual and in the attached schematics, low active
signals are denoted by a “/” in front of the signal name (i.e.: /RD). A
“0” indicates a logic-zero or low-level signal, while a “1” represents a
logic-one or high-level signal. The MSB and LSB of the data and
address busses shown in the circuit diagram are based on the
conventions of Freescale. Accordingly, D31 and A31 represent the
LSB, while D0 and A0 represent the MSB. These conventions are also
valid for the parallel I/O signals.
Declaration regarding Electro Magnetic Conformity
of the PHYTEC phyCORE-MPC5554
PHYTEC Single Board Computers (henceforth products) are designed
for installation in electrical appliances or as dedicated Evaluation
Boards (i.e.: for use as a test and prototype platform for
hardware/software development) in laboratory environments.
Note:
PHYTEC products lacking protective enclosures are subject to
damage by ESD and, hence, may only be unpacked, handled or
operated in environments in which sufficient precautionary measures
have been taken in respect to ESD dangers. It is also necessary that
only appropriately trained personnel (such as electricians, technicians
and engineers) handle and/or operate these products. Moreover,
PHYTEC products should not be operated without protection circuitry
if connections to the product’s pin header rows are longer than 3 m.

phyCORE-MPC5554
2©PHYTEC Messtechnik GmbH 2006 L-484e_1
PHYTEC products fulfill the norms of the European Union’s
Directive for Electro Magnetic Conformity only in accordance to the
descriptions and rules of usage indicated in this hardware manual
(particularly in respect to the pin header rows or connectors, power
connector and serial interface to a host-PC).
Implementation of PHYTEC products into target devices, as well as
user modifications and extensions of PHYTEC products, is subject to
renewed establishment of conformity to, and certification of, Electro
Magnetic Directives. Users should ensure conformance following any
modifications to the products as well as implementation of the
products into target systems.
The phyCORE-MPC5554 is one of a series of PHYTEC Single Board
Computers that can be populated with different controllers and, hence,
offers various functions and configurations. PHYTEC supports
common 8-, 16- and selected 32-bit controllers on two types of Single
Boards Computers:
(1) as the basis for Rapid Development Kits which serve as a
reference and evaluation platform
(2) as insert-ready, fully functional phyCORE OEM modules, which
can be embedded directly into the user’s target design.
PHYTEC’s microcontroller modules allow engineers to shorten
development horizons, reduce design costs and speed project concepts
from design to market.