Phytec phyCORE-ADuC812 User manual

A product of a PHYTEC Technology Holding company
phyCORE-ADuC812
Hardware Manual
Edition February 2003

phyCORE-AduC812
PHYTEC Meßtechnik GmbH 2003 L-461e_3
In this manual are descriptions for copyrighted products that are not explicitly
indicated as such. The absence of the trademark () and copyright () symbols
does not imply that a product is not protected. Additionally, registered patents and
trademarks are similarly not expressly indicated in this manual.
The information in this document has been carefully checked and is believed to be
entirely reliable. However, PHYTEC Meßtechnik GmbH assumes no
responsibility for any inaccuracies. PHYTEC Meßtechnik GmbH neither gives any
guarantee nor accepts any liability whatsoever for consequential damages resulting
from the use of this manual or its associated product. PHYTEC Meßtechnik
GmbH reserves the right to alter the information contained herein without prior
notification and accepts no responsibility for any damages which might result.
Additionally, PHYTEC Meßtechnik GmbH offers no guarantee nor accepts any
liability for damages arising from the improper usage or improper installation of
the hardware or software. PHYTEC Meßtechnik GmbH further reserves the right
to alter the layout and/or design of the hardware without prior notification and
accepts no liability for doing so.
Copyright 2003 PHYTEC Meßtechnik GmbH, D-55129 Mainz.
Rights - including those of translation, reprint, broadcast, photomechanical or
similar reproduction and storage or processing in computer systems, in whole or in
part - are reserved. No reproduction may occur without the express written consent
from PHYTEC Meßtechnik GmbH.
EUROPE NORTH AMERICA
Address: PHYTEC Technologie Holding AG
Robert-Koch-Str. 39
D-55129 Mainz
GERMANY
PHYTEC America LLC
203 Parfitt Way SW, Suite G100
Bainbridge Island, WA 98110
USA
Ordering
Information: [phone] [e-mail] 1 [phone] [e-mail]
Technical
Support: [phone] [email protected] 1 [phone] [e-mail]
Fax: [phone] [phone]
Web Site: http://www.phytec.de http://www.phytec.com
3rd Edition: February 2003

Table of Contents
PHYTEC Meßtechnik GmbH 2003 L-461e_3
Preface ......................................................................................................1
1 Introduction .........................................................................................3
1.1 Block Diagram..............................................................................6
1.2 View of the phyCORE-ADuC812................................................7
2 Pin Description.....................................................................................9
3 Jumpers..............................................................................................17
3.1 J2 Supply Voltage SRAMs........................................................20
3.2 J1, J9, J11 SRAM Memory Capacity.........................................20
3.3 J3, J4, J12 Serial Interface.........................................................21
3.4 J5 Interrupt Output of the CAN Controller ...............................22
3.5 J6 Internal or External Program Memory..................................22
3.6 J7 Interrupt Output of the RTC..................................................23
3.7 J8 CAN Interface.......................................................................23
3.8 J13, J14 I²C Bus Signals SDATA/MOSI and SCLOCK............24
4 Memory Model...................................................................................25
4.1 Memory Model Following Reset................................................26
4.2 Runtime Model...........................................................................27
4.3 Von Neumann Model .................................................................29
4.4 Programming Model...................................................................31
4.5 Control Register 1.......................................................................33
4.6 Address Register.........................................................................38
4.7 Mask Register.............................................................................39
4.8 Control Register 2.......................................................................42
4.9 Input Register 1...........................................................................42
4.10 Output Register 1........................................................................43
5 Serial Interfaces.................................................................................45
5.1 RS-232 Interface.........................................................................45
5.2 RS-485 Interface.........................................................................45
5.3 CAN Interface.............................................................................46
6 Flash Memory....................................................................................49
6.1 On-Board Flash Memory (U4) ...................................................49
6.2 On-Chip Flash Memory..............................................................51
7 Serial EEPROM (U11)......................................................................52

phyCORE-AduC812
PHYTEC Meßtechnik GmbH 2003 L-461e_3
8 Real-Time Clock RTC-8563 (U12)...................................................53
9 Reset Controller (U6)........................................................................54
10 Remote Supervisor Chip (U7)..........................................................55
11 Battery Buffer....................................................................................56
12 A/D Converter and D/A Converter .................................................57
13 Technical Specifications....................................................................59
14 Hints for Handling the Module........................................................61
15 The phyCORE-ADuC812 on the phyCORE Development
Board LD 5V......................................................................................63
15.1 Concept of the phyCORE Development Board LD 5V .............63
15.2 Development Board LD 5V Connectors and Jumpers...............65
15.2.1 Connectors.....................................................................65
15.2.2 Jumpers on the phyCORE Development
Board LD 5V.................................................................66
15.2.3 Unsupported Features and Improper Jumper Settings ..68
15.3 Functional Components on the phyCORE Development
Board LD 5V..............................................................................69
15.3.1 Power Supply at X1.......................................................69
15.3.2 Starting FlashTools .......................................................71
15.3.3 First Serial Interface at Socket P1A..............................73
15.3.4 Socket P1B....................................................................74
15.3.5 CAN Interface at Plug P2A...........................................76
15.3.6 RS-485 Interface at Plug P2B .......................................82
15.3.7 Programmable LED D3.................................................84
15.3.8 Pin Assignment Summary of the phyCORE, the
Expansion Bus and the Patch Field...............................85
15.3.9 Battery Connector BAT1...............................................92
15.3.10 DS2401 Silicon Serial Number.....................................92
15.3.11 Pin Header Connector X4 .............................................93
16 Revision History................................................................................94
Index ....................................................................................................95

Table of Contents
PHYTEC Meßtechnik GmbH 2003 L-461e_3
Index of Figures and Tables
Figure 1: Block Diagram phyCORE-ADuC812 ..........................................6
Figure 2: View of the phyCORE-ADuC812 (Top View)............................7
Figure 3: View of the phyCORE-ADuC812 (Bottom View).......................8
Figure 4: Pinout of the phyCORE-Connector (Component Side)................9
Figure 5: Numbered Matrix Overview of the phyCORE-Connector
(Viewed from Above).................................................................11
Figure 6: Numbering of the Jumper Pads...................................................17
Figure 7: Location of the Jumpers (Top View)..........................................17
Figure 8: Location of the Jumpers (Bottom View)....................................18
Figure 9: Memory Model Following Hardware Reset...............................26
Figure 10: Runtime Model...........................................................................28
Figure 11: Von Neumann Model .................................................................30
Figure 12: Programming Model...................................................................32
Figure 13: Flash Programming Model .........................................................34
Figure 14: Configuration of the I/O Area ....................................................35
Figure 15: Example of a Memory Model.....................................................41
Figure 16: Flash Memory Banks..................................................................50
Figure 17: Physical Dimensions (Not Shown at Scale) ...............................59
Figure 18: Modular Development and Expansion Board Concept
with the phyCORE-ADuC812....................................................64
Figure 19: Location of Connectors on the phyCORE Development
Board LD 5V ..............................................................................65
Figure 20: Numbering of Jumper Pads ........................................................66
Figure 21: Location of the Jumpers (View of the Component Side)...........67
Figure 22: Default Jumper Settings of the phyCORE Development
Board LD 5V with phyCORE-ADuC812...................................67
Figure 23: Connecting the Supply Voltage at X1 ........................................70

phyCORE-AduC812
PHYTEC Meßtechnik GmbH 2003 L-461e_3
Figure 24: Pin Assignment of the DB-9 Socket P1A as RS-232
(Front View)...............................................................................73
Figure 25: Pin Assignment of the DB-9 Socket P1B (Front View).............74
Figure 26: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver on
phyCORE-ADuC812, Front View)............................................76
Figure 27: Pin Assignment of the DB-9 Plug P2A
(CAN Transceiver on Development Board)...............................78
Figure 28: Pin Assignment of the DB-9 Plug P2A
(CAN Transceiver on Development Board with Galvanic
Separation)..................................................................................81
Figure 29: Pin Assignment of the DB-9 Plug P2B as RS-485 Interface .....82
Figure 30: Pin Assignment Scheme of the Expansion Bus..........................86
Figure 31: Pin Assignment Scheme of the Patch Field................................86
Figure 32: Connecting the DS2401 Silicon Serial Number.........................93
Figure 33: Pin Assignment of the DS2401 Silicon Serial Number..............93
Table 1: Pinout phyCORE-Connector A/B (ADuC812, ADuC824)........12
Table 2: Pinout phyCORE-Connector C/D (ADuC812, ADuC824)........13
Table 3: Pinout phyCORE-Connector E/F (ADuC812, ADuC824).........14
Table 4: Pinout phyCORE-Connector G/H (ADuC812)..........................15
Table 5: Pinout phyCORE-Connector G/H (ADuC824)..........................15
Table 6: Jumper Description.....................................................................19
Table 7: J2 Supply Voltage Configuration for SRAMs U5/U13.............20
Table 8: J1, J9, J11 SRAM Capacity Configuration ...............................20
Table 9: J3, J4 and J12 Serial Interface Configuration............................21
Table 10: J5 CAN Controller Interrupt Output Configuration..................22
Table 11: J6 Access to External or Internal Program Memory.................22
Table 12: J7 RTC Interrupt Output Configuration....................................23
Table 13: J8 CAN Interface Configuration ...............................................24
Table 14: J13 und J14 I²C Interface Configuration...................................24
Table 15: Control Register 1 of the Address Decoder................................33

Table of Contents
PHYTEC Meßtechnik GmbH 2003 L-461e_3
Table 16: Address Register of the Address Decoder..................................38
Table 17: Mask Register of the Address Decoder......................................39
Table 18: Example of Address Decoder Functions ....................................40
Table 19: Control Register 2 of the Address Decoder................................42
Table 20: Input Register 1 of the Address Decoder....................................42
Table 21: Output Register 1 of the Address Decoder.................................43
Table 22: Memory Device Options at U11.................................................52
Table 23: Improper Jumper Settings for the Development Board..............68
Table 24: JP9, JP36 Configuration of the Supply Voltages VCCI
and AVCC ..................................................................................69
Table 25: JP9, JP36 Improper Jumper Settings for the
Supply Voltages..........................................................................70
Table 26: JP28 Configuration of the Boot Button......................................71
Table 27: JP28 Configuration of a Permanent FlashTools
Start Condition............................................................................72
Table 28: JP22, JP23, JP10 Configuration of Boot via RS-232 .................72
Table 29: Improper Jumper Settings for Boot via RS-232.........................72
Table 30: Jumper Configuration for the RS-232 Interface.........................73
Table 31: Jumper Configuration of the DB-9 Socket P1B.........................74
Table 32: Improper Jumper Settings for Configuration of P1B .................75
Table 33: Jumper Configuration for CAN Plug P2A using the CAN
Transceiver on the phyCORE-ADuC812 ...................................76
Table 34: Improper Jumper Settings for the CAN Plug P2A
(CAN Transceiver on phyCORE-ADuC812).............................77
Table 35: Jumper Configuration for CAN Plug P2A using the CAN
Transceiver on the Development Board.....................................78
Table 36: Improper Jumper Settings for the CAN Plug P2A
(CAN Transceiver on the Development Board).........................79
Table 37: Jumper Configuration for CAN Plug P2A using the CAN
Transceiver on the Development Board with
Galvanic Separation....................................................................80

phyCORE-AduC812
PHYTEC Meßtechnik GmbH 2003 L-461e_3
Table 38: Improper Jumper Settings for the CAN Plug P2A
(CAN Transceiver on Development Board with Galvanic
Separation)..................................................................................81
Table 39: Jumper Configuration for DB-9 Plug P2B as
RS-485 Interface.........................................................................82
Table 40: Improper Jumper Settings for the RS-485 Interface at
Plug P2B.....................................................................................83
Table 41: JP17 Configuration of the Programmable LED D3 ...................84
Table 42: Pin Assignment Data/Address Bus for the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................87
Table 43: Pin Assignment Control Signals for the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................88
Table 44: Pin Assignment Interface Signals for the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................88
Table 45: Pin Assignment Input and Output Port for the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................89
Table 46: Pin Assignment Analog Signal Row on the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................89
Table 47: Pin Assignment Analog Signal Row on the
phyCORE-ADuC824 / Development Board /
Expansion Board ........................................................................90
Table 48: Unused Pins on the phyCORE-ADuC812 /
Development Board / Expansion Board.....................................90
Table 49: Pin Assignment Power Supply for the
phyCORE-ADuC812 / Development Board /
Expansion Board ........................................................................91
Table 50: JP19 Jumper Configuration for Silicon Serial Number Chip.....92

Preface
PHYTEC Meßtechnik GmbH 2003 L-461e_3 1
Preface
This phyCORE-ADuC812 Hardware Manual describes the board’s
design and functions. Precise specifications for the Analog Devices
ADuC812 or ADuC824 microcontroller can be found in the enclosed
microcontroller Data Sheet/User’s Manual. If software is included
please also refer to additional documentation for this software.
In this hardware manual and in the attached schematics, low active
signals are denoted by a "/" in front of the signal name (i.e.: /RD). A
"0" indicates a logic-zero or low-level signal, while a "1" represents a
logic-one or high-level signal.
Declaration of Electro Magnetic Conformity for the
PHYTEC phyCORE-ADuC812
PHYTEC Single Board Computers (henceforth products) are designed
for installation in electrical appliances or as dedicated Evaluation
Boards (i.e.: for use as a test and prototype platform for
hardware/software development) in laboratory environments.
Note:
PHYTEC products lacking protective enclosures are subject to dam-
age by Electro Static Discharge (ESD) and, hence, may only be
unpacked, handled or operated in environments in which sufficient
precautionary measures have been taken in respect to ESD dangers. It
is also necessary that only appropriately trained personnel (such as
electricians, technicians and engineers) handle and/or operate these
products. Moreover, PHYTEC products should not be operated
without protection circuitry if connections to the product’s pin header
rows are longer than 3 m.

phyCORE-AduC812
2PHYTEC Meßtechnik GmbH 2003 L-461e_3
PHYTEC products fulfill the norms of the European Union’s
Directive for Electro Magnetic Conformity only in accordance to the
descriptions and rules of usage indicated in this hardware manual
(particularly in respect to the pin header row connectors, power
connector and serial interface to a host-PC).
Implementation of PHYTEC products into target devices, as well as
user modifications and extensions of PHYTEC products, is subject to
renewed establishment of conformity to, and certification of, Electro
Magnetic Directives. Only after doing so the devices are allowed to
be put into circulation.
The phyCORE-ADuC812 is one of a series of PHYTEC Single Board
Computers (SBCs) that can be fitted with different controllers and,
hence, offers various functions and configurations. PHYTEC supports
all common 8- and 16-bit controllers in two ways:
(1) as the basis for Rapid Development Kits which serve as a
reference and evaluation platform
(2) as insert-ready, fully functional micro- / mini- and phyCORE
OEM modules which can be embedded directly into the user's
peripheral hardware design.
PHYTEC's microcontroller modules allow engineers to shorten devel-
opment horizons, reduce design costs and speed project concepts from
design to market.

Introduction
PHYTEC Meßtechnik GmbH 2003 L-461e_3 3
1Introduction
The phyCORE-ADuC812 belongs to PHYTEC’s phyCORE Single
Board Computer (SBC) module family. The phyCORE SBCs
represent the continuous development of PHYTEC Single Board
Computer technology. Like its mini-, micro- and nanoMODUL
predecessors, the phyCORE boards integrate all core elements of a
microcontroller system on a subminiature board and are designed in a
manner that ensures their easy expansion and embedding in peripheral
hardware developments.
As independent research indicates that approximately 70 % of all
Electro Magnetic Interference (EMI) problems stem from insufficient
supply voltage grounding of electronic components in high frequency
environments the phyCORE board design features an increased pin
package. The increased pin package allows dedication of
approximately 20 % of all pin header connectors on the phyCORE
boards to ground. This improves EMI and EMC characteristics and
makes it easier to design complex applications meeting EMI and
EMC guidelines using phyCORE boards even in high noise
environments.
phyCORE boards achieve their small size through advanced SMD
technology and multi-layer design. In accordance with the complexity
of the module, 0402-packaged SMD and laser-drilled Microvias
components are used on the boards, providing phyCORE users with
access to this cutting edge miniaturization technology for integration
into their own design.
The phyCORE-ADuC812 is a universal microcontroller board in
subminiature dimensions (55 mm x 60 mm). It can be populated with
ADuC812 and ADuC824 microcontrollers from Analog Device. The
ADuC812 has an integrated reference voltage source, a temperature
sensor, two 12-bit D/A-converters and a 12-bit, 8-channel
A/D-converter.

phyCORE-AduC812
4PHYTEC Meßtechnik GmbH 2003 L-461e_3
The ADuC824 has an integrated reference voltage source, a
temperature sensor, a 24-bit and a 16-bit A/D-converter with a total of
5 channels and a 12-bit D/A-converter.
The universal design enables easy integration of the
phyCORE-ADuC812 into many applications. Since all controlers
signals and in- and outputs extend to 2.54 mm pin header rows on the
edge of the board, the phyCORE-ADuC812 can be inserted like a big
chip into your target application.
Precise specifications for the controller populating the board can be
found in the applicable controller User’s Manual or Data Sheet. The
descriptions in this manual are based on the ADuC812 controller. No
description of compatible microcontroller derivative functions is
included, as such functions are not relevant for the basic functioning
of the phyCORE-ADuC812.

Introduction
PHYTEC Meßtechnik GmbH 2003 L-461e_3 5
The phyCORE-ADuC812 offers the following features:
•subminiature Single Board Computer (55 mm x 60 mm) achieved
through advanced SMD technology
•Analog Device microcontrollers with 8 kByte of on-chip Flash for
Code and 640 Bytes of EEPROM Flash for data
•integrated reference voltage and temperature sensor
•the ADuC812 microcontroller features two 12-bit D/A-converters
and a 12-bit, 8-channel AD converter
•the ADuC824 microcontroller features one 12-bit D/A-converter, a
24-bit and a 16-bit A/D-converter with 5 channels.
•improved interference protection through multi-layer technology
as well as reduced radiation interference resulting from improved
ground connections
•all digital ports as well as data and address lines extend to pin
header rows available at the edge of the board
•the analog inputs and outputs can be accessed over their specific
pin header connector
•can be inserted into target circuitry like a big chip
•128 kByte to 1 MB SRAM on-board (SMD)1
•128 kByte to 512 kByte external Flash on-board(SMD)1
•on-board Flash programming with FlashTools
•no separate programming voltage necessary because of 5 V Flash
devices
•flexible address decoding, configurable with software via complex
logic devices
•Bank latches for the Flash are integrated into the address decoder
•linear access to 16 MB data via an additional pointer in the
microcontroller
•selectable RS-232 or RS-485 interface
•optional CAN interface with SJA1000 and CAN transceiver
82C251
•I²C-Real-Time Clock
•optional 2 to 8 kByte I²C-EEPROM
1: North America: Support Hotline: + 1-800-278-9913 http://www.phytec.com
Europe: Support Hotline: [phone] http://www.phytec.de

phyCORE-AduC812
6PHYTEC Meßtechnik GmbH 2003 L-461e_3
•Reset logic and battery monitoring
•Remote Supervisory Circuit2
•free Chip Select signals for connection of external peripheries
•I/O port expansion with 8 TTL-inputs and 8 TTL-outputs
•requires a single 5 V /typ. <120 mA supply voltage
•the /EA pin can be accessed from the outside to enable easy
connection of emulators from Accutron Limited
1.1 Block Diagram
Digital Ports
Analog Ports
I2C Interface
CANRx, CANTx
RxD
RESET
Address/Data Bus
CAN
/CS[3..1]
Addres
s
Decoder
FLASH
SRAM
Micro-
controller CAN
Voltage
Supervisor Remote Supervisor EEPROM
p
h
y
C
O
R
E
-C
o
n
n
e
c
to
r
CAN
Transceiver
(U5/U13)
128 kB..1 MB (U4)
128kB..512kB (U2)
(U7)(U6)
(U8)(U3)
(U1)
(U11)
Analog Device
ADuC812
(ADuC824)
1
42
1
1 phyCORE specific
2 This feature is under development and is not available yet.
RTC
(U12)
RxD, TxD
RS-232
RS-232
Transceiver
(U9)
RS-485
RS-485
Transceiver
(U10)
/CS_Ext
I/O Port
(U14 Input)
(U15 Output)
Figure 1: Block Diagram phyCORE-ADuC812
2: This feature is under development and not available yet.

Introduction
PHYTEC Meßtechnik GmbH 2003 L-461e_3 7
1.2 View of the phyCORE-ADuC812
Figure 2:View of the phyCORE-ADuC812 (Top View)
PIN 1 A BFEDC
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
G
H
345
6789101112
R8
D3
D2
Q3
R2
J9 J10 J2
CB10 CB59 C5
XT1
R12
C19
R13
R20
U11
R9 R10
U15
U9
C16
CB58
CB9
C11
C10
C9
C12
J7 J5 J8
U5
U4
TP1
U1
CB8
CB57
J6
J3
J4
J12
XT2
CB7
R
24
Q5 CB60
R25
CB56
R22
R23
C23
D1
C20
C8
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
R19
R18
CB53
C15
C13
J13 J14
U12

phyCORE-AduC812
8PHYTEC Meßtechnik GmbH 2003 L-461e_3
Figure 3:View of the phyCORE-ADuC812 (Bottom View)
PIN 1
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
Q6
Q2
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
Q4
Q1
U13
U2
U7
U8
U10
U14
U6
U3
J11 J1
R35
CB6
CB54
R30
R29
C14
CB5
C18
RN2
C2
R3
R21
C21
RN1
C41
R36
CB51
R27
CB1
R26
C
24
CB4
CB52
R11
345
6
789101112
R37
R32
R33
R17
R16
R6 R7
C17
R1
R5
CB2
R7
CB3
C7
C40 C3
R28
R31 R34
CB55
C4
C1

Pin Description
PHYTEC Meßtechnik GmbH 2003 L-461e_3 9
2Pin Description
Please note that all module connections are not to exceed their
expressed maximum voltage or current. Maximum signal input values
are indicated in the corresponding controller User’s Manual/Data
Sheets. As damage from improper connections varies according to use
and application, it is the user's responsibility to take appropriate safety
measures to ensure that the module connections are protected from
overloading through connected peripherals.
As the Figure 4 indicates, all controller signals extend to standard-
width (2.54 mm) pin rows lining two sides the board (referred to as
phyCORE-connector). This allows the board to be plugged into any
target application like a "big chip".
Figure 4:Pinout of the phyCORE-Connector (Component Side)
PIN 1 A BFEDC
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
CLKIN CLKOUT /INT0
/INT1 GND
NC
NC
GND /CS1
/CS2 ALE /CS3
/RD GND /WR
A0 A1 A2
A3 GND A4
A5 GND A6
A7 A16A8 A17A9
A18A10 GND A19A11
A20A12 A21A13 A22A14
A23A15 GND AD0
AD1 GND AD2
AD3 AD4 AD5
AD6 GND AD7
A16 A17 A18
A19 GND A20
A21 GND A22
A23 /EA
NC
1
17
16
14
3
2
4
5
6
7
8
9
10
11
12
13
18
19
15
VCC VCC GND
NC NC
GND
NC NC
GND
VBAT VPD PFI
WDI GND PFO
BOOT /RES /RES
GND
NC
T1 GND IN0
IN1 IN2 IN3
IN4 GND IN5
RxD TxD IN6
CANTxD GND IN7
CANRxD GND B
CANH
ATxD0
CANL
GND RxD0
SCL SDA OUT0
OUT1 GND OUT2
OUT3 GND OUT4
OUT5 OUT6 OUT7
G
H
3456789101112
ADuC824
ADuC812
ADC0 AGND
DAC0 ADC2 VREF AVCC ADC4 AGND ADC7 DAC1
AGND VREF ADC1 ADC3 CREF ADC5 ADC6AGND
NC AGND
T2 AGND
ADC1 IEXC1 VREF+ AVCC ADC3 AGND /MISO ADC2
AGND VREF T2EXT IEXC2 VREF- ADC4 /SSAGND
NC AGND
T0

phyCORE-AduC812
10 PHYTEC Meßtechnik GmbH 2003 L-461e_3
A new numbering scheme for the pins on the phyCORE-connector
has been introduced with the phyCORE specifications. This enables
quick and easy identification of desired pins and minimizes errors
when matching pins on the phyCORE module with the receptacle
socket on the appropriate PHYTEC phyCORE Development
Board LD 5V or your OEM application.
The numbering scheme for the phyCORE-connector is based on a two
dimensional matrix in which column positions are identified by a
letter and row position by a number. Pin 1A, for example, is always
located in the upper left hand corner of the matrix. The pin numbering
values increase moving down on the board. Lettering of the pin
connector rows progresses alphabetically from left to right
(refer to Figure 5).
The numbered matrix can be aligned with the phyCORE-ADuC812
(viewed from above; phyCORE-connector header pins pointing
down) or with the socket of the phyCORE Development
Board LD 5V / target circuitry. The upper left hand corner of the
numbered matrix (Pin 1A) is thus covered with the corner of the
phyCORE-ADuC812 marked with a white triangle. The numbering
scheme is always in relation to the PCB as viewed from above, even if
all contacts extend to the bottom of the board.
The numbering scheme is thus consistent for both the module’s
phyCORE-connector as well as mating connectors on the phyCORE
Development Board LD 5V or target hardware, thereby considerably
reducing the risk of pin identification errors.
Since the pins are exactly defined according to the numbered matrix
previously described, the phyCORE-connector’s receptacle socket is
usually assigned a single designator for its position (X1 for example).
In this manner the phyCORE-connector comprises a single, logical
unit regardless of the fact that it could consist of more than one
physical connector. The location of row 1 on the board is marked by a
white triangle on the PCB to allow easy identification.

Pin Description
PHYTEC Meßtechnik GmbH 2003 L-461e_3 11
The following figure (see Figure 5) illustrates the numbered matrix
system. It shows a phyCORE-ADuC812 mounted on a phyCORE
Development Board LD 5V. The shaded area of the phyCORE-
connectors shown below indicates the remaining pins not used in
conjunction with the phyCORE-ADuC812 which, when plugged onto
the Development Board, does not span the entire length of the
receptacle socket. The phyCORE Development Board LD 5V can
house all phyCORE modules with standard-width (2.54 mm / 0.10 in.)
pin header rows and a maximum of 32 pins per pin header row, A, B,
C, D, E and F.
Figure 5: Numbered Matrix Overview of the phyCORE-Connector
(Viewed from Above)
Many of the controller port pins accessible at header pins along the
edges of the board have been assigned alternate functions that can be
activated via software.
A B C
11
D E F
G
H
114

phyCORE-AduC812
12 PHYTEC Meßtechnik GmbH 2003 L-461e_3
The following tables provide an overview of the pinout of the
phyCORE-connector and shows possible alternative functions of the
pins. Please refer to the microcontroller User’s Manual/Data Sheet
for details on the functions and features of controller signals and port
pins.
Pin Number Signal I/O Comments
Pin Row X1A
1A ClkIn I Optional external clock generator,
connected directly to XTAL1 of the µC
2A P3.3 (/INT1) I/O Port pin µC
3A NC Not used
4A /CS2 O Pre-decoded Chip Select signal #2
5A /RD O /RD signal
6A, 7A,
8A, 9A,
10A,
11A,
12A,
16A, 17A,
A18A, 19A
A0, A3,
A5, A7,
A18A10,
A20A12,
A23A15,
A16, A19,
A21, A23
OAddress line of µC or of the address latch
13A, 14A,
15A AD1, AD3, AD6 OAddress/data line of µC
Pin Row X1B
1B ClkOut - Connected directly to XTAL2 of the µC
2B, 3B, 5B, 7B,
8B, 10B, 12B,
13B, 15B,
17B, 18B
GND - Ground 0 V
4B ALE O Address latch enable output of µC
6B, 9B,
11B,16B A1, A16A8, A21A13, A17 OAddress line of µC or of the address latch
14B AD4 I/O Address/data line of µC
19B /EA I /EA pin of µC
Table 1: Pinout phyCORE-Connector A/B (ADuC812, ADuC824)