Phytec phyCORE-i.MX 6 User manual

A product of a PHYTEC Technology Holding company
phyCORE®-i.MX 6
Hardware Manual
Document No.: L-808e_2
SOM Prod. No.: PCM-058
SOM PCB. No.: 1429.3
Edition: August 2016

phyCORE®-i.MX 6 [PCM-058]
©PHYTEC Messtechnik GmbH 2016 L-808e_2
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accepts no liability for doing so.
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2nd Edition August 2016

Contents
©PHYTEC Messtechnik GmbH 2016 L-808e_2 i
List of Figures........................................................................................................... iii
List of Tables ............................................................................................................ iv
Conventions, Abbreviations and Acronyms ..................................................................... v
Preface .................................................................................................................. viii
1Introduction ...................................................................................................... 1
1.1 Features of the phyCORE-i.MX 6 ....................................................................... 1
1.2 Block Diagram.............................................................................................. 3
1.3 phyCORE-i.MX 6 Component Placement ............................................................. 4
1.4 Minimum Requirements to operate the phyCORE-i.MX 6 ........................................ 6
2Pin Description................................................................................................... 7
3Jumpers .......................................................................................................... 18
4Power.............................................................................................................. 22
4.1 Primary System Power (VDD_3V3) ...................................................................22
4.2 Power Management IC (PMIC) (U16) ................................................................22
4.2.1 Power Domains.................................................................................23
4.3 Supply Voltage for external Logic ....................................................................25
4.4 Backup Power (PMIC_VBAT/VDD_MX6_SNVS) ....................................................25
5Reset............................................................................................................... 26
6System Configuration and Booting....................................................................... 27
6.1 Boot Mode Selection ....................................................................................27
6.2 Boot Device Selection and Configuration ..........................................................28
7System Memory................................................................................................. 30
7.1 DDR3-SDRAM (U4-U7) ..................................................................................30
7.2 NAND Flash Memory (U12).............................................................................31
7.3 eMMC Flash Memory (U14).............................................................................31
7.4 I²C EEPROM (U11) ........................................................................................31
7.4.1 EEPROM Write Protection Control (J4)...................................................32
7.5 SPI Flash Memory (U9) )................................................................................32
8SD / MM Card Interfaces ..................................................................................... 33
9Serial Interfaces ............................................................................................... 34
9.1 Universal Asynchronous Interface ...................................................................34
9.2 USB OTG Interface........................................................................................35
9.3 USB Host Interface.......................................................................................35
9.4 Ethernet Interface .......................................................................................36
9.4.1 Ethernet PHY (U2).............................................................................36
9.4.2 Software Reset of the Ethernet Controller ..............................................37
9.4.3 MAC Address ....................................................................................37
9.4.4 RMII Interface..................................................................................38
9.5 SPI Interface...............................................................................................39
9.6 I2C Interface ...............................................................................................40
9.7 I2S Audio Interface (SSI))..............................................................................40
9.8 CAN Interface..............................................................................................41
9.9 SATA Interface ............................................................................................41
9.10 PCI Express Interface ....................................................................................42

phyCORE®-i.MX 6 [PCM-058]
ii ©PHYTEC Messtechnik GmbH 2016 L-808e_2
10 General Purpose I/Os ......................................................................................... 43
11 User LED .......................................................................................................... 44
12 Debug Interface ................................................................................................ 45
13 Display Interfaces ............................................................................................. 46
13.1 Parallel Display Interface.............................................................................. 46
13.2 LVDS Display Interface ................................................................................. 47
13.3 Supplementary Signals................................................................................. 47
14 High-Definition MultimediaInterface (HDMI)......................................................... 48
15 Camera Interfaces ............................................................................................. 49
15.1 Parallel 0 Camera Interface (CSI0 of IPU#1)...................................................... 51
15.2 Parallel 1 Camera Interface (CSI1 of IPU#2)...................................................... 52
15.3 MIPI/CSI-2 Camera Interface......................................................................... 53
15.4 Utilizing the Camera Interfaces on a Carrier Board ............................................. 54
16 Tamper Detection .............................................................................................. 55
17 Technical Specifications ..................................................................................... 56
17.1 Product Temperature Grades ......................................................................... 58
17.2 Connectors on the phyCORE-i.MX 6: ................................................................ 59
18 Hints for Integrating and Handling the phyCORE-i.MX 6.......................................... 60
18.1 Integrating the phyCORE-i.MX 6..................................................................... 60
18.2 Handling the phyCORE-i.MX 6 ........................................................................ 62
19 Revision History................................................................................................ 63
Index...................................................................................................................... 65

Contents
©PHYTEC Messtechnik GmbH 2016 L-808e_2 iii
List of Figures
Figure 1: Block Diagram of the phyCORE-i.MX 6.............................................................. 3
Figure 2: phyCORE-i.MX 6 Component Placement (top view) ............................................. 4
Figure 3: phyCORE-i.MX 6 Component Placement (bottom view)........................................ 5
Figure 4: Pinout of the phyCORE-Connector (top view) .................................................... 8
Figure 5: Typical Jumper Pad Numbering Scheme ..........................................................18
Figure 6: Jumper Locations (top view) ........................................................................19
Figure 7: Jumper Locations (bottom view)...................................................................20
Figure 8: Powering Scheme of the phyCORE- i.MX 6........................................................24
Figure 9: User LED Location (top view)........................................................................44
Figure 10: Camera Connectivity of the i.MX 6 (Solo/DualLite)............................................49
Figure 11: Camera Connectivity of the i.MX 6 (Dual Core/Quad Core)...................................49
Figure 12: Camera Interfaces at the phyCORE-Connector (Parallel 0(CSI0 of IPU#1),
Parallel 1(CSI1 of IPU#2), and MIPI/CSI-2) .....................................................50
Figure 13: Use of Parallel 0 (CSI0 of IPU#1) and Parallel 1 (CSI1 of IPU#2) as
phyCAM-P interface ....................................................................................54
Figure 14: Use of Parallel 0 (CSI0 of IPU#1) and Parallel 1 (CSI1 of IPU#2) as
phyCAM-S+ interface ..................................................................................54
Figure 15: Physical Dimensions (top view).....................................................................56
Figure 16: Footprint of the phyCORE-i.MX 6 ...................................................................61

phyCORE®-i.MX 6 [PCM-058]
iv ©PHYTEC Messtechnik GmbH 2016 L-808e_2
List of Tables
Table 1: Signal Types used in this Manual ................................................................... vi
Table 2: Abbreviations and Acronyms used in this Manual..............................................vii
Table 3: Pinout of the phyCORE-Connector X1, Row A ................................................... 10
Table 4: Pinout of the phyCORE-Connector X1, Row B................................................... 12
Table 5: Pinout of the phyCORE-Connector X1, Row C ................................................... 14
Table 6: Pinout of the phyCORE-Connector X1, Row D................................................... 16
Table 7: Jumper Settings ....................................................................................... 21
Table 8: Boot Modes of the phyCORE-i.MX 6 ............................................................... 27
Table 9: Boot Configuration Pins at the phyCORE-Connector.......................................... 29
Table 10: EEPROM write protection states via J4 ........................................................... 32
Table 11: Location of the SD / MM Card Interface Signals................................................ 33
Table 12: Location of the UART Signals ....................................................................... 34
Table 13: Location of the USB OTG Signals................................................................... 35
Table 14: Location of the USB Host Signals.................................................................. 35
Table 15: Location of the Ethernet Signals .................................................................. 36
Table 16: Location of the RMII Interface Signals........................................................... 38
Table 17: SPI Interface Signal Location....................................................................... 39
Table 18: I2C Interface Signal Location ....................................................................... 40
Table 19: I2S Interface Signal Location ....................................................................... 40
Table 20: CAN Interface Signal Location...................................................................... 41
Table 21: SATA Interface Signal Location .................................................................... 41
Table 22: PCIe Interface Signal Location ..................................................................... 42
Table 23: Location of GPIO Pins................................................................................. 43
Table 24: Debug Interface Signal Location at phyCORE-Connector X1................................ 45
Table 25: Parallel Display Interface Signal Location....................................................... 46
Table 26: LVDS Display Interface Signal Location.......................................................... 47
Table 27: Supplementary Signals to support the Display Connectivity ............................... 47
Table 28: HDMI Interface Signal Location.................................................................... 48
Table 29: Camera Interface Parallel 0 (IPU1_CSI0) Signal Location................................... 51
Table 30: Camera Interface Parallel 1 (IPU2_CSI1) Signal Location................................... 52
Table 31: Camera Interface MIPI/CSI-2 Signal Location.................................................. 53
Table 32: Technical Specifications ............................................................................. 57
Table 33: Product Temperature Grades........................................................................ 58

Conventions, Abbreviations and Acronyms
©PHYTEC Messtechnik GmbH 2016 L-808e_2 v
Conventions, Abbreviations and Acronyms
This hardware manual describes the PCM-058 System on Module in the following referred
to as phyCORE®-i.MX 6. The manual specifies the phyCORE®-i.MX 6's design and function.
Precise specifications for the NXP® Semiconductor i.MX 6 microcontrollers can be found in
the enclosed microcontroller Data Sheet/User's Manual.
Note: We refrain from providing detailed part specific information within this manual,
which can be subject to continuous changes, due to part maintenance for our products.
Please read the paragraph "Product Change Management and information in this
manual on parts populated on the SOM" within the Preface.
Note: The BSP delivered with the phyCORE®-i.MX 6 usually includes drivers and/or software
for controlling all components such as interfaces, memory, etc. Therefore programming
close to hardware at register level is not necessary in most cases. For this reason, this
manual contains no detailed description of the controller's registers, or information
relevant for software development. Please refer to the i.MX 6 Reference Manual, if such
information is needed to connect customer designed applications.
Conventions
The conventions used in this manual are as follows:
Signals that are preceded by an "n", "/", or “#”character (e.g.: nRD, /RD, or #RD), or
that have a dash on top of the signal name (e.g.: RD) are designated as active low
signals. That is, their active state is when they are driven low, or are driving low.
A "0" indicates a logic zero or low-level signal, while a "1" represents a logic one or
high-level signal.
The hex-numbers given for addresses of I2C devices always represent the 7 MSB of the
address byte. The correct value of the LSB which depends on the desired command
(read (1), or write (0)) must be added to get the complete address byte. E.g. given
address in this manual 0x41 => complete address byte = 0x83 to read from the device
and 0x82 to write to the device
Tables which describe jumper settings show the default position in bold, blue text.
Text in blue italic indicates a hyperlink within, or external to the document. Click these
links to quickly jump to the applicable URL, part, chapter, table, or figure.
References made to the phyCORE-Connector always refer to the high density Samtec
connector on the undersides of the phyCORE-i.MX 6 System on Module.

phyCORE®-i.MX 6 [PCM-058]
vi ©PHYTEC Messtechnik GmbH 2016 L-808e_2
Types of Signals
Different types of signals are brought out at the phyCORE-Connector. The following table
lists the abbreviations used to specify the type of a signal.
Signal Type Description Abbr.
Power Supply voltage input PWR_I
Ref-Voltage Reference voltage output REF_O
Input Digital input I
Output Digital output O
IO Bidirectional input/output I/O
OC-Bidir PU Open collector input/output with pull up OC-BI
OC-Output Open collector output without pull up, requires an external
pull up
OC
5V Input PD 5 V tolerant input with pull down 5V_PD
LVDS Input Differential line pairs 100 Ohm LVDS level input LVDS_I
LVDS Output Differential line pairs 100 Ohm LVDS level output LVDS_O
TMDS Output Differential line pairs 100 Ohm TMDS level output TMDS_O
USB IO Differential line pairs 90 Ohm USB level bidirectional
input/output
USB_I/O
ETHERNET
Input
Differential line pairs 100 Ohm Ethernet level input ETH_I
ETHERNET
Output
Differential line pairs 100 Ohm Ethernet level output ETH_O
ETHERNET IO Differential line pairs 100 Ohm Ethernet level bidirectional
input/output
ETH_I/O
PCIe Input Differential line pairs 100 Ohm PCIe level input PCIe_I
PCIe Output Differential line pairs 100 Ohm PCIe level output PCIe_O
MIPI CSI-2
Input
Differential line pairs 100 Ohm MIPI CSI-2 level input CSI-2_I
Table 1: Signal Types used in this Manual

Conventions, Abbreviations and Acronyms
©PHYTEC Messtechnik GmbH 2016 L-808e_2 vii
Abbreviations and Acronyms
Many acronyms and abbreviations are used throughout this manual. Use the table below to
navigate unfamiliar terms used in this document.
Abbreviation Definition
BSP Board Support Package (Software delivered with the Development Kit
including an operating system (Windows, or Linux) preinstalled on the
module and Development Tools).
CB Carrier Board; used in reference to the phyCORE Development Kit Carrier
Board.
DFF D flip-flop.
EMB External memory bus.
EMI Electromagnetic Interference.
GPI General purpose input.
GPIO General purpose input and output.
GPO General purpose output.
IRAM Internal RAM; the internal static RAM on the NXP® Semiconductor i.MX 6
microcontroller.
J Solder jumper; these types of jumpers require solder equipment to
remove and place.
JP Solderless jumper; these types of jumpers can be removed and placed by
hand with no special tools.
PCB Printed circuit board.
PDI PHYTEC Display Interface; defined to connect PHYTEC display adapter
boards, or custom adapters
PEB PHYTEC Extension Board
PMIC Power management IC
PoE Power over Ethernet
POR Power-on reset
RTC Real-time clock.
SMT Surface mount technology.
SOM System on Module; used in reference to the PCM-058 /phyCORE®-i.MX 6
module
Sx User button Sx (e.g. S1, S2, etc.) used in reference to the available user
buttons, or DIP-Switches on the carrier board.
Sx_y Switch y of DIP-Switch Sx; used in reference to the DIP-Switch on the
carrier board.
Table 2: Abbreviations and Acronyms used in this Manual

phyCORE®-i.MX 6 [PCM-058]
viii ©PHYTEC Messtechnik GmbH 2016 L-808e_2
Preface
As a member of PHYTEC's phyCORE®product family the phyCORE-i.MX 6 is one of a series of
PHYTEC System on Modules (SOMs) that can be populated with different controllers and,
hence, offers various functions and configurations. PHYTEC supports a variety of 8-/16-
and 32-bit controllers in two ways:
(1) as the basis for Rapid Development Kits which serve as a reference and evaluation
platform
(2) as insert-ready, fully functional phyCORE®OEM modules, which can be embedded
directly into the user’s peripheral hardware design.
Implementation of an OEM-able SOM subassembly as the "core" of your embedded design
allows you to focus on hardware peripherals and firmware without expending resources to
"re-invent" microcontroller circuitry. Furthermore, much of the value of the phyCORE®
module lies in its layout and test.
Production-ready Board Support Packages (BSPs) and Design Services for our hardware
will further reduce your development time and risk and allow you to focus on your product
expertise. Take advantage of PHYTEC products to shorten time-to-market, reduce
development costs, and avoid substantial design issues and risks. With this new innovative
full system solution you will be able to bring your new ideas to market in the most timely
and cost-efficient manner.
For more information go to:
http://www.phytec.de/de/leistungen/entwicklungsunterstuetzung.html or
http://www.phytec.eu/europe/oem-integration/evaluation-start-up.html

Preface
©PHYTEC Messtechnik GmbH 2016 L-808e_2 ix
Ordering Information
The part numbering of the phyCORE has the following structure:
PCM- 058-xxxxxx.Ay
Product number (consecutive)
Assembly options (depending on model) 1
Version number
Product Specific Information and Technical Support
In order to receive product specific information on changes and updates in the best way
also in the future, we recommend to register at
http://www.phytec.de/de/support/registrierung.html or
http://www.phytec.eu/europe/support/registration.html
For technical support and additional information concerning your product, please visit the
support section of our web site which provides product specific information, such as errata
sheets, application notes, FAQs, etc.
http://www.phytec.de/support/knowledge-database/soms-system-on-
modules/phycore/phycore-imx-6/
or
http://www.phytec.eu/europe/support/faq/faq-phyCORE-i.MX6.html
1: Assembly options include choice of Controller; RAM (Size/Type); Size of NAND Flash, etc.; Interfaces available;
Vanishing; Temperature Range; and other features. Please contact our sales team to get more information on the ordering
options available.

phyCORE®-i.MX 6 [PCM-058]
x©PHYTEC Messtechnik GmbH 2016 L-808e_2
Declaration of Electro Magnetic Conformity of the PHYTEC phyCORE®-i.MX 6
PHYTEC System on Module (henceforth products) are designed for installation
in electrical appliances or as dedicated Evaluation Boards (i.e.: for use as a test and
prototype platform for hardware/software development) in laboratory environments.
Caution!
PHYTEC products lacking protective enclosures are subject to damage by ESD and, hence,
may only be unpacked, handled or operated in environments in which sufficient
precautionary measures have been taken in respect to ESD-dangers. It is also necessary
that only appropriately trained personnel (such as electricians, technicians and engineers)
handle and/or operate these products. Moreover, PHYTEC products should not be operated
without protection circuitry if connections to the product's pin header rows are longer
than 3 m.
PHYTEC products fulfill the norms of the European Union’s Directive for Electro Magnetic
Conformity only in accordance to the descriptions and rules of usage indicated in this
hardware manual (particularly in respect to the pin header row connectors, power
connector and serial interface to a host-PC).
Implementation of PHYTEC products into target devices, as well as user modifications and
extensions of PHYTEC products, is subject to renewed establishment of conformity to, and
certification of, Electro Magnetic Directives. Users should ensure conformance following
any modifications to the products as well as implementation of the products into target
systems.

Preface
©PHYTEC Messtechnik GmbH 2016 L-808e_2 xi
Product Change Management and information in this manual on parts populated on
the SOM / SBC
When buying a PHYTEC SOM / SBC, you will, in addition to our HW and SW offerings, receive
a free obsolescence maintenance service for the HW we provide.
Our PCM (Product Change Management) Team of developers, is continuously processing,
all incoming PCN's (Product Change Notifications) from vendors and distributors
concerning parts which are being used in our products.
Possible impacts to the functionality of our products, due to changes of functionality or
obsolesce of a certain part, are being evaluated in order to take the right masseurs in
purchasing or within our HW/SW design.
Our general philosophy here is: We never discontinue a product as long as there is
demand for it.
Therefore we have established a set of methods to fulfill our philosophy:
Avoiding strategies
•Avoid changes by evaluating long-livety of parts during design in phase.
•Ensure availability of equivalent second source parts.
•Stay in close contact with part vendors to be aware of roadmap strategies.
Change management in rare event of an obsolete and non replaceable part
•Ensure long term availability by stocking parts through last time buy management
according to product forecasts.
•Offer long term frame contract to customers.
Change management in case of functional changes
•Avoid impacts on product functionality by choosing equivalent replacement parts.
•Avoid impacts on product functionality by compensating changes through HW redesign
or backward compatible SW maintenance.
•Provide early change notifications concerning functional relevant changes of our
products.
Therefore we refrain from providing detailed part specific information within this
manual, which can be subject to continuous changes, due to part maintenance for our
products.
In order to receive reliable, up to date and detailed information concerning parts used
for our product, please contact our support team through the contact information
given within this manual.

phyCORE®-i.MX 6 [PCM-058]
xii ©PHYTEC Messtechnik GmbH 2016 L-808e_2

Introduction
©PHYTEC Messtechnik GmbH 2016 L-808e_2 1
1Introduction
The phyCORE-i.MX 6 belongs to PHYTEC’s phyCORE System on Module family. The
phyCORE SOMs represent the continuous development of PHYTEC System on Module
technology. Like its mini-, micro- and nanoMODUL predecessors, the phyCORE boards
integrate all core elements of a microcontroller system on a subminiature board and are
designed in a manner that ensures their easy expansion and embedding in peripheral
hardware developments.
As independent research indicates that approximately 70 % of all EMI (Electro Magnetic
Interference) problems stem from insufficient supply voltage grounding of electronic
components in high frequency environments, the phyCORE board design features an
increased pin package. The increased pin package allows dedication of approximately 20 %
of all connector pins on the phyCORE boards to Ground. This improves EMI and EMC
characteristics and makes it easier to design complex applications meeting EMI and EMC
guidelines using phyCORE boards even in high noise environments.
phyCORE boards achieve their small size through modern SMD technology and multi-layer
design. In accordance with the complexity of the module, 0402-packaged SMD
components and laser-drilled microvias are used on the boards, providing phyCORE users
with access to this cutting edge miniaturization technology for integration into their own
design.
The phyCORE-i.MX 6 is a subminiature (40 mm x 50 mm) insert-ready System on Module
populated with the NXP® Semiconductor i.MX 6 microcontroller. Its universal design
enables its insertion in a wide range of embedded applications. All controller signals and
ports extend from the controller to high-density pitch (0.5 mm) connectors aligning two
sides of the board, allowing it to be plugged like a "big chip" into a target application.
Precise specifications for the controller populating the board can be found in the
applicable controller reference manual or datasheet. The descriptions in this manual are
based on the NXP® Semiconductor i.MX 6. No description of compatible microcontroller
derivative functions is included, as such functions are not relevant for the basic
functioning of the phyCORE-i.MX 6.
1.1 Features of the phyCORE-i.MX 6
The phyCORE-i.MX 6 offers the following features:
•Insert-ready, sub-miniature (40 mm x 50 mm) System on Module (SOM) subassembly
in low EMI design, achieved through advanced SMD technology
•Populated with the NXP® Semiconductor i.MX 6 microcontroller (BGA624 packaging)
•1.0 GHz core clock frequency (optional 1.2 GHz)
•Boot from different memory devices (NAND Flash (standard))

phyCORE®-i.MX 6 [PCM-058]
2©PHYTEC Messtechnik GmbH 2016 L-808e_2
•Controller signals and ports extend to two high-density (0.5 mm) Samtec connectors
aligning two sides of the board, enabling the phyCORE-i.MX 6 to be plugged like a "big
chip" into target application
•Single supply voltage of +3.3 V with on-board power management
•All controller required supplies are generated on board
•Improved interference safety achieved through multi-layer PCB technology and
dedicated ground pins
•512 MB (up to 2 GB2) DDR3 SDRAM
•256 MB (up to 16 GB2) on-board NAND Flash
•Alternatively 2 GB (up to 32 GB2) on-board eMMC
•16 MB2on-board serial Flash (bootable)
•4 kB2I2C EEPROM
•Two serial interfaces (TTL). One with 4 lines allowing simple hardware handshake
•High-Speed USB OTG interface
•High-Speed USB HOST interface
•10/100/1000 Mbit Ethernet interface.Either with Ethernet transceiver on the
phyCORE-i.MX 6 allowing for direct connection to an existing Ethernet network, or
without on-board transceiver and provision of the RMII signals at TTL-level at the
phyCORE-Connector instead3
•I2C interface
•Two SPI interfaces
•PCIe interface
•I2S interface
•SPDIF interface
•PWM output
•CAN interface
•Two 4 channel LVDS (24 bit) LCD-interfaces
•Parallel LCD-interface with up to 24-bit
•HDMI interface
•Up to two parallel camera interfaces
•MIPI CSI camera interface
•Two SD/MMC card interfaces (1 x 8 bit, 1 x 4 bit)
•SATA interface
•JTAG interface
•One user programmable LED
•Several dedicated GPIOs4
•Power Management IC (PMIC)
•Available for different temperature grades (section 17.1)
2: The maximum memory size listed is as of the printing of this manual. Please contact PHYTEC for more information about additional, or
new module configurations available.
3: Please refer to the order options described in the Preface, or contact PHYTEC for more information about additional module confi-
gurations.
4: Almost every controller port which connects directly to the phyCORE-Connector may be used as GPIO by using the i.MX 6's pin muxing
options.

Introduction
©PHYTEC Messtechnik GmbH 2016 L-808e_2 3
1.2 Block Diagram
Figure 1: Block Diagram of the phyCORE-i.MX 65
5: The specified direction indicated refers to the standard phyCORE use of the pin.

phyCORE®-i.MX 6 [PCM-058]
4©PHYTEC Messtechnik GmbH 2016 L-808e_2
1.3 phyCORE-i.MX 6 Component Placement
Figure 2: phyCORE-i.MX 6 Component Placement (top view)
R111
R16
R148
C35 C28 C15 C5
C319
R110
R145
C85
R26
R27
R45C103
C7
C88
C320
C323
C80
C75
R17 R22 R18
C73
R113 R112
R15
C303
C108
C313
C110
C322C321
C310
C301
C63
R108
R144
R37 R49 R50
R104
C325
C326
C61
R12
C308
R122R116
C284 C66 C283
C302
R123
R14
R21 R19
C40
C67
C65
R20
R38
C42
C294
C43
C298
C296
R139
R135
R140
R146
R136
R141
C121
C49
C297
R149
C2
C1 R24 R25
R121
R129
R114
R115
R13
R109
R150
C95C100
R125
R124
C11
R132
C318
C324
C3
R28
R29
C81
C8
C316
C317
C91
C17 C50 C90
C86
C105 R43
C106 C31
C99 C10
C79 C13
C89 C36
C20
R47 R48
C285
2
1
2
1 2 3
13
TP11
L8
C245
U18
D1
R137
J4
C293
U20
XT1
U19
C247
U14
C291
L3
C238
L9
Q6
Q2
C289
C292
U1
Z5
C237
R138
L4
C218
C242
U8
Z2
U4
J6
Q8
L5
C219
C241
L2
C220
U6
C290
C221
L7
XT2
C216
Q5
U12
U16
U11
Z4
Q7
C288
C246 C262
J3
U9
DMC1
C236
L6
Q3

Introduction
©PHYTEC Messtechnik GmbH 2016 L-808e_2 5
Figure 3: phyCORE-i.MX 6 Component Placement (bottom view)
R90
C266
U7
C179
C138
R119
C222
R1
C260
R55
C119
R53
U2
C154
C165
TP7
R60
TP6
C54
C26
C279
C307
R74
C311
C183
C164
U5
R94
C126
C231
C32
C240
C257
C60
C140
R66
C18
R67
C232
R54
C271
C155
TP9
R51
C56
C188
J1
C268
C205
C157
C251
C185
C272
C196
R98
C211
C180
R127
C145
C210
C204
Z1
C51 R41
R100 R65
R2
C227
C109
C259
C267
C190
C278
R117
C122
C263
C143
R101
X1
C76
C104
R102
C177
C141
C209
C123
C213
R79
R89
R56
C111
R76
R42
R31
R83
C118
C16
U10
C178
C189
C199 C101
C223
C64
R59
R105
R92
C137
C39
C37
C171
C193
C77
C249
R34
C159
C47
C149
C170
R118
R3
C243
C273
C206
C306
R99
C4
C175 C129
C264
C34
C248
R4
R77
C46
R131
C233
C230
R95
C229
C287
XT4
R80
TP5
C116
C208
R88
C92
C41
C151
C254
C146
C226
C68 C276
C191
C74
TP1
C94
C72
C163
R93
C239
R39
TP4
R71
R107
C19
C93
C195
C275
R130
R69
C133
C203
C198
C280
C78
C212
R52
C6
C107
R68
C102
R36
C150
C97
C228
C29
C261
C71
C44
C144
C244
C113
TP2
C96
TP8
C30
C225
C300
C184
C314
R9
C162
C253
R82
J2 C14 C23
C252
C166
C214
C38
C135
Z3
C131
C127
R7
C115 R44
C120
C114
C132
R57
C48
C161
C134
L1
C117
C192
C167
R61
C128
C55
R63
C234
C156
R33
C258
R97
C25
C147
C59
C87
C281
R70
C24
TP10
C69
DMC2
C148
C12
R84
R5
C33
R86
C172
R58
C270
R120
C158
C200
U15
R23
R30
C186
C194
C282
C98
C207
C168
R10
R103
R128
R72
C125
C45
R73
C169
C274
C295
C130
R78
R87
C299
C286
C304
C27
C142
C62
C173
C152
C174
C256
R75
C136
R126
R35
C217
C269
C181
C182
R81
C197
R32
C176
C52
C265
C112
C277
R8
C309
C305
R96
R46
R64
XT3
R91
C255
C224
C21
R62
C201
C312
C57
C82
C160
C53
C202
C187
R85
C250
C124
C58
C83
U13
C139
R11
R6
C22
1
2
3
1
2
3
C70
X1
X1
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C66
C67
C68
C69
C70
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
D64
D65
D66
D67
D68
D69
D70
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
R134
C62
C235
C215
C9
C153
C84

phyCORE®-i.MX 6 [PCM-058]
6©PHYTEC Messtechnik GmbH 2016 L-808e_2
1.4 Minimum Requirements to operate the phyCORE-i.MX 6
Basic operation of the phyCORE-i.MX 6 only requires supply of a +3.3 V input voltage with
typical 2.5 A load and the corresponding GND connection.
These supply pins are located at the phyCORE-Connector X1:
VDD_3V3: X1 A1, A2, A3, A4, B1, B2, B3, B4
Connect all +3.3 V VCC input pins to your power supply and at least the matching number of
GND pins.
Corresponding GND: X1 A6, A11, A16, A21, B6, B12, B17, B22
Please refer to section 2for information on additional GND Pins located at the phyCORE-
Connector X1.
Caution!
We recommend connecting all available +3.3 V input pins to the power supply system on a
custom carrier board housing the phyCORE-i.MX 6 and at least the matching number of
GND pins neighboring the +3.3 V pins.
In addition, proper implementation of the phyCORE-i.MX 6 module into a target
application also requires connecting all GND pins.
Please refer to section 4for more information.