Texas Instruments Serial Programming Adapter MSP430 User manual

MSP430 Memory Programming
User's Guide
Literature Number: SLAU265February 2009

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Contents
1 Overview of MSP430 Programming .............................................................................. 9
2 MSP430 Programming Via the Bootstrap Loader .......................................................... 112.1 Introduction .................................................................................................................. 112.2 Standard RESET and BSL Entry Sequence ............................................................................ 122.2.1 MSP430 20-Pin and 28-Pin Flash Devices With Shared JTAG Pins ....................................... 122.2.2 MSP430 Flash Devices With Dedicated JTAG Pins .......................................................... 132.3 UART Protocol .............................................................................................................. 13
3 ROM-Based Bootstrap Loader Protocol ....................................................................... 153.1 Synchronization Sequence ................................................................................................ 153.2 Commands .................................................................................................................. 153.2.1 Unprotected Commands ......................................................................................... 153.2.2 Password Protected Commands ................................................................................ 153.3 Programming Flow ......................................................................................................... 163.4 Data Frame ................................................................................................................. 173.4.1 Data-Stream Structure ............................................................................................ 173.4.2 Checksum .......................................................................................................... 183.4.3 Example Sequence ............................................................................................... 183.4.4 Commands – Detailed Description .............................................................................. 183.5 Loadable BSL ............................................................................................................... 223.6 Exiting the BSL ............................................................................................................. 233.7 Password Protection ....................................................................................................... 233.8 Code Protection Fuse ...................................................................................................... 233.9 BSL Internal Settings and Resources ................................................................................... 243.9.1 Chip Identification and BSL Version ............................................................................ 243.9.2 Vectors to Call the BSL Externally .............................................................................. 243.9.3 Initialization Status ................................................................................................ 243.9.4 Memory Allocation and Resources.............................................................................. 25
4 Flash-Based Bootstrap Loader Protocol ...................................................................... 274.1 BSL Data Packet ........................................................................................................... 274.2 Timer_A UART Peripheral Interface (PI) ................................................................................ 274.2.1 Wrapper ............................................................................................................ 274.2.2 Abbreviations ...................................................................................................... 274.2.3 Messages .......................................................................................................... 284.2.4 Interface Specific Commands ................................................................................... 284.3 BSL Core Command Structure ........................................................................................... 294.3.1 Abbreviations ...................................................................................................... 294.3.2 Command Descriptions ........................................................................................... 294.4 BSL Security ................................................................................................................ 304.5 BSL Core Responses ...................................................................................................... 314.5.1 Abbreviations ...................................................................................................... 31
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4.5.2 BSL Core Messages .............................................................................................. 314.5.3 BSL Version Number ............................................................................................. 324.5.4 Example Sequences .............................................................................................. 32
5 Bootstrap Loader Hardware ....................................................................................... 335.1 Hardware Description ...................................................................................................... 335.1.1 Power Supply ...................................................................................................... 335.1.2 Serial Interface ..................................................................................................... 345.1.3 Target Connector .................................................................................................. 355.1.4 Parts List ........................................................................................................... 36
6 Differences Between Devices and Bootstrap Loader Versions ....................................... 376.1 Special Consideration for the MSP430F543x BSL .................................................................... 376.2 Special Consideration for ROM BSL Version 1.10 .................................................................... 376.3 BSL Known issues ......................................................................................................... 38
7 Bootstrap Loader PCB Layout Suggestion .................................................................. 47
8 MSP430 Programming Via the JTAG Interface .............................................................. 518.1 Introduction .................................................................................................................. 518.2 Interface and Instructions ................................................................................................. 528.2.1 JTAG Interface Signals ........................................................................................... 528.2.2 JTAG Access Macros ............................................................................................. 548.2.3 Spy-Bi-Wire (SBW) Timing and Control ....................................................................... 578.2.4 JTAG Communication Instructions .............................................................................. 618.3 Memory Programming Control Sequences ............................................................................. 668.3.1 Start-Up ............................................................................................................. 668.3.2 General Device (CPU) Control Functions ...................................................................... 698.3.3 Accessing Non-Flash Memory Locations With JTAG ........................................................ 778.3.4 Programming the Flash Memory (Using the Onboard Flash Controller) ................................... 818.3.5 Erasing the Flash Memory (Using the Onboard Flash Controller) .......................................... 868.3.6 Reading From Flash Memory .................................................................................... 908.3.7 Verifying the Flash Memory ...................................................................................... 908.4 JTAG Access Protection .................................................................................................. 908.4.1 Burning the JTAG Fuse - Function Reference for 1xx/2xx/4xx Families ................................... 908.4.2 Programming the JTAG Lock Key - Function Reference for 5xx Family................................... 928.4.3 Testing for a Successfully Protected Device .................................................................. 938.5 JTAG Function Prototypes ................................................................................................ 938.5.1 Low-Level JTAG Functions ...................................................................................... 938.5.2 High-Level JTAG Routines ....................................................................................... 958.6 References .................................................................................................................. 998.7 Third-Party Support ........................................................................................................ 99
9 JTAG Programming Hardware and Software Implementation ....................................... 1019.1 Implementation History ................................................................................................... 1019.2 Implementation Overview ................................................................................................ 1019.3 Software Operation ....................................................................................................... 1029.4 Software Structure ........................................................................................................ 1039.5 Programmer Operation ................................................................................................... 1059.6 Hardware Setup ........................................................................................................... 1059.6.1 Host Controller ................................................................................................... 1059.6.2 Target Connection ............................................................................................... 105
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9.6.3 Host Controller/Programmer Power Supply .................................................................. 107
10 Internal MSP430 JTAG Implementation ...................................................................... 10910.1 TAP Controller State Machine .......................................................................................... 10910.2 MSP430 JTAG Restrictions (Non-Compliance With IEEE Std 1149.1) ............................................ 109
A Errata and Revision Information ............................................................................... 111
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List of Figures
2-1 Standard RESET Sequence .............................................................................................. 122-2 BSL Entry Sequence at Shared JTAG Pins ............................................................................ 122-3 BSL Entry Sequence at Dedicated JTAG Pins ......................................................................... 135-1 Bootstrap Loader Interface Schematic .................................................................................. 337-1 Universal BSL Interface PCB Layout, Top .............................................................................. 477-2 Universal BSL Interface PCB Layout, Bottom .......................................................................... 477-3 Universal BSL Interface Component Placement ....................................................................... 487-4 Universal BSL Interface Component Placement ....................................................................... 498-1 Spy-Bi-Wire Basic Concept ............................................................................................... 538-2 Timing Example for IR_SHIFT (0x83) Instruction ...................................................................... 548-3 Data Register I/O: DR_SHIFT16 (0x158B) (TDO Output Is 0x55AA) ............................................... 558-4 Address Register I/O: DR_SHIFT20 (0x12568) (TDO Output Is 0xA55AA) ........................................ 568-5 SetTCLK ..................................................................................................................... 568-6 ClrTCLK ..................................................................................................................... 568-7 Timing Diagram (Alternative Timing) .................................................................................... 578-8 SBW-to-JTAG Interface Diagram ........................................................................................ 588-9 Detailed SBW Timing Diagram ........................................................................................... 598-10 Synchronization of TDI/TCLK During Run-Test/Idle ................................................................... 608-11 JTAG Access Entry Sequences (for Devices Supporting SBW) ..................................................... 678-12 Fuse Check and TAP Controller Reset .................................................................................. 688-13 Accessing Flash Memory.................................................................................................. 848-14 Flash Access Code Binary Image Map .................................................................................. 858-15 Fuse Blow Timing .......................................................................................................... 929-1 Replicator Application Schematic ....................................................................................... 10610-1 TAP Controller State Machine .......................................................................................... 109
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List of Tables
3-1 Data Frame of BSL Commands .......................................................................................... 173-2 Recommendations for MSP430F149 ['F449] (T
A
= 25 °C, V
CC
= 3.0 V, f
max
= 6.7 MHz) .......................... 213-3 Recommendations for MSP430F2131 (T
A
= 25 °C, V
CC
= 3.0 V, f
max
= 6.7 MHz) .................................. 214-1 UART Protocol Interface .................................................................................................. 274-2 UART Error Messages..................................................................................................... 284-3 BSL Core Commands ..................................................................................................... 294-4 BSL Core Responses ...................................................................................................... 314-5 BSL Core Messages ....................................................................................................... 315-1 Serial-Port Signals and Pin Assignments ............................................................................... 345-2 RS-232 Levels .............................................................................................................. 345-3 Pin Assignment of Target Connector .................................................................................... 355-4 Universal BSL Interface Parts List ....................................................................................... 366-1 BSL Version 1.10 on F13x, F14x(1), F11x, and F11x1 ............................................................... 396-2 BSL Version 1.30 on F41x, F11x, and F11x1 .......................................................................... 406-3 BSL Version 1.40 on F12x ................................................................................................ 416-4 BSL Version 1.60 on F11x2, F12x2, F43x, F44x, FE42x, FW42x, FG43x, F415, F417 .......................... 426-5 BSL Version 1.61 on F16x, F161x, F42x0, F149 rev AA (and later) ................................................ 436-6 BSL Version 2.02 on F21xx, F22xx, F24x, F23x ....................................................................... 446-7 BSL Version 2.12/2.13 on FG46xx, F261x, F471xx .................................................................. 456-8 Flash BSL Software Version Codes ..................................................................................... 458-1 Standard 4-Wire JTAG Signals ........................................................................................... 528-2 JTAG Signal Implementation Overview ................................................................................. 538-3 JTAG Communication Macros ............................................................................................ 548-4 Memory Access Instructions .............................................................................................. 618-5 JTAG Control Signal Register for 1xx/2xx/4xx Families .............................................................. 638-6 JTAG Control Signal Register for 5xx Family .......................................................................... 648-7 Shared JTAG Device Pin Functions ..................................................................................... 668-8 Erase/Program Minimum TCLK Clock Cycles .......................................................................... 818-9 Flash Memory Parameters (f
FTG
= 450 kHz) ............................................................................ 888-10 MSP430 Device JTAG Interface (Shared Pins) ........................................................................ 908-11 MSP430 Device Dedicated JTAG Interface ............................................................................ 908-12 JTAG Features Across Device Families ................................................................................ 98A-1 Revision History ........................................................................................................... 111
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List of Tables8 SLAU265 – February 2009Submit Documentation Feedback

Chapter 1SLAU265 – February 2009
Overview of MSP430 Programming
Most MSP430 devices have nonvolatile flash memory that can store data or machine code for execution.This flash can be written using three primary methods: the MSP430 CPU/DMA, JTAG, or the bootstraploader (BSL).
Due to differences among the device families, flash programming via the CPU or DMA is excluded fromthis user's guide. Information regarding this can be found in the family-specific user's guide for the devicebeing used.
This user's guide focuses on the programming of MSP430 flash using JTAG and the BSL. The chapterthat describes JTAG programming can be applied to all supported MSP430 families. BSL programming onthe MSP430 can be broken into two primary methods: using the ROM-based BSL of the 1xx, 2xx, and 4xxfamilies, and using the flash-based BSL of the 5xx family. While each methods has its own protocol andthus separate chapter, the hardware and reset sequences are common across all devices. The chaptersthat describe reset and hardware can, therefore, be applied to all families of BSL.
The goal of this user's guide is to remain general so as to cover all flash-based MSP430 devices. Thespecific details of flash properties, timing, and other operating conditions can be found in thedevice-specific data sheets.
Associated code files and additional information are available from http://www.ti.com/lit/zip/slau265 .
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