Texas Instruments TPS38700Q1EVM User manual

User’s Guide
TPS38700Q1EVM Voltage Sequencer
ABSTRACT
This user guide describes the operational use of the TPS38700Q1EVM evaluation module (EVM) as a reference
design for engineering demonstration and evaluation of the TPS38700-Q1 Multichannel I2C Programmable
Voltage Sequencer. This guide contains the EVM schematic, bill of materials (BOM), assembly drawing, and top
and bottom board layouts.
Table of Contents
1 Introduction.............................................................................................................................................................................3
1.1 Related Documentation......................................................................................................................................................4
1.2 TPS38700-Q1 Applications................................................................................................................................................4
2 Schematic, Bill of Materials, and Layout.............................................................................................................................. 5
2.1 TPS38700Q1EVM Schematic............................................................................................................................................6
2.2 TPS38700Q1EVM Bill of Materials.................................................................................................................................... 8
2.3 Layout and Component Placement..................................................................................................................................10
2.4 Layout.............................................................................................................................................................................. 10
3 EVM Connectors................................................................................................................................................................... 17
3.1 EVM Test Points...............................................................................................................................................................17
3.2 EVM Jumpers...................................................................................................................................................................18
4 EVM Setup and Operation....................................................................................................................................................19
4.1 Setup and GUI Installations............................................................................................................................................. 19
4.2 GUI...................................................................................................................................................................................25
4.3 Quick Start....................................................................................................................................................................... 28
5 Revision History................................................................................................................................................................... 31
List of Figures
Figure 1-1. TPS38700Q1EVM Board Top................................................................................................................................... 3
Figure 1-2. TPS38700Q1EVM Board Bottom..............................................................................................................................4
Figure 2-1. TPS38700Q1EVM Schematic 1 of 2......................................................................................................................... 6
Figure 2-2. TPS38700Q1EVM Schematic 2 of 2......................................................................................................................... 7
Figure 2-3. Component Placement—Top Assembly..................................................................................................................10
Figure 2-4. Component Placement—Bottom Assembly.............................................................................................................11
Figure 2-5. Layout—Top............................................................................................................................................................ 12
Figure 2-6. Layout—Bottom.......................................................................................................................................................13
Figure 2-7. Top Layer.................................................................................................................................................................14
Figure 2-8. Bottom Layer........................................................................................................................................................... 15
Figure 2-9. Top Solder Mask......................................................................................................................................................16
Figure 3-1. Jumper Settings...................................................................................................................................................... 18
Figure 4-1. EVM Connections for Testing EN1 and EN2........................................................................................................... 20
Figure 4-2. Welcome Setup Window......................................................................................................................................... 21
Figure 4-3. Setup License Agreement Window......................................................................................................................... 21
Figure 4-4. Setup Destination Window...................................................................................................................................... 22
Figure 4-5. Setup Window - Start Menu Selection.....................................................................................................................22
Figure 4-6. Setup Window - Additional Tasks............................................................................................................................ 23
Figure 4-7. Setup Installation Window....................................................................................................................................... 23
Figure 4-8. Installation Complete Window................................................................................................................................. 24
Figure 4-9. Main GUI Screen.....................................................................................................................................................25
Figure 4-10. System Config....................................................................................................................................................... 25
Figure 4-11. Sequence Config................................................................................................................................................... 26
Figure 4-12. Watchdog Config...................................................................................................................................................26
Figure 4-13. Alarms Config........................................................................................................................................................27
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Figure 4-14. Registers............................................................................................................................................................... 27
Figure 4-15. Fusion Welcome Window......................................................................................................................................28
Figure 4-16. Fusion Scan Window.............................................................................................................................................29
Figure 4-17. Fusion Scan Selection Window.............................................................................................................................29
Figure 4-18. Fusion Scan Window - Scanning for TPS38700Q1EVM.......................................................................................30
Figure 4-19. Fusion Scan Window - Scan for TPS38700Q1EVM Completed........................................................................... 30
Figure 4-20. TPS38700 GUI Window - Sequence Config Tab...................................................................................................31
Figure 4-21. Expected Output Signal.........................................................................................................................................31
List of Tables
Table 2-1. BOM............................................................................................................................................................................8
Table 3-1. Test Points................................................................................................................................................................ 17
Table 3-2. List of On-board Jumpers......................................................................................................................................... 18
Trademarks
All trademarks are the property of their respective owners.
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1 Introduction
The TPS38700Q1EVM is an evaluation module (EVM) for the TPS38700-Q1 Multichannel I2C Programmable
Voltage Sequencer. Test points are provided to give the user additional access, if needed, for oscilloscope or
multi-meter measurements.
The TPS38700Q1EVM comes pre-populated with TPS38700C03ARGERQ1. This option offers NEM_PD pin
which allow the system to issue an emergency power down while also being able to sequence up to ten different
devices all with a precise predefined sequence. The device also offers the option of battery backup power, a
precise 32.768 kHz clock, and the ability to communicate faults via I2C. ACT and SLEEP pins allow for the
device to change state depending on the logic level present on each. The NIRQ pin serves as an interrupt flag to
alert the system to possible faults, and the NRST pin asserts logic high under reset condition.
Figure 1-1. TPS38700Q1EVM Board Top
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Figure 1-2. TPS38700Q1EVM Board Bottom
1.1 Related Documentation
Datasheet: TPS38700-Q1 Multichannel I2C Programmable Voltage Sequencer
1.2 TPS38700-Q1 Applications
•Advanced Driver Assistance System (ADAS)
•Medical robotics
•Industrial robotics
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2 Schematic, Bill of Materials, and Layout
This section provides a detailed description of the TPS38700Q1EVM schematic, bill of materials (BOM), and
layout.
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2.1 TPS38700Q1EVM Schematic
Figure 2-1. TPS38700Q1EVM Schematic 1 of 2
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Figure 2-2. TPS38700Q1EVM Schematic 2 of 2
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2.2 TPS38700Q1EVM Bill of Materials
Table 2-1. BOM
DESIGNATOR QTY VALUE DESCRIPTION PACKAGE
REFERENCE PART NUMBER MANUFACTURER
PCB 1 Printed Circuit Board LP048 Any
C1, C2, C13,
C15, C16
5 10 µF 10 µF ±10% 25 V Ceramic
Capacitor X7S 0805 (2012
Metric)
0805 C2012X7S1E106K125AC TDK
C3, C4, C14 3 0.1 µF 0.1 µF ±10% 10 V Ceramic
Capacitor X7R 0402 (1005
Metric)
0402 885012205018 Wurth Electronics
C5, C6 2 12 pF CAP, CERM, 12 pF, 50 V, +/-
5%, C0G/NP0, 0201
0201 GRM0335C1H120JA01D MuRata
C7, C9, C10 3 0.1 µF CAP, CERM, 0.1 µF, 50 V, +/-
10%, X7R, 0603
0603 06035C104KAT2A AVX
C8 1 10 µF 10 µF ±10% 10 V Ceramic
Capacitor X5R 0603 (1608
Metric)
0603 C1608X5R1A106K080AC TDK
C11, C12 2 100 pF CAP, CERM, 100 pF, 50 V, +/-
5%, C0G/NP0, 0603
0603 06035A101JAT2A AVX
D1, D2 2 Red LED, Super Red, SMD SMD 150060SS75000 Wurth Elektronik
FID1, FID2, FID3 3 Fiducial mark. There is nothing
to buy or mount.
N/A N/A
H1, H2, H3, H4 4 Bumpon, Hemisphere, 0.44 X
0.20, Clear
SJ-5303 (CLEAR) 3M
J1, J2, J5 3 Terminal Block, 5.08 mm, 2x1,
Brass, TH
2x1 TH ED120/2DS On-Shore Technology
J3, J4, J6, J7, J8,
J9, J10, J11, J12,
J13, J14, J15,
J16, J17, J18
15 Header, 100mil, 3x1, Gold, TH 3x1 TH TSW-103-07-G-S Samtec
J19 1 Header (shrouded), 100mil, 5x2,
Gold, TH
5x2 TH 5103308-1 TE Connectivity
J20, J21, J22,
J23, J24, J25,
J26, J27, J28,
J29, J30, J31,
J32, J34, J35
15 Header, 100mil, 2x1, Gold, TH 2x1 TH TSW-102-07-G-S Samtec
LBL1 1 Thermal Transfer Printable
Labels, 0.650" W x 0.200" H -
10,000 per roll
THT-14-423-10 Brady
R1, R2, R6, R7,
R8, R9, R10,
R11, R12, R13,
R14, R15, R16,
R17, R18, R19,
R20, R21, R22,
R23, R24, R25,
R26, R27, R28,
R29
26 10.0 kΩ RES, 10.0 kΩ, 1%, 0.1 W, 0603 0603 RC0603FR-0710KL Yageo
R3, R32 2 1 Ω 1 Ω ±1% 0.25 W, ¼ W Chip
Resistor 0603 (1608 Metric)
Automotive AEC-Q200, Pulse
Withstanding Thick Film
0603 RCS06031R00FKEA Vishay
R4, R33 2 1.0 kΩ RES, 1.0 kΩ, 5%, 0.1 W, 0603 0603 RC0603JR-071KL Yageo
R5 1 4.7 kΩ RES, 4.70 kΩ, 1%, 0.063 W,
0402
0402 CRG0402F4K7 TE Connectivity
R30, R31 2 2.2 kΩ RES, 2.2 kΩ, 5%, 0.1 W, 0603 0603 RC0603JR-072K2L Yageo
R34, R36 2 10.0 kΩ RES, 10.0 kΩ, 1%, 0.1 W, 0603 0603 RCG060310K0FKEA Vishay Draloric
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Table 2-1. BOM (continued)
DESIGNATOR QTY VALUE DESCRIPTION PACKAGE
REFERENCE PART NUMBER MANUFACTURER
R35 1 1.0 kΩ RES, 1.0 kΩ, 5%, 0.1 W, AEC-
Q200 Grade 0, 0603
0603 CRCW06031K00JNEA Vishay-Dale
R37, R38 2 21.0 kΩ RES, 21.0 kΩ, 1%, 0.1 W, 0603 0603 RC0603FR-0721KL Yageo
R39, R40 2 0 Ω 0 Ω Jumper 0.1 W, 1/10 W Chip
Resistor 0603 (1608 Metric)
Automotive AEC-Q200 Thick
Film
0603 ERJ-3GEY0R00V Panasonic
SW1, SW2, SW3 3 Switch Tactile N.O. SPST
Round Button J-Bend 32VAC
32 VDC 1VA 100000Cycles 3N
SMD Tube/T/R
SMD KT11P3JM34LFS C&K Components
TP1, TP2, TP3,
TP4, TP6, TP7,
TP8, TP9, TP10,
TP11, TP12,
TP13, TP14,
TP15, TP16,
TP18, TP19,
TP20, TP21,
TP22, TP23,
TP26, TP27,
TP28
24 Terminal, Turret, TH, Triple TH 1598-2 Keystone
TP24, TP25 2 Test Point, Multipurpose,
Purple, TH
TH 5129 Keystone
U2 1 Automotive, Level-Shifting I2C
Bus Repeater, DGK0008A
(VSSOP-8)
VSSOP-8 TCA9517DGKRQ1 Texas Instruments
U3 1 Dual-Channel, Low-Power
Comparator with Integrated
Reference (USON)
USON TLV4082DRYR Texas Instruments
U4 1 1 A Low-Quiescent-Current
Low-Dropout (LDO) Regulator,
DRV0006A (WSON-6)
WSON-6 TLV75712PDRVR Texas Instruments
U5 1 1 A Low-Quiescent-Current
Low-Dropout (LDO) Regulator,
DRV0006A (WSON-6)
WSON-6 TLV75718PDRVR Texas Instruments
U1 1 ASIL-A Multichannel I2C
Programmable Voltage
Sequencer (VQFN)
VQFN TPS38700CRGER Texas Instruments
Y1 1 Crystal, 32.768 kHz, 12.5 pF,
SMD
SMD NX3215SA-32.768K-STD-
MUA-8
NDK
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2.3 Layout and Component Placement
Figure 2-3 and Figure 2-4 show the top and bottom assemblies of the printed circuit board (PCB) to show the
component placement on the EVM.
Figure 2-5 and Figure 2-6 show the top and bottom layouts, Figure 2-7 and Figure 2-8 show the top and bottom
layers, and Figure 2-9 shows the top solder mask of the EVM.
2.4 Layout
Figure 2-3. Component Placement—Top Assembly
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Figure 2-4. Component Placement—Bottom Assembly
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Figure 2-5. Layout—Top
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Figure 2-6. Layout—Bottom
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Figure 2-7. Top Layer
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Figure 2-8. Bottom Layer
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Figure 2-9. Top Solder Mask
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3 EVM Connectors
This section describes the connectors, jumpers, and test points on the EVM as well as how to connect, set up,
and properly use the EVM. Each device has an independent supply connection, but all grounds are connected
on the board.
3.1 EVM Test Points
Table 3-1 lists the EVM test points as well as their functional descriptions. All TPS38700-Q1 pins have a
corresponding test point on the EVM. These test points are located close to the pins for more accurate
measurements. In addition to the test points listed below, the EVM also has four additional GND test points.
Table 3-1. Test Points
TEST POINT
NUMBER
TEST POINT
SILKSCREEN
LABEL
FUNCTION DESCRIPTION
TP1 EN1 Connection to EN1 pin Allows the user to monitor the SENSE1 pin
TP2 EN2 Connection to EN2 pin Allows the user to monitor the EN2 pin
TP3 EN3 Connection to EN3 pin Allows the user to monitor the EN3 pin
TP4 EN4 Connection to EN4 pin Allows the user to monitor the EN4 pin
TP6 ACT Connection to ACT pin Allows the user to set ACT input
TP7 EN5 Connection to EN5 pin Allows the user to monitor the EN5 output
TP8 EN6 Connection to EN6 pin Allows the user to monitor the EN6 output
TP9 NIRQ Connection to NIRQ pin Allows the user to monitor the NIRQ output
TP10 EN7 Connection to EN7 pin Allows the user to monitor the EN7 output
TP11 EN8 Connection to EN8 pin Allows the user to monitor the EN8 output
TP12 NRST Connection to NRST pin Allows the user to monitor the NRST output
TP13 EN9 Connection to EN9 pin Allows the user to monitor the EN9 output
TP14 EN10/NEM_PD Connection to EN10 pin and Emergency
Shutdown pin Allows the user to monitor the EN10 output
TP15 SLEEP Connection to SLEEP pin Allows the user to set SLEEP input
TP16 EN11/NRST_IN Connection to EN11 pin and Reset In Allows the user to monitor the EN11 output
TP18 EN12/NPWR_BTN Connection to EN12 pin and Power Button Allows the user to monitor the EN12 output
TP21 GND GND for EVM GND for EVM
TP22 CLK32K Connection to CLK32K pin Allows the user to monitor the CLK32K output
TP23 VENx Connection to External Voltage Allows the user to connect to an external voltage for
pulling up enable pins
TP26 GND GND for EVM GND for EVM
TP27 GND GND for EVM GND for EVM
TP28 GND GND for EVM GND for EVM
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3.2 EVM Jumpers
Table 3-2 lists the jumpers on the TPS38700Q1EVM. As ordered, the EVM will have sixteen (16) jumpers
installed. Figure 3-1 is provided as visual aid.
Table 3-2. List of On-board Jumpers
JUMPER DEFAULT JUMPER
CONFIGUATION DESCRIPTION
J1 VBAT For connecting VBAT power to the EVM
J2 VDD For connecting VDD power to the EVM
J3 & J4 Shunt to bottom position For connecting NRST and NIRQ to P1V8 or PEXT (Any external power)
J5 GND For connecting GND to the EVM
J6 P1V8 For pulling- up ENABLE pins to P1V8 or VENX (Any external voltage)
J7 - J18 No connect For pulling-up or down ENABLE pins (Only for open-drain configuration)/No connection
for push-pull confiugration
J16 Shunt to top position For pulling-up EN10 pin to P1V8.
J19 Connect For connecting the EVM to TI's USB Interface Adapter
J20, J29, &
J31
No connect For connecting the on-board buffer to either P1V8, PEXT or P1V2. Only shunt one of
these jumpers when using the buffer. Please revmove the shunt of J21 when using one
of these jumpers.
J21 Shunt For connecting the on-board bufffer IC to P3V3
J22 & J23 Shunt For I2C lines to bypass buffer.
J24, J25,
J27 & J28
No connect For I2C lines to use the on-board buffer.
J30 No connect For connecting VBAT to PEXT
J32 No connect For connecting VENX to VBAT
J34 & J35 No connect For manually pulling down NSLEEP and ACT pins
Figure 3-1. Jumper Settings
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4 EVM Setup and Operation
This section describes the functionality and operation of the TPS38700Q1EVM. Refer to the TPS38700-Q1
Multichannel I2C Programmable Voltage Sequencer data sheet for details on the electrical characteristics of the
device.
The TPS38700Q1EVM comes pre-populated with the TPS38700C03ARGERQ1. The EVM is capable of
many different configurations in order to fully evaluate the functionality of all the TPS38700-Q1 device
variants. The default configuration of the EVM Jumpers is mentioned in the Table 3-2. The TPS38700Q1EVM
comes populated with I2C bus repeater, comparators, LDO, 32.768 kHz crystal and TPS38700C03ARGERQ1
programmable voltage sequencer.
The TPS38700Q1EVM also provides an option to apply a separate pull-up voltage to any of the ENABLE pins by
changing the position of jumper J6 to VENx and connecting the pull-up voltage to test points TP23.
Equipment Needed
• TPS38700Q1EVM
• TI's USB Interface Adapter (with ribbon cable)
• Power Supply (3.3 V)
• Function Generator (provide pulse input for evaluation)
• Multi-channel Oscilloscope (review evaluation waveforms)
• Jumper Cables (additional evaluation)
4.1 Setup and GUI Installations
Follow the steps below for EVM connections and GUI installation:
1. Connect VBAT (J1) and VDD (J2) to 3.3 V from the power supply.
2. Connect GND (J5) to ground from the power supply.
3. Make sure the jumpers are connected as per the guidelines in the Table 3-2.
4. Power on the power supply briefly to check if the voltage is at 3.3 V and the quiescent current is at 10 mA.
Once reviewed, power down the power supply.
5. Connect the Oscilloscope's channel 1 to TP1, channel 2 to TP2, and channel 3 to TP6.
6. Connect the function generator to TP6.
7. Connect the TI's USB Interface Adapter to J19 using a ribbon cable.
8. Connect the TI's USB Interface Adapter to the computer using the USB.
9. Final connections should look similar to . Figure 4-1.
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Figure 4-1. EVM Connections for Testing EN1 and EN2
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