Ublox EVA-M8E Quick setup guide

EVA-M8E
u-blox M8 Miniature Untethered Dead Reckoning
Module
Hardware Integration Manual

Abstract
This document describes the hardware features and specifications of the ultra-compact EVA-
M8E
UDR module featuring the u-
blox M8 positioning engine. The EVA M8E offers flexibility in the
selection and placement of an external Inertial Measurement Unit and Flash memory and achiev
es
Dead Reckoning performance without requiring speed information from the target vehicle. The EVA-
M8E module combines exceptional UDR and GNSS performance with highly flexible power, design,
and serial communication options.
www.u-blox.com
UBX-15028542 - R05

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Document Information
Title EVA-M8E
Subtitle u-blox M8 Miniature Untethered Dead Reckoning Module
Document type Hardware Integration Manual
Document number UBX-15028542
Revision and date R05 20-Dec-2018
Document status Production Information
Product status Corresponding content status
In Development /
Prototype
Objective Specification Target values. Revised and supplementary data will be published later.
Engineering Sample Advance Information Data based on early testing. Revised and supplementary data will be published later.
Initial Production Early Production Information Data from product verification. Revised and supplementary data may be published later.
Mass Production /
End of Life
Production Information Document contains the final product specification.
European Union regulatory compliance
EVA-M8E complie with all relevant requirements for RED 2014/53/EU. The EVA-M8E Declaration of Conformity (DoC) is
available at
www.u-blox.com within Support > Product resources > Conformity Declaration.
This document applies to the following products:
Product name Type number Firmware version PCN reference
EVA-M8E EVA-M8E-0-11 ROM 3.01 / Flash FW 3.01 UDR 1.00, 1.20 N/A
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this
document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only
permitted with the express written permission
of u-blox.
The information contained herein is provided “as is” and u
-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited
to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u
-blox at any time without notice. For the most recent
documents, visit www.u
-blox.com.
Copyright © u
-blox AG.

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Contents
Document Information................................................................................................................................ 2
Contents ..........................................................................................................................................................3
1Hardware description...........................................................................................................................6
1.1 Overview........................................................................................................................................................ 6
2Design-in................................................................................................................................................... 7
2.1 Power management ................................................................................................................................... 7
2.1.1 Overview ...............................................................................................................................................7
2.1.2 Power management configuration ................................................................................................. 8
2.2 Interfaces...................................................................................................................................................... 9
2.2.1 UART interface....................................................................................................................................9
2.2.2 Display Data Channel (DDC) Interface..........................................................................................10
2.2.3 SPI Interface ......................................................................................................................................10
2.2.4 Integrated IMU Sensor Interface...................................................................................................10
2.2.5 USB interface.....................................................................................................................................10
2.2.6 SQI Flash memory.............................................................................................................................11
2.3 I/O Pins ........................................................................................................................................................12
2.3.1 Time pulse ..........................................................................................................................................13
2.3.2 External interrupt .............................................................................................................................13
2.3.3 Active antenna supervisor ..............................................................................................................13
2.3.4 Electromagnetic interference and I/O lines.................................................................................14
2.4 Real-Time Clock (RTC) .............................................................................................................................15
2.4.1 RTC using a crystal...........................................................................................................................15
2.4.2 RTC using an external clock ...........................................................................................................15
2.4.3 Time aiding.........................................................................................................................................15
2.5 RF input.......................................................................................................................................................16
2.5.1 Active Antenna..................................................................................................................................16
2.5.2 Passive Antenna ...............................................................................................................................16
2.5.3 Improved Jamming Immunity........................................................................................................17
2.6 Safe Boot Mode (SAFEBOOT_N)............................................................................................................17
2.7 System Reset (RESET_N) .......................................................................................................................17
2.8 Design-in checklist....................................................................................................................................18
2.8.1 General considerations....................................................................................................................18
2.8.2 Schematic design-in for EVA-M8E ...............................................................................................18
2.9 Pin description ...........................................................................................................................................19
2.10 Layout design-in checklist ......................................................................................................................20
2.11 Layout..........................................................................................................................................................20
2.11.1 Footprint.............................................................................................................................................21
2.11.2 Paste mask ........................................................................................................................................21
2.11.3 Placement ..........................................................................................................................................21
2.12 C93-M8E Application Board- Evaluating EVA-M8E Module............................................................22

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2.13 EOS/ESD/EMI precautions......................................................................................................................22
2.13.1 Electrostatic Discharge (ESD) .......................................................................................................22
2.13.2 ESD protection measures ...............................................................................................................22
2.13.3 Electrical Overstress (EOS) ............................................................................................................23
2.13.4 EOS protection measures...............................................................................................................23
2.13.5 Applications with cellular modules ...............................................................................................23
3Untethered Dead Reckoning............................................................................................................25
3.1 Implementation .........................................................................................................................................25
3.2 Installation..................................................................................................................................................25
4Product handling & soldering...........................................................................................................26
4.1 Packaging, shipping, storage and moisture preconditioning ..........................................................26
4.2 ESD handling precautions.......................................................................................................................26
4.3 Soldering .....................................................................................................................................................26
4.3.1 Soldering paste .................................................................................................................................26
4.3.2 Reflow soldering................................................................................................................................27
4.3.3 Optical inspection.............................................................................................................................27
4.3.4 Repeated reflow soldering ..............................................................................................................27
4.3.5 Wave soldering..................................................................................................................................27
4.3.6 Rework ................................................................................................................................................27
4.3.7 EOS/ESD/EMI precautions .............................................................................................................27
4.3.8 Use of ultrasonic processes ...........................................................................................................28
5Product testing ....................................................................................................................................29
5.1 Test parameters for OEM manufacturer.............................................................................................29
5.2 System sensitivity test............................................................................................................................29
5.2.1 Guidelines for sensitivity tests ......................................................................................................29
5.2.2 ‘Go/No go’ tests for integrated devices........................................................................................29
Appendix ....................................................................................................................................................... 30
AReference schematics....................................................................................................................... 30
A.1 Cost optimized circuit ..............................................................................................................................30
A.2 Best performance circuit with passive antenna.................................................................................31
A.3Improved jamming immunity with passive antenna .........................................................................32
A.4 Circuit using active antenna...................................................................................................................33
A.5 USB self-powered circuit with passive antenna .................................................................................34
A.6 USB bus-powered circuit with passive antenna .................................................................................35
A.7 Circuit using 2-pin antenna supervisor ................................................................................................36
A.8 Circuit using 3-pin antenna supervisor ................................................................................................37
BComponent selection ........................................................................................................................ 38
B.1 External RTC (Y1)......................................................................................................................................38
B.2 RF band-pass filter (F1)...........................................................................................................................38
B.3 External LNA protection filter (F2)........................................................................................................39
B.4 USB line protection (D2) ..........................................................................................................................39
B.5 USB LDO (U1).............................................................................................................................................39

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B.6 External LNA (U1) .....................................................................................................................................39
B.7 Mandatory SQI Flash (U3) .......................................................................................................................40
B.8 Mandatory External Sensor Modules (U4)...........................................................................................40
B.9 RF ESD protection diode (D2).................................................................................................................40
B.10Operational amplifier (U6).......................................................................................................................40
B.11Open-drain buffer (U7, U8 and U9)........................................................................................................40
B.12LDO Voltage Regulator (U10) .................................................................................................................40
B.13Antenna supervisor switch transistor (T1) .........................................................................................41
B.14Ferrite beads (FB1) ...................................................................................................................................41
B.15Feed-thru capacitors................................................................................................................................41
B.16Inductor (L) .................................................................................................................................................41
B.17Standard capacitors.................................................................................................................................41
B.18Standard resistors....................................................................................................................................42
CGlossary ................................................................................................................................................. 42
Related documents ................................................................................................................................... 43
Revision history.......................................................................................................................................... 43
Contact.......................................................................................................................................................... 44

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1Hardware description
1.1 Overview
The EVA-M8E module introduces u-blox’s Untethered Dead Reckoning (UDR) technology in the ultra-
compact EVA form factor. EVA offers the designer flexibility in the selection and placement of
peripheral components: EVA-M8E only requires Flash memory, an inertial sensor, and an optional real-
time clock (RTC) crystal. The EVA-M8E’s sensor may be installed in any stable position within the
vehicle without configuration.
The intelligent combination of GNSS and sensor measurements enables accurate, real-time
positioning at rates up to 20 Hz, as needed for smooth and responsive interactive applications. Native
high-rate sensor data can be relayed to the host for applications such as driving behavior analysis or
accident reconstruction.
The EVA-M8E includes u-blox’s latest generation GNSS receiver, which adds Galileo to the multi-
constellation reception that already includes GPS, GLONASS, BeiDou and QZSS. The module provides
high sensitivity and fast GNSS signal acquisition and tracking. UART, USB, DDC (I2C compliant) and
SSI interface options provide flexible connectivity and enable simple integration with most u-blox
cellular modules.
☞For UDR applications, the EVA-M8E must be connected to an external SQI Flash memory and an
external Inertial Measurement Unit. For more information about product features, see the
EVA-M8E Data Sheet [1].
☞To determine which u-blox product best meets your needs, see the product selector tables on the
u-blox website www.u-blox.com.

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2Design-in
In order to obtain good performance with the GNSS receiver module combined with Untethered Dead
Reckoning (UDR) technology, there are a number of points that require careful attention during the
design-in. These include:
•Power Supply: Good performance requires a clean and stable power supply.
•Interfaces: Ensure correct wiring, rate and message setup on the module and your host system.
•Antenna interface: For optimal performance, seek short routing, matched impedance and no
stubs.
•External LNA: With EVA-M8E an additional external LNA is recommended if a passive antenna is
used.
2.1 Power management
2.1.1 Overview
The EVA-M8E module provides four supply pins: VCC, VCC_IO, V_BCKP and VDD_USB. They can be
supplied independently or tied together to adapt various concepts, depending on the intended
application. The different supply voltages are explained in the following subsections.
Figure 1 shows an example to supply the EVA-M8E module when not using the USB interface. In this
case, the VDD_USB pin is connected to ground.
Figure 1: EVA-M8E power supply example

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2.1.1.1 Main supply voltage (VCC)
During operation, the EVA-M8E module is supplied through the VCC pin. It makes use of an internal
DC/DC converter for improved power efficiency. In a following step, built-in LDOs generate stabilized
voltages for the Core and RF domains of the chip respectively. The current at VCC depends heavily on
the current state of the system and is in general very dynamic.
☞Do not add any series resistance (< 0.2 Ω) to the VCC supply, as it will generate input voltage noise
due to the dynamic current conditions.
☞The equipment must be supplied by an external limited power source in compliance with the clause
2.5 of the standard IEC 60950-1.
2.1.1.2 I/O supply voltage (VCC_IO)
The digital I/Os of the EVA-M8E module can be supplied with a separate voltage from the host system
connected to the VCC_IO pin of the module. The wide range of VCC_IO allows seamless interfacing to
standard logic voltage levels. However, in most applications VCC_IO and VCC share the same voltage
level and are tied together. VCC_IO supplies also the RTC and the backup RAM (BBR) during normal
operation.
☞VCC_IO must be supplied in order for the system to boot.
☞Because of running the firmware from the external SQI Flash, most of the VDD_IO current is
consumed by the SQI bus.
2.1.1.3 Backup power supply (V_BCKP)
In the event of a power failure at VCC_IO, the backup domain is supplied by V_BCKP.
☞If no backup supply is available, connect V_BCKP to VCC_IO.
☞Avoid high resistance on the V_BCKP line: During the switch from main supply to backup supply,
a short current adjustment peak can cause high voltage drop on the pin with possible
malfunctions.
☞If the “single crystal” feature is enabled (which derives the RTC frequency from the main clock),
the V_BCKP pin also supplies the clock domain if there is a power failure at VCC_IO, meaning that
the V_BCKP current will also be higher. Ensure that the capacity of the backup battery chosen
meets your requirements. EVA-M8Q module uses TCXO oscillator and does not support the
“single crystal” feature. For more information about Real-Time Clock see section 2.4
2.1.1.4 USB interface power supply
VDD_USB supplies I/Os of the USB interface. If the USB interface is being used, the system can be
either self-powered, i.e. powered independently from the USB bus, or it can be bus-powered, i.e.
powered through the USB connection. In bus-powered mode, the system supply voltages need to be
generated from the USB supply voltage VBUS.
☞If the USB interface is not used, the VDD_USB pin must be connected to GND.
2.1.2 Power management configuration
Depending on the application, the power supply schematic will differ. Some examples are shown in the
following sections:
•Single supply voltage for VCC and VCC_IO, no backup supply see Appendix, Figure 14
•Separate supply voltages for VCC, VCC_IO and V_BCKP see Appendix, Figure 15

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•Single supply voltage for VCC and VCC_IO, use of a backup supply see Appendix, Figure 17
☞For description of the different power operating modes, see the EVA-M8E Data Sheet [1].
2.2 Interfaces
The EVA-M8E module provides UART, SPI, DDC (I2C compliant) interfaces for communication with a
host CPU. A USB interface is also available on specific pins (see section 2.2.5). Additionally, an SQI
interface is available for connecting the EVA-M8E module with a mandatory external flash memory.
An extra dedicated DDC (I2C compliant) interface is reserved to communicate with an external Inertial
Measurement Unit, which includes 3D accelerometer and 3D gyroscope sensors.
The UART, SPI and DDC pins are supplied by VCC_IO and operate at this voltage level.
Four dedicated pins can be configured as either 1 x UART and 1 x DDC or a single SPI interface
selectable by D_SEL pin. Table 1 below provides the port mapping details.
Pin 32 (D_SEL) = “high” (left open) Pin 32 (D_SEL) = “Low” (connected to GND)
UART TXD SPI MISO
UART RXD SPI MOSI
DDC SCL SPI CLK
DDC SDA SPI CS_N
Table 1: Communication Interfaces overview
☞It is not possible to use the SPI interface simultaneously with the DDC or UART interface.
☞For debugging purposes, it is recommended to have a second interface e.g. USB available that is
independent from the application and accessible via test-points.
For each interface, a dedicated pin can be defined to indicate that data is ready to be transmitted.
The TX Ready signal indicates that the receiver has data to transmit. A listener can wait on the TX
Ready signal instead of polling the DDC or SPI interfaces. The UBX-CFG-PRT message lets you
configure the polarity and the number of bytes in the buffer before the TX Ready signal goes active.
The TX Ready function is disabled by default.
☞The TX Ready functionality can be enabled and configured by proper AT commands sent to the
involved u-blox cellular module supporting the feature. For more information see the GPS
Implementation and Aiding Features in u-blox wireless modules [5].
☞The TX Ready feature is supported on version LEON FW 7.xx and LISA-U2 01S and above.
2.2.1 UART interface
A UART interface is available for serial communication to a host CPU. The UART interface supports
configurable data rates with the default at 9600 baud. Signal levels are related to the VCC_IO supply
voltage. An interface based on RS232 standard levels (+/- 7 V) can be realized using level shifter ICs
such as the Maxim MAX3232.
Hardware handshake signals and synchronous operation are not supported.
A signal change on the UART RX pin can also be used to wake up the receiver in Power Save Mode (see
the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [2]).
☞Designs must allow access to the UART and the SAFEBOOT_N pin for future service, updates, and
reconfiguration.

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2.2.2 Display Data Channel (DDC) Interface
An I2C compliant DDC interface is available for communication with an external host CPU or u-blox
cellular modules. The interface can be operated in slave mode only. The DDC protocol and electrical
interface are fully compatible with Fast-Mode of the I2C industry standard. Since the maximum SCL
clock frequency is 400 kHz, the maximum transfer rate is 400 kb/s.
The SCL and SDA pins have internal pull-up resistors sufficient for most applications. However,
depending on the speed of the host and the load on the DDC lines additional external pull-up resistors
might be necessary. For speed and clock frequency, see the EVA-M8E Data Sheet [1].
☞To make use of DDC interface, the D_SEL pin has to be left open.
For more information about DDC implementation, refer to the u-blox 8 / u-blox M8 Receiver
Description Including Protocol Specification [2].
2.2.3 SPI Interface
The SPI interface can be used to provide a serial communication with a host CPU. If the SPI interface
is used, UART and DDC are deactivated, because they share the same pins.
☞To make use of the SPI interface, the D_SEL pin has to be connected to GND.
2.2.4 Integrated IMU Sensor Interface
A dedicated I2C compliant DDC interface is available and reserved for communication with an external
Inertial Measurement Unit, which employs 3D accelerometer and 3D gyroscope sensors. The interface
can be operated in master mode only. The DDC protocol and electrical interface are fully compatible
with Fast-Mode of the I2C industry standard. Since the maximum SCL clock frequency is 400 kHz,
thus the maximum transfer rate is 400 kbit/s.
The DDC interface is I2C Fast Mode compliant. For timing parameters, consult the I2C standard.
☞The maximum bit rate is 400 kb/s. The interface stretches the clock when slowed down while
serving interrupts, so real bit rates may be slightly lower.
☞Supply needs to be derived from VCC_IO
☞For a detailed list of supported sensor modules, see Appendix B.8.
2.2.5 USB interface
The USB interface of the EVA-M8E module supports the full-speed data rate of 12 Mbit/s. It is
compatible to the USB 2.0 FS standard. The interface requires some external components in order to
implement the physical characteristics required by the USB 2.0 specification. Figure 2 shows the
interface pins and additional external components. In order to comply with USB specifications, VBUS
must be connected through a LDO (U2) to pin VDD_USB of the EVA-M8E receiver. This ensures that
the internal 1.5kΩpull-up resistor on USB_DP gets disconnected when the USB host shuts down
VBUS.
Depending on the characteristics of the LDO (U2), for a self-powered design it is recommended to add
a pull-down resistor (R8) at its output to ensure VDD_USB does not float if a USB cable is not
connected, i.e. when VBUS is not present. In USB self-powered mode, the power supply (VCC) can be
turned off and the digital block is not powered. In this case, since VBUS is still available, the USB host
would still receive the signal indicating that the device is present and ready to communicate. This
should be avoided by disabling the LDO (U1) using the enable signal (EN) of the VCC-LDO or the output
of a voltage supervisor.

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The interface can be used either in “self powered” or “bus powered” mode. The required mode can be
configured using the UBX-CFG-USB message. Also, the vendor ID, vendor string, product ID and
product string can be changed.
In order to get the 90 Ωdifferential impedance in between the USB_DM and USB_DP data line, a 27Ω
series resistor (R1, R2) must be placed into each data line (USB_DM and USB_DP).
Module
VDD_USB
LDO
VDD_USB
R4
USB_DP
USB_DM
R5
C24 C23
D2
VBUS
DP
DM
GND
USB Device Connector
U1
EN R11
EN
Figure 2: USB interface
Name Component Function Comments
U1 LDO Regulates VBUS (4.4 …5.25
V) down to a voltage of 3.3 V).
Almost no current requirement (~1 mA) if the GNSS receiver is
operated as a USB self-powered device, but if bus-powered LDO (U1)
must be able to deliver the maximum current of ~100 mA.
C24,C23 Capacitors Required according to the specification of LDO U1
D2 Protection
diodes
Protect circuit from
overvoltage / ESD when
connecting.
Use low capacitance ESD protection such as ST Microelectronics
USBLC6-2.
R4, R5 Serial
termination
resistors
Establish a full-speed driver
impedance of 28…44 Ω
A value of 27 Ωis recommended.
R11 Resistor Ensures defined signal at
VDD_USB when VBUS is not
connected / powered
100 kΩis recommended for USB self-powered setup. For bus-powered
setup R8 is not required.
Table 2: Summary of USB external components
See Appendix A.5 and Appendix A.6 for reference schematics for self- and bus-powered operation.
☞If the USB interface is not used, connect VDD_USB to GND.
2.2.6 SQI Flash memory
An external SQI (Serial Quad Interface) Flash memory is mandatory and connected to the EVA-M8E
SQI interface, which provides the following functionalities:
•Run firmware out of the SQI Flash and have the possibility to update the firmware
•Store the current configuration permanently
•Save data logging results
•Hold AssistNow Offline and AssistNow Autonomous data
☞An SQI Flash must be connected when firmware update is a prime requirement.
☞The EVA-M8E module needs to make use of a dedicated flash firmware with an external SQI Flash
memory. The voltage level of the SQI interface follows the VCC_IO level. Therefore, the SQI Flash
must be supplied with the same voltage as VCC_IO of the EVA-M8E. It is recommended to place a
decoupling capacitor (C4) close to the supply pin of the SQI Flash.
☞Make sure that the SQI Flash supply range matches the voltage supplied at VCC_IO.

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Figure 3: Connecting an external SQI Flash memory
Running the firmware from the SQI Flash requires a minimum SQI Flash size of 8 Mbit. An 8 Mbit
device is also sufficient to save AssistNow Offline and AssistNow Autonomous information as well as
Current configuration data. However, to run firmware from the SQI Flash and provide space for logging
results, a minimum size of 8 Mbit might not be sufficient, depending on the amount of data to be
logged.
☞For more information about supported SQI Flash devices see Table 15.
EVA-M8E modules have a configurable VCC_IO monitor threshold (iomonCfg) to ensure that the
EVA-M8E receiver only starts if the VCC_IO supply is within the supply range of the SQI Flash device
(VCC_IO is used to supply the SQI Flash). This will ensure that any connected SQI Flash memory will
be detected correctly at startup. See the u-blox 8 / u-blox M8 Receiver Description Including Protocol
Specification [2] for setting the iomonCfg value.
The VCC_IO monitor threshold is set to default 2.69 V value to support minimum 2.7 V VCC_IO
voltage. If the default value for the VCC_IO monitor threshold is not suitable it can be set according
to the IO supply voltage level (VCC_IO) in the eFuse by the Low Level Configuration. If VCC_IO voltage
3.0 V to 3.6 V is used, send the following sequence to the module
•B5 62 06 41 0C 00 00 00 03 1F 4F 22 4C 5C FF 7F 7F FF 8A 7C
☞Applying these sequences result in a permanent change and cannot be reversed. An unstable
supply voltage at the VCC_IO pin while applying these sequences can also damage the receiver.
☞Make sure that the SAFEBOOT_N pin is available for entering Safe Boot Mode. Programming the
SQI Flash memory with a Flash firmware is done typically at production. For this purpose the EVA-
M8E module have to enter the Safe Boot Mode. More information about SAFEBOOT_N pin see
section 2.6.
☞The default concurrent reception will be reset to GPS/QZSS/SBAS and GLONASS. EVA-M8E can
be changed to concurrent GPS/QZSS/SBAS and BeiDou by sending a dedicated UBX message
(UBX-CFG-GNSS) to the module. More information see the u-blox 8 / u-blox M8 Receiver
Description Including Protocol Specification [2].
2.3 I/O Pins
All I/O pins make use of internal pull-ups. Thus, there is no need to connect unused pins to VCC_IO.

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2.3.1 Time pulse
A configurable time pulse signal is available with the u-blox EVA-M8E module.
The TIMEPULSE output generates pulse trains synchronized with GPS or UTC time grid with intervals
configurable over a wide frequency range. Thus it may be used as a low frequency time
synchronization pulse or as a high frequency reference signal.
By default the time pulse signal is disabled. For more information see the
u-blox 8 / u-blox M8 Receiver
Description including Protocol Specification
[2].
☞The EVA-M8E TIMEPULSE output is configured using TIMEPULSE2 messages.
2.3.2 External interrupt
Pin PIO14/ANT_DET can be used as an optional external interrupt pin with fixed input voltage
thresholds with respect to VCC_IO (see the EVA-M8E Data Sheet [1] for more information).It can be
used for force-OFF the receiver or aiding.. By default, the external interrupt is disabled.
☞The EVA-M8E EXTINT pin is called EXTINT1 in the u-blox 8 / u-blox M8 Receiver Description
Protocol Specification [2].
☞If the PIO14/ANT_DET pin is configured for on/off switching of the module, the internal pull-up
becomes disabled. Thus make sure the input is always driven within the defined voltage level by
the host
For further information, see the u-blox 8 / u-blox M8 Receiver Description Protocol Specification [2].
2.3.3 Active antenna supervisor
The EVA-M8E module supports active antenna supervisors. The antenna supervisor gives
information about the status of the active antenna and will turn off the supply to the active antenna
in case a short is detected or to optimize the power consumption when in Power Save Mode.
There is either a 2-pin or a 3-pin antenna supervisor. By default, the 2-pin antenna supervisor is
enabled.
2.3.3.1 2-pin antenna supervisor
The 2-pin antenna supervisor function, which is enabled by default, consists of the ANT_OK input and
the ANT_OFF output pins.
Function I/O Description Remarks
ANT_OK I Antenna OK
“high” = Antenna OK
“low” = Antenna not OK
Default configuration
ANT_OFF O Control signal to turn on and off the antenna supply
“high” = Antenna OFF
“low” = Antenna ON
Default configuration
Table 3: 2-pin antenna supervisor pins
The circuitry, as shown in Appendix A.7 (see Figure 20) provides antenna supply short circuit
detection. It will prevent antenna operation via transistor T1 if a short circuit has been detected or if
it is not required (e.g. in Power Save Mode).
The status of the active antenna can be checked by the UBX-MON-HW message. More information
see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [2].

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Open drain buffers U4 and U7 (e.g. Fairchild NC7WZ07) are needed to shift the voltage levels. R3 is
required as a passive pull-up to control T1 because U4 has an open drain output. R4 serves as a
current limiter in the event of a short circuit.
2.3.3.2 3-pin antenna supervisor
The 3-pin antenna supervisor is comprised of the ANT_DET (active antenna detection), ANT_OK
(short detection) and ANT_OFF (antenna on/off control) pins. This function must be activated by
sending the following sequence to the EVA-M8E receiver in production:
B5 62 06 41 0C 00 00 00 03 1F CD 1A 38 57 FF FF F6 FF DE 11
☞Applying this sequence results in a permanent change and cannot be reversed. An unstable supply
voltage at the VCC_IO pin while applying this sequence can also damage the receiver.
Function I/O Description Remarks
ANT_DET I
(pull-up)
Antenna detected
“high” = Antenna detected
“low” = Antenna not detected
Byte sequence given in section 2.3.3.2
should be applied.
ANT_OK I
(pull-up)
Antenna not shorted
“high” = antenna has no short
“low” = antenna has a short
Byte sequence given in section 2.3.3.2
should be applied.
ANT_OFF O Control signal to turn on and off the antenna supply
“high” = turn off antenna supply
“low” = short to GND
Byte sequence given in section 2.3.3.2
should be applied.
Table 4: 3-pin Antenna supervisor pins
The external circuitry, as shown in Appendix A.8, (see Figure 21) provides detection of an active
antenna connection status. If the active antenna is present, the DC supply current exceeds a preset
threshold defined by R4, R5, and R6. It will shut down the antenna via transistor T1 if a short circuit
has been detected via U7 or if it’s not required (e.g. in Power Save Mode).
The status of the active antenna can be checked by the UBX-MON-HW message. More information
see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [2].
The open drain buffers U4, U7 and U8 (e.g. Fairchild NC7WZ07) are needed to shift the voltage levels.
R3 is required as a passive pull-up to control T1 because U4 has an open drain output. R4 serves as a
current limiter in the event of a short circuit.
2.3.4 Electromagnetic interference and I/O lines
Any I/O signal line (length > ~3 mm) can act as an antenna and may pick up arbitrary RF signals
transferring them as noise into the GNSS receiver. This specifically applies to unshielded lines, lines
where the corresponding GND layer is remote or missing entirely, and lines close to the edges of the
printed circuit board. If for example, a cellular signal radiates into an unshielded high-impedance line,
it is possible to generate noise in the order of volts and not only distort receiver operation but also
damage it permanently.
On the other hand, noise generated at the I/O pins will emit from unshielded I/O lines. Receiver
performance may be degraded when this noise is coupled into the GNSS antenna (see Figure 9).
In case of improper shielding, it is recommended to use resistors or ferrite beads (see Appendix
41B.14) on the I/O lines in series. These components should be chosen with care because they will
affect also the signal rise times. Alternatively, feed-thru capacitors with good GND connection close
to the GNSS receiver can be used (see Appendix B.15).
EMI protection measures are particularly useful when RF emitting devices are placed next to the
GNSS receiver and/or to minimize the risk of EMI degradation due to self-jamming. An adequate

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layout with a robust grounding concept is essential in order to protect against EMI. More information
can be found in subsection 2.13.5.3.
2.4 Real-Time Clock (RTC)
The use of the RTC is optional to maintain time in the event of power failure at VCC_IO. The RTC is
required for hot start, warm start, AssistNow Autonomous, AssistNow Offline and in some Power
Save Mode operations.
The time information can either be generated by connecting an external RTC crystal to the EVA-M8E
module, by connecting an external 32.768 kHz signal to the RTC input, or by time aiding of the GNSS
receiver at every startup.
2.4.1 RTC using a crystal
The easiest way to provide time information to the receiver is to connect an RTC crystal to the
corresponding pins of the RTC oscillator, RTC_I and RTC_O. There is no need to add load capacitors
to the crystal for frequency tuning, because they are already integrated in the chip. Using an RTC
crystal will provide the lowest current consumption to V_BCKP in case of a power failure. On the other
hand, it will increase the BOM costs and requires space for the RTC crystal.
Figure 4: RTC crystal
2.4.2 RTC using an external clock
Some applications can provide a suitable 32.768 kHz external reference to drive the EVA-M8E RTC.
The external reference can simply be connected to the RTC_I pin. Make sure that the 32.768 kHz
reference signal is always turned on and the voltage at the RTC_I pin does not exceed 350 mVpp.
Adjusting of the voltage level (typ. 200 mVpp) can be achieved with a resistive voltage divider followed
by a DC blocking capacitor in the range of 1 nF to 10 nF. Also make sure the frequency versus
temperature behavior of the external clock is within the recommended crystal specification shown in
section B.1.
2.4.3 Time aiding
Time can also be sent by UBX message at every startup of the EVA-M8E module. This can be done to
enable warm starts, AssistNow Autonomous and AssistNow Offline. This can be done when no RTC
is maintained.
To enable hot starts correctly, the time information must be known accurately and thus the
TimeMark feature has to be used.
For more information about time aiding or timemark see the u-blox 8 / u-blox M8 Receiver Description
Including Protocol Specification [2].
☞For information of this use case, it is mandatory to contact u-blox support team.
☞For Power Save Mode operations where the RTC is needed, the time aiding cannot be used. This is
because the host does not have any information about when the EVA-M8E module turns from OFF
status to ON status during ON/OFF operation of Power Save Mode.

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2.5 RF input
The RF-input is already matched to 50 Ohms and has an internal DC block. To achieve the
performance values as written in the EVA-M8E Data Sheet [1], an active antenna with a good LNA
inside or the recommended LNA with passive antenna in front of EVA-M8E (must have a noise figure
below 1 dB).
The EVA-M8E module can receive and track different GNSS (GPS, GLONASS, GALILEO and BeiDou)
simultaneously. This concurrent operation is extended to 3 GNSS when both of GPS and GALILEO are
used in addition to GLONASS or Beidou.
2.5.1 Active Antenna
In case an active antenna is used, just the active antenna supply circuit has to be added in front of the
RF-input, see Figure 17. In case the active antenna has to be supervised, either the 2-pin active
antenna supervisor circuit (see Figure 20) or the 3-pin active antenna supervisor circuit (see Figure
21), has to be added to the active antenna circuit. These active antenna supervisor circuits also make
sure that the active antenna is turned off in Power Save Mode stages.
2.5.2 Passive Antenna
If a passive antenna is connected to the EVA-M8E module, it is recommended to use an additional
LNA in front of EVA-M8E. An LNA (U1) alone would make the EVA-M8E module more sensitive to out-
band jammers, so an additional GNSS SAW filter (F1) has to be connected between the external LNA
(U1) and the EVA-M8E module’s RF-input If strong out-band jammers are close to the GNSS antenna
(e.g. a GSM antenna), see section 2.5.3.
The LNA (U1) can be selected to deliver the performance needed by the application in terms of:
•Noise figure (sensitivity)
•Selectivity and linearity (Robustness against jamming)
•Robustness against RF power and ESD
☞The external LNA (U1) must be placed close to the passive antenna to get best performance, but
care should be taken to isolate its output from the antenna element to avoid signal distortion or
instability.
If Power Save Mode is used and the minimum current consumption has to be achieved, then the
external LNA should also be turned off. The ANT_OFF pin can be used to turn off an external LNA.
The ANT_OFF signal must be inverted for common LNAs which come with an enable pin which has be
“low” to turn off.
☞The the function of the ANT_OFF pin can be inverted by sending the following sequence to the
receiver:
☞B5 62 06 41 0C 00 00 00 03 1F 90 47 4F B1 FF FF EA FF 33 98
☞Applying this sequence results in a permanent change and cannot be reversed. An unstable supply
voltage at the VCC_IO pin while applying this sequence can also damage the receiver.
☞A pull-down resistor (R7) is required to ensure correct operation of the ANT_OFF pin.
ESD discharge into the RF input cannot always be avoided during assembly and / or field use with this
approach! To provide additional robustness an ESD protection diode, as listed in Appendix B.7, can be
placed in front of the LNA to GND.

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2.5.3 Improved Jamming Immunity
If strong out-band jammers are close to the GNSS antenna (e.g. a GSM antenna) GNSS performance
can be degraded or the maximum input power of the EVA-M8E module’s RF-input can be exceeded.
An additional SAW filter (F2) has to put in front of the external LNA (U1), see Appendix A. If the
external LNA can accept the maximum input power, the SAW filter between the passive antenna and
external LNA (LNA1) might not be necessary. This results in a better noise figure than an additional
SAW filter (F2) in front of the external LNA (U1).
If the EVA-M8E module is exposed to an interference environment, it is recommended to use
additional filtering. Improved interference immunity with good GNSS performance can be achieved
when using a SAW/LNA/SAW configuration between the antenna and the RF-input. The single-ended
SAW filter (F2) can be placed in front of the LNA matching network to prevent receiver blocking due
to strong interference, see Figure 16.
It should be noted that the insertion loss of SAW filter (F2) directly affects the system noise figure
and hence the system performance. Choice of a component with low insertion loss is mandatory when
a passive antenna is used with this set-up. An example schematic for an improved jamming immunity
is shown in Appendix A.3 (see Figure 16).
2.6 Safe Boot Mode (SAFEBOOT_N)
If the SAFEBOOT_N pin is “low” at start up, the EVA-M8E module starts in Safe Boot Mode and
doesn’t begin GNSS operation. In Safe Boot Mode the EVA-M8E module runs from an internal LC
oscillator and starts regardless of any configuration provided by the configuration pins. Thus, it can
be used to recover from situations where the SQI Flash has become corrupted.
Owing to the inaccurate frequency of the internal LC oscillator, the EVA-M8E module is unable to
communicate via USB in Safe Boot Mode. For communication by UART in Safe Boot Mode, a training
sequence (0x 55 55 at 9600 baud) can be sent by the host to the EVA-M8E in order to enable
communication. After sending the training sequence, the host has to wait for at least 2 ms before
sending messages to the EVA-M8E receiver. For further information see the
u-blox 8 / u-blox M8
Receiver Description Including Protocol Specification
[2].
Safe Boot Mode is used in production to program the SQI Flash. It is recommended to have the
possibility to pull the SAFEBOOT_N pin “low” when the EVA-M8E module starts up. This can be
provided using an externally connected test point or via a host CPUs digital I/O port.
2.7 System Reset (RESET_N)
The EVA-M8E module provides a RESET_N pin to reset the system. The RESET_N is an input-only
with internal pull-up resistor. It must be at low level for at least 10 ms to make sure RESET_N is
detected. It is used to reset the system. Leave RESET_N open for normal operation. The RESET_N
complies with the VCC_IO level and can be actively driven high.
☞RESET_N should be only used in critical situations to recover the system. The Real-Time Clock
(RTC) will also be reset and thus immediately afterwards the receiver cannot perform a Hot Start.
☞In reset state, the EVA-M8E module consumes a significant amount of current. It is therefore
recommended to use RESET_N only as a reset signal and not as an enable/disable.

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2.8 Design-in checklist
2.8.1 General considerations
Check power supply requirements and schematic:
Is the power supply voltage within the specified range? See how to connect power in Section 2.1.
For USB devices: Is the voltage VDD_USB voltage within the specified range? Do you have a Bus
or Self powered setup?
Compare the peak current consumption of EVA-M8E with the specification of your power
supply.
GNSS receivers require a stable power supply. Avoid series resistance in your power supply line
(the line to VCC) to minimize the voltage ripple on VCC.
Backup battery
For achieving a minimal Time To First Fix (TTFF) after a power down (warm starts, hot starts),
make sure to connect a backup battery to V_BCKP, and use an RTC. If not used, make sure
V_BCKP is connected to VCC_IO.
Antenna/ RF input
The total noise figure including external LNA (or the LNA in the active antenna) should be around
1 dB.
With the EVA-M8E module, an external LNA is mandatory if no active antenna is used to achieve
the performance values as written in the EVA-M8E Data Sheet [1].
Make sure the antenna is not placed close to noisy parts of the circuitry and not facing noisy
parts. (e.g. micro-controller, display, etc.)
To optimize performance in environments with out-band jamming/interference sources, use an
additional SAW filter.
☞For more information dealing with interference issues see the GPS Antenna Application Note [3].
Schematic
Inner pins of the package must all be connected to GND.
2.8.2 Schematic design-in for EVA-M8E
For a minimal design with the EVA-M8E the following functions and pins need to be considered:
•Connect the power supply to VCC, VCC_IO and V_BCKP.
•VDD_USB: Connect the USB power supply to a LDO before feeding it to VDD_USB and VCC or
connect it to GND if USB is not used.
•Ensure an optimal ground connection to all ground pins of the EVA-M8E module.
•Choose the required serial communication interfaces (UART, USB, DDC) and connect the
appropriate pins to your application
•If you need hot or warm start in your application, connect a Backup Battery to V_BCKP and add
RTC circuit.
•If antenna bias is required, see Appendix A.4.

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2.9 Pin description
Pin # Name I/O Description Remark
1 RF_IN I RF Input Add external LNA and SAW if no active
antenna used.
2 GND I Ground Outer ground pin
3 Reserved I/O Reserved Do not connect. Must be left open!
4 Reserved I/O Reserved Do not connect. Must be left open!
5 USB_DM I/O USB data Leave open if not used.
6 USB_DP I/O USB data Leave open if not used.
7 VDD_USB I USB Interface power Connect to GND if not used.
8 RTC_O O RTC Output Leave open if no RTC Crystal attached.
9 RTC_I I RTC Input Connect to GND if no RTC Crystal
attached.
10 Reserved I/O Reserved Do not connect. Must be left open!
11 Reserved I/O Reserved Do not connect. Must be left open!
12 PIO14/ANT_DET I Normal PIO; Or antenna detection Leave open if not used.
13 SEN_SCL I/O I2C clock for external IMU Leave open if not used.
14 RESET_N I System reset See section 2.7.
15 RXD /SPI MOSI I Serial interface See section 2.2.
16 TXD /SPI MISO O Serial interface See section 2.2.
17 Reserved I/O Reserved Do not connect. Must be left open!
18 GND I Ground Outer ground pin
19 VCC I Main supply See section 2.1.
20 VCC_IO I I/O Supply See section 2.1.
21 V_BCKP I Backup supply See section 2.1.
22 SQI_D0 I/O Data line 0 to external SQI flash memory or
reserved configuration pin.
Leave open if not used.
23 SQI_CLK I/O Clock for external SQI flash memory or
configuration pin.
Leave open if not used.
24 SQI_D2 I/O Data line 2 to external SQI flash memory or
reserved configuration pin.
Leave open if not used.
25 SQI_D1 I/O Data line 1 to external SQI flash memory or
reserved configuration pin.
Leave open if not used.
26 SQI_CS_N I/O Chip select for external SQI flash memory
or configuration enable pin.
Leave open if not used.
27 SQI_D3 I/O Data line 3 to external SQI flash memory or
reserved configuration pin.
Leave open if not used.
28 Reserved I/O Reserved Do not connect. Must be left open!
29 SCL / SPI CLK I Serial interface See section 2.2.
30 SDA / SPI CS_N I/O Serial interface See section 2.2.
31 SEN_SDA O I2C data line for external IMU. Leave open if not used.
32 D_SEL I Interface selector See section 2.2.
33 SAFEBOOT_N /
TIMEPULSE
I Used for programming the SQI flash
memory and testing purposes, or time
pulse output
Leave open if not used.
34 ANT_OK I Antenna status; o Leave open if not used.
35 ANT_OFF O Antenna control Leave open if not used.
36 Reserved I/O Reserved Do not connect. Must be left open!
37 GND I Ground Inner ground pin

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38 GND I Ground Inner ground pin
39 GND I Ground Inner ground pin
40 GND I Ground Inner ground pin
41 GND I Ground Inner ground pin
42 GND I Ground Inner ground pin
43 GND I Ground Inner ground pin
Table 5: EVA-M8E pin description
☞For pin assignment see the EVA-M8E Data Sheet [1].
2.10 Layout design-in checklist
Follow this checklist for the layout design to get an optimal GNSS and UDR performance.
Layout optimizations (Section 2.11)
Is the EVA-M8E placed according to the recommendation in section 2.11.3?
Is the grounding concept optimal?
Has the 50 Ohm line from antenna to EVA-M8E (micro strip / coplanar waveguide) been kept as
short as possible?
Assure low serial resistance in VCC power supply line (choose a line width > 400 um).
Keep power supply line as short as possible.
Design a GND guard ring around the optional RTC crystal lines and GND below the RTC circuit.
Add a ground plane underneath the GNSS module to reduce interference. This is especially
important for the RF input line.
For improved shielding, add as many vias as possible around the micro strip/coplanar
waveguide, around the serial communication lines, underneath the GNSS module, etc.
Calculation of the micro strip for RF input
The micro strip / coplanar waveguide must be 50 Ohms and be routed in a section of the PCB
where minimal interference from noise sources can be expected. Make sure around the RF line
is only GND as well as under the RF line.
In case of a multi-layer PCB, use the thickness of the dielectric between the signal and the 1st
GND layer (typically the 2nd layer) for the micro strip / coplanar waveguide calculation.
If the distance between the micro strip and the adjacent GND area (on the same layer) does not
exceed 5 times the track width of the micro strip, use the “Coplanar Waveguide” model in
AppCad to calculate the micro strip and not the “micro strip” model.
2.11 Layout
This section provides important information for designing a reliable and sensitive GNSS system.
GNSS signals at the surface of the earth are about 15 dB below the thermal noise floor. Signal loss at
the antenna and the RF connection must be minimized as much as possible. When defining a GNSS
receiver layout, the placement of the antenna with respect to the receiver, as well as grounding,
shielding and jamming from other digital devices are crucial issues and need to be considered very
carefully.