Ublox LISA-C2 Series Quick setup guide

LISA-C2 series and FW75-C200
CDMA 1xRTT Cellular Modules
System Integration Manual
Abstract
This document describes the features and the integration of
u-blox LISA-C2 series & FW75-C200
CDMA2000 1xRTT cellular
modules.
The
modules are complete and cost efficient CDMA solutions
offering 153 kb/s download and upload speeds, supporting
dual-band operation (800 / 1900 MHz).
www.u
-blox.com
UBX
-13000620 - R21

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Document Information
Title LISA-C2 series and FW75-C200
Subtitle CDMA 1xRTT Cellular Modules
Document type System Integration Manual
Document number UBX-13000620
Revision and date R21 08-Aug-2017
Document status Early Production Information
Document status explanation
Objective Specification Document contains target values. Revised and supplementary data will be published later.
Advance Information Document contains data based on early testing. Revised and supplementary data will be published later.
Early Production Information Document contains data from product verification. Revised and supplementary data may be published later.
Production Information Document contains the final product specification.
This document applies to the following products:
Name Type number Firmware version PCN / IN
FW75-C200 FW75-C200-02S-01 E0.S.05.00.04R UBX-TN-12077
LISA-C200 LISA-C200-02S-01 E0.S.05.00.04R UBX-TN-12077
FW75-C200 FW75-C200-22S-01 E0.V.05.00.02R UBX-TN-12077
LISA-C200 LISA-C200-22S-01 E0.V.05.00.03R UBX-TN-12077
LISA-C200 LISA-C200-03S-00 E0.S.06.00.07R UBX-13005454
LISA-C200
LISA-C200-23S-00
E0.V.06.00.06R
UBX-13005454
LISA-C200 LISA-C200-04S-00 E0.S.07.00.07R UBX-14042040
LISA-C200 LISA-C200-24S-00 E0.V.07.00.07R UBX-14042040
u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein
may in whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this
document or any part thereof without the express permission of u-blox is strictly prohibited.
The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either
express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u-blox at any time. For most recent documents, visit www.u-blox.com.
Copyright © 2017, u-blox AG.
u-blox is a registered trademark of u-blox Holding AG in the EU and other countries.

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Preface
u-blox Technical Documentation
As part of our commitment to customer support, u-blox maintains an extensive volume of technical
documentation for our products. In addition to our product-specific technical data sheets, the following manuals
are available to assist u-blox customers in product design and development.
•AT Commands Manual: This document provides the description of the AT commands supported by the
LISA-C2 series and FW75-C200 modules.
•System Integration Manual: This manual provides hardware design instructions and information on how
to set up production and final product tests.
•Application Note: Provides general design instructions and information that applies to all u-blox cellular
modules. See Section Related documents for a list of Application Notes related to your cellular module.
How to use this Manual
The LISA-C2 series and FW75-C200 System Integration Manual provides the necessary information to
successfully design in and configure these u-blox cellular modules. This manual has a modular structure. It is not
necessary to read it from the beginning to the end.
The following symbols are used to highlight important information within the manual:
An index finger points out key information pertaining to module integration and performance.
A warning symbol indicates actions that could negatively impact or damage the module.
Questions
If you have any questions about u-blox cellular integration, please:
•Read this manual carefully.
•Contact our information service on the homepage http://www.u-blox.com
•Read the questions and answers on our FAQ database on the homepage http://www.u-blox.com
Technical Support
Worldwide Web
Our website (www.u-blox.com) is a rich pool of information. Product information, technical documents and
helpful FAQ can be accessed 24h a day.
By E-mail
Contact the nearest Technical Support office by email. To ensure that your request is processed as soon as
possible, use our service pool email addresses rather than any personal email address of our staff. You will find
the contact details at the end of the document.
Helpful Information when Contacting Technical Support
When contacting Technical Support please have the following information ready:
•Module type (e.g. LISA-C200) and firmware version
•Module configuration
•Clear description of your question or the problem
•A short description of the application
•Your complete contact details

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Contents
Preface ................................................................................................................................3
Contents..............................................................................................................................4
1System description.......................................................................................................7
1.1 Overview .............................................................................................................................................. 7
1.2 Architecture.......................................................................................................................................... 8
1.2.1 LISA-C200 / FW75-C200 ............................................................................................................... 8
1.3 Pin description ...................................................................................................................................... 9
1.4 Operating modes................................................................................................................................ 10
1.5 Power management ........................................................................................................................... 12
1.5.1 Power supply circuit overview...................................................................................................... 12
1.5.2 Module supply (VCC) .................................................................................................................. 13
1.5.3 VCC application circuits............................................................................................................... 14
1.6System functions ................................................................................................................................ 19
1.6.1 Module power-on ....................................................................................................................... 19
1.6.2 Module power-off....................................................................................................................... 21
1.6.3 Module reset............................................................................................................................... 21
1.6.4 Power-on, Power-off and Reset Sequences.................................................................................. 21
1.6.5 Key points to system functions .................................................................................................... 23
1.7 RF connection..................................................................................................................................... 24
1.8 SIM interface ...................................................................................................................................... 25
1.9 Serial communication ......................................................................................................................... 25
1.9.1 Serial interfaces configuration ..................................................................................................... 26
1.9.2 Asynchronous serial interface (UART)........................................................................................... 26
1.9.3 USB interface............................................................................................................................... 31
1.9.4 MUX Protocol (3GPP 27.010) ...................................................................................................... 34
1.10 DDC (I2C) interface.......................................................................................................................... 34
1.10.1 Overview ..................................................................................................................................... 34
1.10.2 DDC application circuit................................................................................................................ 35
1.11 Audio Interface (LISA-C200)............................................................................................................ 39
1.11.1 Analog Audio interface – LISA-C200 ........................................................................................... 39
1.11.2 Digital (PCM) Audio interface ...................................................................................................... 43
1.12 General Purpose Input / Output (GPIO) ........................................................................................... 45
1.13 Reserved pins (RSVD) ...................................................................................................................... 49
1.14 Schematic for LISA-C200 module integration.................................................................................. 50
1.15 Schematic for FW75-C200 modules integration .............................................................................. 51
1.16 Approvals........................................................................................................................................ 52
1.16.1 LISA-C200 and FW75-C200 US certifications............................................................................... 52
2Design-In.....................................................................................................................53

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2.1 Design-in checklist .............................................................................................................................. 53
2.1.1 Schematic checklist ..................................................................................................................... 53
2.1.2 Layout checklist........................................................................................................................... 53
2.1.3 Antenna checklist ........................................................................................................................ 54
2.2 Connectors (FW75)............................................................................................................................. 54
2.2.1 FW75-C200 modem connector ................................................................................................... 54
2.2.2 FW75-C200 Board to Board host connector ................................................................................ 54
2.2.3 FW75-C200 RF antenna connector.............................................................................................. 55
2.3 Design Guidelines ............................................................................................................................... 55
2.3.1 Layout guidelines per pin function............................................................................................... 55
2.3.2 Footprint and paste mask (LISA-C200 only) ................................................................................. 57
2.4 Antenna guidelines............................................................................................................................. 59
2.4.1 Antenna termination ................................................................................................................... 60
2.4.2 Antenna radiation ....................................................................................................................... 61
2.4.3 Antenna detection functionality .................................................................................................. 62
2.5 ESD immunity test precautions ........................................................................................................... 63
2.5.1 General precautions .................................................................................................................... 65
2.5.2 Antenna interface precautions..................................................................................................... 66
2.5.3 Module interfaces precautions..................................................................................................... 67
3Features description...................................................................................................68
3.1 TCP/IP and UDP/IP............................................................................................................................... 68
3.2 HTTP................................................................................................................................................... 68
3.3 FTP ..................................................................................................................................................... 68
3.4 UTEST................................................................................................................................................. 68
3.4.1 Description .................................................................................................................................. 68
3.4.2 AT+UTEST=0 ............................................................................................................................... 70
3.4.3 AT+UTEST=1 ............................................................................................................................... 70
3.4.4 AT+UTEST=2 ............................................................................................................................... 70
3.4.5 AT+UTEST=3 ............................................................................................................................... 71
3.5 Carrier Provisioning............................................................................................................................. 74
3.5.1 Factory NAM settings .................................................................................................................. 74
3.5.2 Sprint .......................................................................................................................................... 74
3.5.3 Aeris............................................................................................................................................ 79
3.5.4 Verizon........................................................................................................................................ 80
3.5.5 US Cellular .................................................................................................................................. 80
3.5.6 Firmware (upgrade) Over AT (FOAT) ............................................................................................ 81
3.6 AssistNow clients and GNSS Integration.............................................................................................. 82
3.7 Hybrid positioning and CellLocateTM .................................................................................................... 82
3.7.1 Positioning through cellular information: CellLocateTM ................................................................. 83
3.9.2 Hybrid positioning ....................................................................................................................... 84
3.8 Audio File Playback ............................................................................................................................. 85
3.9 Network Status Indicator .................................................................................................................... 85
4Handling and soldering .............................................................................................87

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4.1 Packaging, shipping, storage and moisture preconditioning ............................................................... 87
4.2 Soldering ............................................................................................................................................ 87
4.2.1 Soldering paste............................................................................................................................ 87
4.2.2 Reflow soldering ......................................................................................................................... 87
4.2.3 Optical inspection........................................................................................................................ 89
4.2.4 Cleaning...................................................................................................................................... 89
4.2.5 Repeated reflow soldering........................................................................................................... 89
4.2.6 Wave soldering............................................................................................................................ 89
4.2.7 Hand soldering............................................................................................................................ 89
4.2.8 Rework........................................................................................................................................ 89
4.2.9 Conformal coating ...................................................................................................................... 89
4.2.10 Casting........................................................................................................................................ 90
4.2.11 Grounding metal covers .............................................................................................................. 90
4.2.12 Use of ultrasonic processes.......................................................................................................... 90
Appendix ..........................................................................................................................91
AGlossary ......................................................................................................................91
BMigration from LISA-U to LISA-C200.........................................................................93
Related documents.........................................................................................................101
Revision history..............................................................................................................102
Contact............................................................................................................................103

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1System description
1.1 Overview
u-blox CDMA 1xRTT Cellular ModulesCDMA 1xRTT Cellular Modules CDMA 1xRTT Cellular ModulesCDMA
1xRTT Cellular Modulesintegrate a complete CDMA 1xRTT 153 kb/s packet data modem into the LISA and FW75
form factors.
3G CDMA 2000 1xRTT Characteristics
CDMA Terrestrial Radio Access Frequency Division Duplex (FDD) operating mode
Dual-band support: Band Class 0 – US Cellular : C200
Band Class 1 – US PCS : C200
CDMA Packet Switched data up to 153 kb/s DL/UL
Table 1: 3G CDMA 2000 1xRTT characteristics
The LISA-C200 and FW75-C200 modems are US CDMA-certified to support 1xRTT data speeds on US CDMA
carriers Sprint, Verizon and Aeris.
FW75-C200 is strictly a data modem for embedded solutions while LISA-C200 supports audio (analog and
digital) functionality. Data communication is via two data interfaces; 5-wire UART and Full Speed USB. The
interfaces are intended to support a vast quantity of AT commands that will enable easy adoption to existing
host application processors.
Power-on is initiated by HW logic and Power-down by HW logic and SW control.
The LISA-C2 series antenna interface is provided via a 50 Ωantenna pad, while the FW75-C200 module uses the
popular “U.FL” RF connector(s).
Another key component is the extensive collection of SW AT commands, meeting the needs of:
•Carrier AT commands
•Industry standard AT command both 3GPP and 3GPP2
•u-blox AT Commands

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1.2 Architecture
1.2.1 LISA-C200 / FW75-C200
Wireless
Base-band
Processor
Memory
Power ManagementUnit
RF
Transceiver
19.2 MHz
Diplexer
ANT
LNA
3G PA
LNA
3G PA
UART
USB
GPIOs (**)
Power On
HW Reset (**)
Vcc (Supply)
V_INT (I/O)
(U)SIM
HW shutdown(*)
DDC
Digital Audio (I2S)
Figure 1: Block diagram: FW75-C200, LISA-C200
1.2.1.1 Functional blocks
LISA-C200 and FW75-C200 modules consist of the following internal functional blocks: RF front-end, RF
transceiver, baseband section, and power management unit.
RF Front-End
The antenna connector is directly connected to the diplexer, which separates the 800 and 1900 MHZ bands.
Each 800 & 1900 MHz RF chain is connected to its respective transceiver path via duplexers, as shown in the
block diagram.
Each duplexer provides the filtering and Rx/Tx path separation before connecting to the LNA and RF PA devices.
A separate shield compartment houses the 800 MHZ and 1900 MHZ RF power amplifiers. This compartment
provides high Tx signal isolation, preventing de-sensing of the Rx frontend circuitry.
RF Transceiver
The transceiver includes the following key components:
•Dual-band 800 & 1900 MHz CDMA transceiver, excluding the RF Power Amplifiers, duplexers and diplexer.
•19.2 MHz Crystal Oscillator
While operating, the RF transceiver performs direct up-conversion and down-conversion of the baseband I/Q
signals, with the RF voltage controlled gain amplifier being used to set the uplink TX power. In the downlink
path, the internal LNA enhances the RX sensitivity. An internal automatic gain control amplifier optimizes the
signal levels before delivering the analog I/Q to baseband for further digital processing.
The Rx path locks and tracks to the base station carrier. A learning algorithm is implemented to capture the
temperature characteristic of the xtal, comparing the XO and carrier frequencies, while measuring the thermistor

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in close proximity to the crystal oscillator. A lookup table is saved over temperature and time. The known
frequency difference of the free running crystal oscillator is corrected in the baseband processor enabling quick
acquisition.
Baseband section and power management unit
Another shielding section includes all the digital circuitry and the power supplies, basically the following
functional blocks:
•Wireless baseband mixed signal ASIC, which integrates:
•Microprocessor for controller functions, CDMA upper layer software
•ARM9 coprocessor and HW accelerator for CDMA Layer 1 control software and routines
•Dedicated HW for peripherals control (UART, USB, etc.)
•Memory system in a Multi-Chip Package (MCP) integrating two devices:
•NOR flash non-volatile memory
•DDR SRAM volatile memory
•Power Management Unit (PMU), used to derive all the system supply voltages from the module supply VCC
1.3 Pin description
Table 2 provides a summary of the module pin names and descriptions.
For the exact specification including pin numbering and additional information see the LISA-C2 series Data
Sheet [1] or the FW75-C200 Data Sheet [2].
Name Module Power
domain I/O Description Remarks
VCC All VCC - Module supply Module supply input
V_INT FW75-C200
LISA-C2
-
-
O
O
Digital I/O Interfaces
supply output
Digital I/O Interfaces
supply output
V_INT = 2.85V (typical) generated by the module
when it is switched-on and the RESET_N (external
reset input pin) is not forced to the low level.
V_INT = 1.8V (typical) generated by the module
when it is switched-on and the RESET_N (external
reset input pin) is not forced to the low level.
PWR_ON All POS I Power-on input PWR_ON pin has Internal pull-up resistor.
GPIO1-5 LISA-C2 GDI I/O GPIO
RESET_N LISA-C2 ERS I External reset input RESET_N pin has Internal pull-up resistor.
HW_SHUTDOWN FW75-C200 ERS I External Shutdown input HW_SHUTDOWN pin has Internal pull-up resistor.
ANT(Main RF) All - - Transmit & Receive Primary RF antenna
STATUS FW75-C200 GDI O External transistor base
drive for LED Indicator Indicated by buffered External LED :
Off – not powered
On – powered, associated, and authenticated but
not transmitting or receiving.
Slow Blink – powered,
but not associated or
authenticated; searching.
Intermittent Blink – powered; activity proportional
to transmitting/receiving speed. For voice
applications, turning off and on the intermittent
blink based on the ring pulse cycle can indicate a
ring event.
RI
LISA-C2
FW75-C200
GDI O UART ring indicator Circuit 125 (RI) in ITU-T V.24.
Value at internal reset: T/PU.
Use to wake up host processor. The output signal is
active low.
Internal active pull-up to 1.8 V.
Internal active pull-up to 2.85 V

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Name Module Power
domain I/O Description Remarks
CTS
LISA-C2
FW75-C200
GDI O UART clear to send Circuit 106 (CTS) in ITU-T V.24.
Internal active pull-up to 1.8 V.
Internal active pull-up to 2.85 V.
RTS
LISA-C2
FW75-C200
GDI I UART ready to send Circuit 105 (RTS) in ITU-T V.24.
Internal passive pull-up to 1.8 V.
Internal passive pull-up to 2.85 V.
RXD
LISA-C2
FW75-C200
GDI O UART received data Circuit 104 (RxD) in ITU-T V.24.
Internal active pull-up to 1.8 V.
Internal active pull-up to 2.85 V.
TXD
LISA-C2
FW75-C200
GDI I UART transmitted data Circuit 103 (TxD) in ITU-T V.24.
Internal passive pull-up to 1.8 V.
Internal passive pull-up to 2.85 V.
VUSB_DET All USB I USB detect input Input for VBUS (5 V typical) USB supply sense.
USB_D- All USB I/O USB Data Line D- 90 Ωnominal differential impedance.
Pull-up or pull-down resistors and external series
resistors as required by the USB 2.0 high-speed
specification [10] are part of the USB pad driver
and need not be provided externally.
USB_D+ All USB I/O USB Data Line D+ 90
Ω
nominal differential impedance.
Pull-up or pull-down resistors and external series
resistors as required by the USB 2.0 high-speed
specification [10] are part of the USB pad driver
and need not be provided externally.
MIC_N
MICN1
LISA-C200 AUDIO I Differential analog audio
input (negative)
Differential analog microphone input.
Internal DC blocking 0.1 µF capacitor.
MIC_P
MICP1
LISA-C200 AUDIO I Differential analog audio
input (positive)
Differential analog microphone input.
Internal DC blocking 0.1 µF capacitor.
SPK_P
EPP2
LISA-C200 AUDIO O Differential analog audio
output (positive)
Earpiece differential analog audio output shared for
all path modes
SPK_N
EPN2
LISA-C200 AUDIO O Differential analog audio
output (negative)
Earpiece differential analog audio output shared for
all path modes
PCM_SYNC LISA-C200 GDI O Digital Sync Digital Audio Sync pulse.
PCM_DO LISA-C200 GDI O Data Output Digital Audio Output.
PCM_CLK LISA-C200 GDI O Clock Output Digital Audio Clock Output.
PCM_DI LISA-C200 GDI I Data Input Digital Audio Input.
SCL LISA-C200 DDC O I2C bus clock line Fixed open drain. No internal pull-up.
Value at internal reset: T.
SDA
LISA-C200
DDC
I/O
I2C bus data line
Fixed open drain. No internal pull-up.
Value at internal reset: T.
SIM_CLK LISA-C2
FW75-C200
SIM O SIM clock Value at internal reset: L.
SIM_IO LISA-C2
FW75-C200
SIM I/O SIM data Internal 4.7 k
Ω
pull-up resistor to VSIM.
Value at internal reset: L/PD.
SIM_RST LISA-C2
FW75-C200
SIM O SIM reset Value at internal reset: L.
VSIM LISA-C2
FW75-C200
- O SIM supply output 1.80 V typical or 2.90 V typical generated by the
module according to the SIM card type.
SIM_GND FW75-C200 SIM O SIM GROUND
RSVD All RSVD - RESERVED pin Unless otherwise specified, leave unconnected.
GND All GND - Ground All GND pads must be connected to ground.
Table 2: Pin description summary
1.4 Operating modes
LISA-C200 and FW75-C200 modules have several operating modes. Table 3 defines the operating modes and
Table 4, provides further details and general guidelines for operation.

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General Status Operating Mode Definition
Power-down Not-Powered Mode VCC supply not present or below operating range: module is switched off.
Power-Off Mode VCC supply within operating range and module is switched off.
Normal Operation Idle-Mode Module processor core runs with 32 kHz as reference oscillator.
Active-Mode Module processor core runs with 19.2 MHz as reference oscillator.
Connected-Mode Voice or data call enabled and processor core runs with 19.2 MHz as reference
oscillator.
Table 3: Module operating modes definition
Operating Mode Description Transition between operating modes
Not-Powered Mode Module is switched off.
Application interfaces are not accessible.
When VCC supply is removed, the module enters
not-powered mode.
Idle-Mode Application interfaces are disabled:
The module automatically enters idle-mode
whenever possible if power saving is enabled by
the AT+UPSV command (refer to u-blox C2 series
AT Commands Manual [3]), and TxD pin is put low
by the host, reducing current consumption
Power saving configuration is not enabled by
default: it can be enabled by the AT+UPSV
command (see u-blox C2 series AT Commands
Manual [3]).
The module automatically switches from active-mode
to idle-mode whenever possible if power saving is
enabled (refer to u-blox C2 series AT Commands
Manual [3], AT+UPSV).
The module wakes up from idle-mode to active-mode
in the following events:
•Automatic periodic monitoring of the paging
channel for the paging block reception according
to network conditions
•The TxD pin is released from GND by the host
•The connected USB host forces a remote wakeup
of the module as USB device))
Active-Mode The module is ready to accept data signals from
an external device
When the module is switched on by an appropriate
power-on event, the module enters active-mode from
not-powered.
If power saving configuration is enabled by the
AT+UPSV command, the module automatically
switches from active to idle-mode whenever possible,
and the module wakes up from idle to active-mode in
the events listed above (refer to idle to active transition
description).
When a voice call or a data call is initiated, the module
switches from active-mode to connected-mode.
Connected-Mode A voice call or a data call is in progress.
When a CSD or PSD data call is enabled, the
application interfaces are kept enabled: the
module is prepared to accept data from an
external device.
When a voice call or a data call is initiated, the module
enters connected-mode from active-mode.
When a voice call or a data call is terminated, the
module returns to the active-mode.
Table 4: Module operating modes description

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1.5 Power management
1.5.1 Power supply circuit overview
LISA-C200 and FW75-C200 modules feature a power management concept optimized for the most efficient use
of supplied power. This is achieved by hardware design utilizing a power efficient circuit topology (Figure 2), and
by power management software controlling the module’s power saving mode.
Baseband Processor
Switching
Step-Down
u-blox LISA-C2 series
and FW75-C200
42 µF
VCC
VSIM
V_INT
2 x 3G Power Amplifier(s)
Linear
LDO
Linear
LDO
Switching
Step-Down
Linear
LDO
Linear
LDO
Linear
LDO
I/O
EBU
CORE
Analog
SIM
RTC
NOR Flash
DDR SRAM
RF Transceiver
Memory
Power Management Unit
4.7 µF 2.2 µF
VCC
VCC
Figure 2: Power management simplified block diagram
Pins with supply function are described in Table 5.

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LISA-C200 and FW75-C200 modules must be supplied via the VCC pins. There is only one main power supply
input, available on the three1or five2VCC pins that must all be connected to the external power supply.
The VCC pins are directly connected to the RF power amplifiers and to the integrated Power Management Unit
(PMU) within the module: all supply voltages needed by the module are generated from the VCC supply by
integrated voltage regulators.
When a 1.8 V or a 3 V SIM card type is connected, LISA-C200 and FW75-C200 modules automatically supply the
SIM card via the VSIM pin. Activation and deactivation of the SIM interface with automatic voltage switch from
1.8 to 3 V is implemented, in accordance to the ISO-IEC 7816-3 specifications.
The 2.8 V domain used internally is also available on the V_INT pin, to allow more economical and efficient
integration of the FW75-C200 module in the final application.
The 1.8 V domain used internally is also available on the V_INT pin, to allow more economical and efficient
integration of the LISA-C200 module in its final application.
The integrated Power Management Unit also provides the control state machine for system start-up and system
shut-down control.
1.5.2 Module supply (VCC)
LISA-C200 and FW75-C200 modules must be supplied through the VCC pins by a DC power supply. Voltages
must be stable: during operation, the current drawn from VCC can vary by some orders of magnitude.
Though a module can work within a large voltage range, the module’s performance shall be optimized when the
nominal VCC voltage of 3.8 V DC is applied. It is strongly suggested that a module be powered in design with a
3.8 V DC power supply VCC.
Name Description Remarks
VCC Module power supply input VCC pins are internally connected, but all the available pads or pins
must be connected to the external supply in order to minimize the
power loss due to series resistance.
Clean and stable supply is required: low ripple and low voltage drop
must be guaranteed.
Voltage provided must always be above the minimum limit of the
operating range.
GND Ground GND pins are internally connected but a good (low impedance)
external ground can improve RF performance: all available pads or pins
must be connected to ground.
Table 5: Module supply pins
Higher ESD protection level can be required if VCC is externally accessible on the application board. A
higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG
varistor array) on the line connected to this pin.
The voltage provided to the VCC pins must be within the normal operating range limits as specified in the
LISA-C2 series Data Sheet [1] or, FW75-C200 Data Sheet [2]. Complete functionality of the module is only
guaranteed within the specified minimum and maximum VCC voltage operating range.
Ensure that the input voltage at the VCC pins never drops below the minimum limit of the operating range
when the module is switched on.
Operation above the operating range maximum limit is not recommended and extended
exposure beyond it may affect device reliability.
Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module: if
necessary, voltage spikes beyond VCC absolute maximum ratings must be restricted to values
within the specified limits by using appropriate protection.
1LISA-C200.
2FW75-C200 -

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When designing the power supply for the application, pay specific attention to power losses and transients.
The DC power supply must be able to provide a voltage profile to the VCC pins with the following
characteristics:
•Voltage drop during transmission must be lower than 250 mV
Any degradation in power supply performance (due to losses, noise or transients) will directly affect the RF
performance of the module since the single external DC power source indirectly supplies all the digital and
analog interfaces, and also directly supplies the RF power amplifier (PA).
1.5.2.1 Handling sudden momentary power loss
If the host application board should be susceptible to sudden momentary power loss, then it should ensure
either one of the following during such an event:
•The supply to LISA-C200 VCC pin remains stable as described in section 1.5.2 to keep module powered-on.
•If the host supply cannot sustain the VCC requirements to keep the module powered on during the sudden
momentary power loss, then the supply to the LISA-200 VCC pin should go to 0V to power down the
module. In addition, the falling voltage on the VCC pin must have a minimal of a 2 sec duration timed
during the downward segment between 2.6V to 0V. This will allow the module to reach power-off state.
The module will then be ready to power-up again provided is meets the criteria described in section 1.6.1.
Failure to handle sudden momentary power loss as outlined in section 1.5.2.1 can result in
unpredictable behavior and possible memory corruption within the modem.
1.5.3 VCC application circuits
LISA-C200 and FW75-C200 modules must be supplied through the VCC pins by one (and only one) proper DC
power supply that must be one of the following:
•Switching regulator
•Low Drop-Out (LDO) linear regulator
•Rechargeable Li-Ion battery
•Primary (disposable) battery
Main Supply
Available?
Battery
Li-Ion 3.7 V
Linear LDO
Regulator
Main Supply
Voltage
>5 V?
Switching
Step-Down
Regulator
No, portable device
No, less than 5 V
Yes, greater than 5 V
Yes, always available
Figure 3: VCC supply concept selection
The switching step-down regulator is the typical choice when the available primary supply source has a nominal
voltage much higher (e.g. greater than 5 V) than the LISA-C200 and FW75-C200 modules operating supply

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voltage. The use of switching step-down provides the best power efficiency for the overall application and
minimizes current drawn from the main supply source.
The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low voltage (e.g.
less than 5 V). In this case the typical 90% efficiency of the switching regulator will diminish the benefit of
voltage step-down and no true advantage will be gained in input current savings. On the opposite side, linear
regulators are not recommended for high voltage step-down as they will dissipate a considerable amount of
energy in thermal power.
If LISA-C200 and FW75-C200 modules are deployed in a mobile unit where no permanent primary supply source
is available, then a battery will be required to provide VCC. A standard 3-cell Lithium-Ion battery pack directly
connected to VCC is the usual choice for battery-powered devices. During charging, batteries with Ni-MH
chemistry typically reach a maximum voltage that is above the maximum rating for VCC, and should therefore be
avoided.
The use of primary (not rechargeable) batteries is uncommon, since most available batteries are seldom capable
of delivering the peak current due to high internal resistance.
Keep in mind that the use of batteries requires the implementation of a suitable charger circuit (not included in
LISA-C200 and FW75-C200 modules). The charger circuit should be designed in order to prevent over-voltage
on VCC beyond the upper limit of the absolute maximum rating.
The following sections highlight some design aspects for each of the supplies listed above.
1.5.3.1 Switching regulator
The characteristics of the switching regulator connected to VCC pins should meet the following requirements:
•Power capability: the switching regulator with its output circuit must be capable of providing a voltage
value to the VCC pins within the specified operating range and must be capable of delivering greater than
1.2 Amps for safe design margin.
•Low output ripple: the switching regulator together with its output circuit must be capable of providing a
clean (low noise) VCC voltage profile.
•High switching frequency: for best performance and for smaller applications select a switching frequency
≥600 kHz (since L-C output filter is typically smaller for high switching frequency). The use of a switching
regulator with a variable switching frequency or with a switching frequency lower than 600 kHz must be
carefully evaluated since this can produce noise in the VCC voltage profile. An additional L-C low-pass filter
between the switching regulator output to VCC supply pins can mitigate the ripple on VCC, but adds extra
voltage drop due to resistive losses on series inductors.
•PWM mode operation: it is preferable to select regulators with Pulse Width Modulation (PWM) mode.
While in active mode, Pulse Frequency Modulation (PFM) mode, and PFM/PWM mode, transitions must be
avoided to reduce the noise on the VCC voltage profile. Switching regulators able to switch between low
ripple PWM mode and high efficiency burst or PFM mode can be used to provide the mode transition from
idle mode (current consumption approximately 2 mA) to active mode (current consumption approximately
100 mA). It is permissible to use a regulator that switches from the PWM mode to the burst or PFM mode at
an appropriate current threshold (e.g. 60 mA).
Figure 4 and the components listed in Table 6 show an example of a high reliability power supply circuit, where
the module VCC is supplied by a step-down switching regulator with low output ripple and with fixed switching
frequency in PWM mode operation greater than 1 MHz. The use of a switching regulator is suggested when the
difference from the available supply rail to the VCC value is high: switching regulators provide good efficiency
transforming a 12 V supply to the typical 3.8 V value of the VCC supply.

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u-blox C200
12V
C
6
R
3
C
5
R
2
C
3
C
2
C
1
R
1
VIN
RUN
VC
RT
PG
SYNC
BD
BOOS
T
SW
FB
GN
D
6
7
10
9
5C
7
1
2
3
8
11
4
C
8C 9
L2
D
1R
4
R
5
L1
C
4
U
1
VCC
GND
Figure 4: Suggested schematic design for the VCC voltage supply application circuit using a step-down regulator
Reference Description Part Number – Manufacturer
C1 47 µF Capacitor Aluminum 0810 50 V MAL215371479E3 – Vishay
C2 10 µF Capacitor Ceramic X7R 5750 15% 50 V C5750X7R1H106MB – TDK
C3 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 – Murata
C4 680 pF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71H681KA01 – Murata
C5 22 pF Capacitor Ceramic COG 0402 5% 25 V GRM1555C1H220JZ01 – Murata
C6 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 – Murata
C7 470 nF Capacitor Ceramic X7R 0603 10% 25 V GRM188R71E474KA12 – Murata
C8,C9 22 µF Capacitor Ceramic X5R 1210 10% 25 V GRM32ER61E226KE15 – Murata
D1 Schottky Diode 40 V 3 A MBRA340T3G - ON Semiconductor
L1 10 µH Inductor 744066100 30% 3.6 A 744066100 - Wurth Electronics
L2 1 µH Inductor 7445601 20% 8.6 A 7445601 - Wurth Electronics
R1 470 kΩResistor 0402 5% 0.1 W 2322-705-87474-L - Yageo
R2 15 kΩResistor 0402 5% 0.1 W 2322-705-87153-L - Yageo
R3 22 kΩResistor 0402 5% 0.1 W 2322-705-87223-L - Yageo
R4 390 kΩResistor 0402 1% 0.063 W RC0402FR-07390KL - Yageo
R5 100 kΩResistor 0402 5% 0.1 W 2322-705-70104-L - Yageo
U1 Step Down Regulator MSOP10 3.5 A 2.4 MHz LT3972IMSE#PBF - Linear Technology
Table 6: Suggested components for the VCC voltage supply application circuit using a step-down regulator
1.5.3.2 Low Drop-Out (LDO) linear regulator
The characteristics of the LDO linear regulator connected to the VCC pins should meet the following
requirements:
•Power capabilities: the LDO linear regulator with its output circuit must be capable of providing a proper
voltage value to the VCC pins and of delivering 1.2 A.
•Power dissipation: the power handling capability of the LDO linear regulator must be checked to limit its
junction temperature to the maximum rated operating range (i.e. check the voltage drop from the max input
voltage to the min output voltage to evaluate the power dissipation of the regulator).

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Figure 5 and the components listed in Table 7 show an example of a power supply circuit, where the VCC
module supply is provided by an LDO linear regulator capable of delivering 1.2 Amps, with proper power
handling capability. The use of a linear regulator is suggested when the difference from the available supply rail
and the VCC value is low: linear regulators provide high efficiency when transforming a 5 V supply to the 3.6 V
typical value of the VCC supply.
5V
C
1R1
IN OUT
ADJ
GN
D
1
24
5
3
C
2
R2
R3
U
1
SHD
N
u-blox C200
VCC
GND
Figure 5: Suggested schematic design for the VCC voltage supply application circuit using an LDO linear regulator
Reference Description Part Number - Manufacturer
C1 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V GRM188R60J106ME47 - Murata
C2 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V GRM188R60J106ME47 - Murata
R1 47 kΩResistor 0402 5% 0.1 W RC0402JR-0747KL - Yageo Phycomp
R2 4.7 kΩResistor 0402 5% 0.1 W RC0402JR-074K7L - Yageo Phycomp
R3 2.2 kΩResistor 0402 5% 0.1 W RC0402JR-072K2L - Yageo Phycomp
U1 LDO Linear Regulator ADJ 3.0 A LT1764AEQ#PBF - Linear Technology
Table 7: Suggested components for VCC voltage supply application circuit using an LDO linear regulator
1.5.3.3 Rechargeable Li-Ion battery
Rechargeable Li-Ion batteries connected to the VCC pins should meet the following requirements:
•Maximum pulse and DC discharge current: the rechargeable Li-Ion battery with its output circuit must be
capable of delivering 1.2 A to the VCC pins and must be capable of delivering a DC current greater than the
module maximum average current consumption to VCC pins. The maximum pulse discharge current and the
maximum DC discharge current are not always reported in battery data sheets, but the maximum DC
discharge current is typically almost equal to the battery capacity in Amp-hours divided by 1 hour.
•DC series resistance: the rechargeable Li-Ion battery with its output circuit must be capable of avoiding a
VCC voltage drop greater than 250 mV during peak currents (Max Tx Power).
1.5.3.4 Primary (disposable) battery
The characteristics of a primary (non-rechargeable) battery connected to VCC pins should meet the following
requirements:

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•Maximum pulse and DC discharge current: the non-rechargeable battery with its output circuit must be
capable of delivering 1.2 A to the VCC pins and must be capable of delivering a DC current greater than the
module maximum average current consumption at the VCC pins. The maximum pulse and the maximum DC
discharge current is not always reported in battery data sheets, but the maximum DC discharge current is
typically almost equal to the battery capacity in Amp-hours divided by 1 hour.
•DC series resistance: the non-rechargeable battery with its output circuit must be capable of avoiding a
VCC voltage drop greater than 250 mV during peak currents (Max Tx Power).
1.5.3.5 Additional recommendations for the VCC supply application circuits
To reduce voltage drops, use a low impedance power source. The resistance of the power supply lines
(connected to the VCC and GND pins of the module) on the application board and battery pack should also be
considered and minimized: cabling and routing must be as short as possible in order to minimize power losses.
Three3or five4pins are allocated for VCC supply. Another seven pins are designated for GND connection. Even if
all the VCC pins and all the GND pins are internally connected within the module, it is recommended to properly
connect all of them to supply the module in order to minimize series resistance losses.
The placement of ceramic capacitors on the VCC line on the main board close to the connector will benefit
operation.
To reduce voltage ripple and noise, place the following capacitors near the VCC pins:
•100 nF capacitor (e.g. Murata GRM155R61A104K) to filter digital logic noise from clocks and data sources
•22 µF capacitor (e.g. Murata GRM31CR60J226K) to supply local DC energy
Figure 6 shows the complete configuration but the mounting of each single component depends on the
application design.
3.6V
C1
GND
C2
u-blox C200
VCC
VCC
VCC
+VCC
VCC
LISA-C200
FW75
Figure 6: Suggested schematic design to reduce voltage ripple and noise and to avoid undershoot/ overshoot on voltage drops
Reference Description Part Number - Manufacturer
C1 22 µF Capacitor Ceramic 6.3 V 45 GRM31CR60J226K - Murata
C2 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R61A104KA01 - Murata
Table 8: Suggested components to reduce voltage ripple and noise and to avoid undershoot/ overshoot on voltage drops
3LISA-C200.
4FW75.

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1.6 System functions
1.6.1 Module power-on
The module power-on sequence is initiated in one of these two ways:
•Rising edge on the VCC pin to a valid voltage for module supply AND if the PWR_ON pin is permanently
low when VCC is applied
•Falling edge on the PWR_ON pin (hold pin low for >300 ms)
Name Description Remarks
PWR_ON Power-on input PWR_ON pin has internal pull up resistor. Recommended to
use open collector or drain configuration to pull down.
Table 9: Power-on pin
The PWR_ON pin ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-A114F). Higher
protection level could be required if the line is externally accessible on the application board. Higher
protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor
array) on the line connected to this pin.
1.6.1.1 Rising edge on VCC
When a supply is connected to VCC pins, the module supply supervision circuit controls the subsequent
activation of the power-up state: the module is switched on when the voltage rises up to the VCC operating
range minimum limit (3.4 V). (See LISA-C2 series Data Sheet [1] or the FW75-C200 Data Sheet [2]), provided that
the PWR_ON pin is permanently low when VCC is applied.
1.6.1.2 Falling edge on PWR_ON
The module power-on sequence starts when a falling edge is forced on the PWR_ON input pin. After applying a
falling edge, it is suggested to hold a low level on the PWR_ON signal for at least 300 ms to properly switch on
the module.
The electrical characteristics of the PWR_ON input pin are different from the other digital I/O interfaces: the high
and the low logic levels have different operating ranges. The detailed electrical characteristics are described in
the LISA-C2 series Data Sheet [1] or the FW75-C200 Data Sheet [2].
Once the module has been turned on, PWR_ON pin has no effect. On the other hand it makes no sense to keep
this pin low once the module has been turned on: if the pin is kept low it will draw unnecessary current.
Following are some typical examples of application circuits to turn the module on using the PWR_ON input pin.
The simplest way to turn on the module is to use a push button that shorts the PWR_ON pin to ground.
If the PWR_ON input is connected to an external device (e.g. application processor), it is suggested to use an
open drain output on the external device.

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u-blox C200
PWR_ON
Power-on
push button
ES
D
Open
Drain
Output
Application
Processor u-blox C200
PWR_ON
Figure 7: PWR_ON application circuits using a push button and an open drain output of an application processor
Reference Description Remarks
ESD CT0402S14AHSG - EPCOS Varistor array for ESD protection
Table 10: Example of pull-up resistor and ESD protection for the PWR_ON application circuits
1.6.1.3 Additional considerations
Once the module is powered-on, the proper way to switch off the module is by means of the AT+CPWROFF
command. When the module is in power-off mode, i.e. the AT+CPWROFF command has been sent and a
voltage value within the operating range limits is still provided to the VCC pin, the digital input-output pads of
the baseband chipset (i.e. all the digital pins of the module) are locked in tri-state (i.e. floating). The power down
tri-state function isolates the module pins from its environment, when no proper operation of the outputs can
be guaranteed.
The module can be switched on from power-off mode by forcing a proper start-up event (i.e. a falling edge on
the PWR_ON pin). After the detection of a start-up event, all the digital pins of the module are held in tri-state
until all the internal LDO voltage regulators are turned on in a defined power-on sequence. Then the baseband
core is still held in reset state for a time interval: the internal reset signal (which is not available on a module pin)
is still low and any signal from the module digital interfaces is held in reset state.
The reset state of all the digital pins is reported in the pin description table of the LISA-C2 series Data Sheet [1]
or the FW75-C200 Data Sheet [2] . When the internal signal is released, the configuration of the module
interfaces starts: during this phase any digital pin is set in a proper sequence from the reset state to the default
operational configuration. Finally, the module is ready to operate when all interfaces are configured. However, a
complete boot-up will take 10 seconds to complete due to background software tasks loading.
The Internal Reset signal is not available on a module pin.
LISA-C200: Pay special attention when using voltage level shifter connections. V_INT (1.8V) is
provided to support biasing of level shifter ASICs. A problem can result when external circuitry
back feeds voltage to this V_INT pin at any time, whether ON or OFF. If back feeding occurs it
can result in unpredictable behavior and possible memory corruption within the modem.