Xilinx ML628 User manual

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ML628
Virtex-6 FPGA
GTX and GTH Transceiver
Characterization Board
User Guide
UG771 (v1.0.1) July 6, 2011

ML628 Board User Guide www.xilinx.com UG771 (v1.0.1) July 6, 2011
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Revision History
The following table shows the revision history for this document.
Date Version Revision
03/23/11 1.0 Initial Xilinx release.
07/06/11 1.0.1 Revised link in Appendix D, on page 71 to point to the version of UG806 supporting ISE
software version 13.2.

ML628 Board User Guide www.xilinx.com 3
UG771 (v1.0.1) June 28, 2011
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Preface: About This Guide
Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typographical. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Chapter 1: ML628 Board Features and Operation
ML628 Board Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Board Power and Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Onboard Power Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
GTH Transceiver Power Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
GTX Transceiver Power Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Active Heatsink Power Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FPGA Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
PROG_B Push Button . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DONE LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
INIT LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
System ACE Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
System ACE Controller Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Configuration Address DIP Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
JTAG Isolation Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
200 MHz 2.5V LVDS Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Single-Ended SMA Global Clock Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Differential SMA Global Clock Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SuperClock-2 Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
User LEDs (Active High) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
User DIP Switches (Active High). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
User Push Buttons (Active High) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
User Test I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
GTH Transceivers and Reference Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
GTX Transceivers and Reference Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
USB to UART Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
FMC HPC Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
System Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
I2C Bus Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table of Contents

4www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Appendix A: Default Jumper Positions
Appendix B: VITA 57.1 FMC HPC Connector Pinout
Appendix C: ML628 Master UCF Listing
Appendix D: References

ML628 Board User Guide www.xilinx.com 5
UG771 (v1.0.1) June 28, 2011
Preface
About This Guide
This document describes the basic setup, features, and operation of the ML628
Virtex®-6 FPGA GTX and GTH transceiver characterization board. The ML628 board
provides the hardware environment for characterizing and evaluating the GTX and GTH
transceivers available on the Virtex-6 XC6VHX380T-2C FFG1923 FPGA. The latest revision
of this document is available online at:
http://www.xilinx.com/products/boards/ml628/reference_designs.htm
Guide Contents
This user guide contains the following chapters and appendices:
•Chapter 1, ML628 Board Features and Operation, describes the components, features,
and operation of the ML628 Virtex-6 FPGA GTX and GTH transceiver
characterization board.
•Appendix A, Default Jumper Positions, lists the jumpers that must be installed on the
board for proper operation.
•Appendix B, VITA 57.1 FMC HPC Connector Pinout, provides a pinout reference for
the FPGA mezzanine card (FMC) connector.
•Appendix C, ML628 Master UCF Listing, provides a listing of the ML628 master user
constraints file (UCF).
•Appendix D, References, provides a list of references and links to related
documentation.
To find additional documentation, see the Xilinx website at:
http://www.xilinx.com/support/documentation/index.htm.
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:
http://www.xilinx.com/support.
Conventions
This document uses the following conventions. An example illustrates each convention.
Typographical
The following typographical conventions are used in this document:

6www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Preface: About This Guide
Online Document
The following conventions are used in this document:
Convention Meaning or Use Example
Courier font
Messages, prompts, and
program files that the system
displays
speed grade: - 100
Courier bold Literal commands that you enter
in a syntactical statement ngdbuild design_name
Helvetica bold
Commands that you select from
a menu File → Open
Keyboard shortcuts Ctrl+C
Italic font
Variables in a syntax statement
for which you must supply
values
ngdbuild design_name
References to other manuals See the Command Line Tools User
Guide for more information.
Emphasis in text
If a wire is drawn so that it
overlaps the pin of a symbol, the
two nets are not connected.
Convention Meaning or Use Example
Blue text Cross-reference link to a location
in the current document
See the section “Additional
Resources” for details.
Refer to “Title Formats” in
Chapter 1 for details.
Blue, underlined text Hyperlink to a website (URL) Go to http://www.xilinx.com
for the latest speed files.

ML628 Board User Guide www.xilinx.com 7
UG771 (v1.0.1) June 28, 2011
Chapter 1
ML628 Board Features and Operation
This chapter describes the components, features, and operation of the ML628
Virtex®-6 FPGA GTX and GTH transceiver characterization board. The ML628 board
provides the hardware environment for characterizing and evaluating the GTX and GTH
transceivers available on the Virtex-6 XC6VHX380T-2C FFG1923 FPGA. ML628
schematics, bill-of-material (BOM), layout files and reference designs are available online
at:
http://www.xilinx.com/products/boards/ml628/reference_designs.htm
ML628 Board Features
• Virtex-6 XC6VHX380T-2C FFG1923 FPGA
• On-board power supplies for all necessary voltages
• Power supply jacks for optional use of external power supplies
• JTAG configuration port for use with Platform Cable USB or Parallel Cable III/IV
cables
•SystemACE™controller
• Separate power modules supporting all Virtex-6 FPGA GTX and GTH transceiver
power requirements
• A fixed, 200 MHz 2.5V LVDS oscillator wired to global clock inputs
• Two single-ended global clock inputs with SMA connectors
• Two pairs of differential global clock inputs with SMA connectors
• SuperClock-2 module supporting multiple frequencies
• Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks
• Ten Samtec BullsEye connector pads for the GTX transceivers and reference clocks
•PowerstatusLEDs
• General purpose DIP switches, LEDs, push buttons, and test I/O
• Two VITA 57.1 FMC HPC connectors
• USB to UART bridge
•I
2C bus
• PMBus connectivity to on-board digital power supplies
• Active cooling for the FPGA

8www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
The ML628 board block diagram is shown in Figure 1-1.
Caution! The ML628 board can be damaged by electrostatic discharge (ESD). Follow
standard ESD prevention measures when handling the board.
Detailed Description
Figure 1-2 shows the ML628 board described in this user guide. Each numbered feature
that is referenced in Figure 1-2 is described in the sections that follow.
Note: Figure 1-2 is for reference only and might not reflect the current revision of the board.
X-Ref Target - Figure 1-1
Figure 1-1: ML628 Board Block Diagram
UG771_c1_01_022211
Virtex-6 FPGA
XC6VHX380T-2FFG1923C
12VPower In
FMC Interface
FMC1 FMC2
(ANSI/VITA 57.1-2008v1.1)
System ACE
Controller
System Monitor
Interface
I2C Bus Management
GTX Transceiver
Power Module
FPGA Power Source
On-board Regulation:
VCCINT 1.0Vat 40 Amps
VCCO 2.5Vat 20 Amps
VCCAUX 2.5Vat 20 Amps
Auxiliary Power
On-board Regulation:
5.0Vat 13 Amps
3.3Vat 20 Amps
2.5Vat 20 Amps User GPIO
Push Buttons,
DIP Switches,
and LEDs
200 MHz LVDS Clock,
Differential User SMA Clocks,
Singe-Ended User SMA Clocks
SuperClock-2 Module
USB to UART
Bridge
Transceiver and
Transceiver Clock SMA
GTH QUAD_106
GTH QUAD_107
GTH QUAD_108
GTH QUAD_116
GTH QUAD_117
GTH QUAD_118
Transceiver and
Transceiver Clock SMA
GTX QUAD_100
GTX QUAD_101
GTX QUAD_102
GTX QUAD_103
GTX QUAD_104
GTX QUAD_105
GTX QUAD_112
GTX QUAD_113
GTX QUAD_114
GTX QUAD_115
GTH Transceiver
Power Module

ML628 Board User Guide www.xilinx.com 9
UG771 (v1.0.1) June 28, 2011
Detailed Description
X-Ref Target - Figure 1-2
Figure 1-2: ML628 Board Features
UG771_c1_02_030111
6
1a
1b
1f
1c
1g
1f
1d
21b
1e
1i
18
21a
11
12
13
1415
97
8
5
4
20
12
17
16
22
1j
18
19
19
23
18
11
1e 1h
18
1a Main power switch (SW1) 9 JTAG isolation jumpers (J22, J23, J195, J196)
1b 12V Mini-Fit connector (J122) 10 200 MHz 2.5V LVDS oscillator (U7)
1c 12V ATX connector (J141) 11 Single-ended SMA global clock input (J171, J172)
1d Power regulation jumpers (J30, J32, J61, J102, J104, J105, J129) 12 Differential SMA global clock inputs (J167 - J170)
1e Regulation inhibit (J289) 13 SuperClock-2 module
1f External power supply jacks 14 User LEDs, active High (DS10 - DS17)
1g TI PMBus connector (J14) 15 User DIP switches, active High (SW7)
1h GTX transceiver power supply module 16 User push buttons, active High (SW4, SW6)
1i GTH transceiver power supply module 17 User test I/O (J285)
1j Active cooling power connector (J221) 18 GTX transceiver Connector Pad
2 FPGA configuration connector (J1) 19 GTH transceiver Connector Pad
3 PROG_B push button, active Low (SW5) 20 USB to UART bridge (J9 and U26)
4 DONE LED (DS6) 21a FMC1 connector (J290)
5 INIT LED (DS20) 21b FMC2 connector (J441)
6 System ACE controller (U25) 22 System Monitor
7 System ACE reset, active Low (SW2) 23 I2C bus management (U27)
8 Configuration address DIP switch (SW3)

10 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
Power Management
Numbers 1a through 1j refer to the callouts in Figure 1-2:
1a: Main power switch (SW1)
1b: 12V Mini-Fit connector (J122)
1c: 12V ATX connector (J141)
1d: Power regulation jumpers (J30, J32, J61, J102, J104, J105, J129)
1e: Regulation inhibit (J289)
1f:External power supply jacks (J234, J440, J223, J174, J98, J175, J227, J173, J220)
1g: TI PMBus cable connector (J14)
1h: GTX transceiver power supply module
1i: GTH transceiver power supply module
1j: Active heatsink power connector
Board Power and Switch
The ML628 board is powered through J122 using the 12V AC adapter included with the
board. J122 is a 6-pin (2 x 3) right angle Mini-Fit type connector.
Caution! Do NOT plug a PC ATX power supply 6-pin connector into J122 on the ML628 board. The
ATX 6-pin connector has a different pinout than J122. Connecting an ATX 6-pin connector into J122
will damage the ML628 board and void the board warranty.
Power can also be provided through:
• Connector J141 which accepts an ATX hard disk 4-pin power plug
• Jack J234 which can be used to connect to a bench-top power supply
Caution! Do NOT apply power to J122 and connectors J141 and/or J234 at the same time.
Doing so will damage the ML628 board.
The ML628 board power is turned on or off by switch SW1. When the switch is in the ON
position, power is applied to the board and a green LED (DS36) illuminates.

ML628 Board User Guide www.xilinx.com 11
UG771 (v1.0.1) June 28, 2011
Detailed Description
Onboard Power Regulation
Figure 1-3 shows the onboard power supply architecture.
Note: Power regulation jumpers are not shown in Figure 1-3.
X-Ref Target - Figure 1-3
Figure 1-3: ML628 Board Power Supply Block Diagram
UG771_c1_03_022211
External Supply Jacks
(VCCINT_B)
VCCAUX
VCCO
VCC2V5
VCC3V3
VCC5
J223 J227
J175
J173
J279 J280
J174
J98
Power Controller 1
UCD9240PFC U8
Switching Module PTD08A020W
1.0Vat 20A max U10
Switching Module PTD08A020W
2.5Vat 20A max U12
Switching Module PTD08A020W
PTV12020WAH DC-DC Converter
MGTHAVCCRX
2.5Vat 20A max
Power Controller 2
UCD9240PFC
GTH Transceiver
Power Module
U19
U23
Switching Module PTD08A020W
3.3Vat 20A max
5.0Vat 13A max
U22
U31
Switching Module PTD08A020W
2.5Vat 20A max U13
Power Supply
12VPWR IN
J122 or J141
or J234
MGTHAVCC
Switching Module PTD08A020W
1.0Vat 20A max U41
VCCINT
(VCCINT_A)
J440
J283 J282
MGTHAVTT
MGTHAVCCPLL
J179 J189
MGTAVTT
GTX Transceiver
Power Module
MGTAVCC

12 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
The ML628 board uses power regulators and PMBus compliant digital PWM system
controllers from Texas Instruments to supply the core and auxiliary voltages listed in
Table 1-1. The board can also be configured to use external bench power supply for each
voltage. See Using External Power Sources.
Using External Power Sources
The maximum output current rating for each power regulator is listed in Table 1-1. If a
design exceeds this value on any power rail, power for that rail must be supplied through
the external power jack using a supply capable of providing the required current.
Each power rail has a corresponding jack and jumper that is used to supply voltage to the
rail using an external power supply. The jack, jumper, and regulator for each power rail is
listed in Table 1-1.
Caution! The power regulation jumper (see Power Regulation Jumper column inTa b l e 1 - 1 )
must be removed before applying external power to the power rail through its corresponding
supply jack.
Caution! The external power supply jacks have a maximum current rating of 15A.
Table 1-1: Onboard Power System Devices
Device Reference
Designator Description Power Rail
Net Name
Typical
Voltage
Power
Regulation
Jumper
External
Supply
Jack
Core voltage controller and regulators
UCD9240PFC U8 PMBus compliant digital PWM
system controller (address = 52)
PTD08A020W U10 Adjustable switching regulator
20A, 0.6V to 3.6V
VCCINT11.0V J102 J223
PTD08A020W U41 Adjustable switching regulator
20A, 0.6V to 3.6V
VCCINT
(VCCINT_B)
1.0V J61 J440
PTD08A020W U12 Adjustable switching regulator
20A, 0.6Vto 3.6V
VCCAUX 2.5V J104 J227
PTD08A020W U13 Adjustable switching regulator
20A, 0.6V to 3.6V
VCCO 2.5V J105 J98
Auxiliary voltage controller and regulators
UCD9240PFC U19 PMBus compliant digital PWM
system controller (address = 53)
PTD08A020W U23 Adjustable switching regulator
20A, 0.6V to 3.6V
VCC2V5 2.5V J31 J175
PTD08A020W U22 Adjustable switching regulator
20A, 0.6V to 3.6V
VCC3V3 3.3V J30 J174
5V auxiliary power
PTV12020WAH U31 Switching regulator
13A, 5.0V
VCC5 5.0V J129 J173
Notes:
1. The UCD9240PCF (U8) synchronizes the PTD power stages (U10 and U41) so that a maximum of 40A can be supplied to the
VCCINT rail

ML628 Board User Guide www.xilinx.com 13
UG771 (v1.0.1) June 28, 2011
Detailed Description
Disabling Onboard Power
Voltage regulators U10, U12, U13, U22, U23, and U41 are disabled by installing a jumper at
J289 (TI PWR INHIBIT). Voltage regulator U31 is disabled by installing a jumper across
pins 2–3 of header J24 (AUX POR - RESET).
Default Jumper Positions
A list of shunts and shorting plugs and their required positions for normal board operation
is provided in Appendix A, Default Jumper Positions.
Monitoring Voltage and Current
Voltage and current monitoring and control are available for selected power rails through
Texas Instruments' Fusion Digital Power graphical user interface (GUI). The three onboard
TI power controllers (U8 at PMBUS address 52, U19 at PMBUS address 53, and U32 at
PMBUS address 54) are wired to the same PMBus. The PMBus connector, J14, is provided
for use with the TI USB Interface Adapter PMBus pod and associated TI GUI.
References
More information about the power system components used by the ML628 board are
available from the Texas Instruments digital power website at:
http://www.ti.com/ww/en/analog/digital-power/index.html
GTH Transceiver Power Module
The GTH transceiver power module supplies MGTHAVCC, MGTHAVCCRX,
MGTHAVTT and MGTHAVCCPLL voltages to the FPGA GTH transceivers. Two GTH
power modules are provided with the ML628 board for evaluation. Either of the modules
can be plugged into the connectors J6 and J197 in the outlined and labeled power module
location shown in Figure 1-4.
Note: The GTH and GTX power modules have different connectors and form factors to prevent GTH
modules from being connected to the GTX headers and vice versa.
X-Ref Target - Figure 1-4
Figure 1-4: Mounting Location, GTH Transceiver Power Module
J6 J197
082
H
G
F
E
D
C
B
A
179
GTH POWER MODULE
UG771_c1_04_022211

14 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
Table 1-2 describes the nominal voltage values for the MGTHAVCC, MGTHAVCCRX,
MGTHAVTT and MGTHAVCCPLL power rails. The table also lists the maximum current
ratings for each rail supplied by either module.
The GTH transceiver power rails also have corresponding input voltage jacks to supply
each voltage independently from a bench-top power supply. The external jacks are
indicated in Table 1-3.
Caution! The GTH module MUST be removed when providing external power to the GTH
transceiver rails.
GTX Transceiver Power Module
The GTX transceiver power module supplies MGTAVCC and MGTAVTT voltages to the
FPGA GTX transceivers. Three GTX power modules are provided with the ML628 board
for evaluation. Any one of the three modules can be plugged into connectors J34 and J179
in the outlined and labeled power module location shown in Figure 1-5.
Note: The GTX and GTH power modules have different connectors and form factors to prevent GTX
modules from being connected to the GTH headers and vice versa.
Table 1-2: GTH Transceiver Power Module
Power Supply Rail
Net Name
Nominal
Voltage
Maximum Current
Rating
MGTHAVCC 1.1V 5.10A
MGTHAVCCRX 1.1V 3.45A
MGTHAVTT 1.2V 1.50A
MGTHAVCCPLL 1.8V 2.60A
Table 1-3: GTH External Supply Jacks
Power Supply Rail
Net Name
External Supply
Jack
MGTHAVCC J279
MGTHAVCCRX J280
MGTHAVTT J282
MGTHAVCCPLL J283

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UG771 (v1.0.1) June 28, 2011
Detailed Description
Table 1-4 describes the nominal voltage values for the MGTAVCC and MGTAVTT power
rails. It also lists the maximum current ratings for each rail supplied by GTX modules
included with the ML628 board.
Caution! The Intersil module features an MGTAVCC voltage adjust header, J1. Make sure to
REMOVE any jumper across J1 before powering the board with the Intersil module installed. Failure
to do so may damage the FPGA.
The GTX transceiver power rails also have corresponding input voltage jacks to supply
each voltage independently from a bench-top power supply (The external jacks are shown
in Table 1-4).
Caution! The GTX module MUST be removed when providing external power to the GTX
transceiver rails.
Active Heatsink Power Connector
An active heatsink is provided for the FPGA (Figure 1-6). A 12V fan is affixed to the
heatsink and is powered from the 3-pin header J101.
X-Ref Target - Figure 1-5
Figure 1-5: Mounting Location, GTX Transceiver Power Module
Table 1-4: GTX Transceiver Power Module
Power Supply Rail
Net Name
Nominal
Voltage
Maximum
Current Rating
MGTAVCC 1.025V 10A
MGTAVTT 1.2V 6A
Table 1-5: GTX External Supply Jacks
Power Supply Rail
Net Name
External Supply
Jack
MGTHAVCC J279
MGTHAVCCRX J280
MGTHAVTT J282
MGTHAVCCPLL J283
J179
J34
3
21
139
240
GTX POWER MODULE
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16 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
The fan power connections are detailed in Table 1-6 and shown in Figure 1-7.
X-Ref Target - Figure 1-6
Figure 1-6: Active Heatsink
Table 1-6: Fan Power Connections
Fan Wire Header
Black J101 - GND
Red J101 - 12V
Blue Not Connected
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UG771 (v1.0.1) June 28, 2011
Detailed Description
FPGA Configuration
[Figure 1-2, callout 2]
The FPGA is configured in JTAG mode only using one of the following options:
•PlatformCableUSB
•ParallelCableIV
• Parallel Cable III
• System ACE controller
Detailed information on the System ACE controller is available in
DS080,System ACE CompactFlash Solution.
The FPGA is configured through one of the aforementioned cables by connecting the cable
to the JTAG cable connector, J1.
The FPGA is configured through the System ACE controller by setting the 3-bit
configuration address DIP switches (SW3) to select one of eight bitstreams stored on a
CompactFlash memory card (see Configuration Address DIP Switches, page 19).
The JTAG chain of the board is illustrated in Figure 1-8 (the four System ACE interface
isolation jumpers described in JTAG Isolation Jumpers are not shown). Shorting pins 1–2
on header J162 automatically bypasses the FMC modules, GTH transceiver power supply
module and GTX transceiver power supply module in the chain.
X-Ref Target - Figure 1-7
Figure 1-7: Fan Power Connector (J101)
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18 www.xilinx.com ML628 Board User Guide
UG771 (v1.0.1) June 28, 2011
Chapter 1: ML628 Board Features and Operation
PROG_B Push Button
[Figure 1-2, callout 3]
Pressing the PROG push button (SW5) grounds the active-Low program pin of the FPGA.
DONE LED
[Figure 1-2, callout 4]
The DONE LED (DS6) indicates the state of the DONE pin of the FPGA. When the DONE
pin is High, DS6 lights indicating the FPGA is successfully configured.
X-Ref Target - Figure 1-8
Figure 1-8: JTAG Chain
FMC 2
Connector
TDI
TDO
J441
FMC 1
Connector
TDI
TDO
J290
JTAG
Connector
TDI
TDO
J1
J162
J28
J29
GTXPM_TDI
TI3_TDO UCD9240
PWM System
Controller
TDI TDO
U8
UCD9240
PWM System
Controller
TDI TDO
U19
UCD9240
PWM System
Controller
TDI TDO
U32
System Ace
Controller
TDI CFGTDO
U25
TDO CFGTDI
Virtex-6
FPGA
(DUT)
TDI
U1
TDO
J195
J23
J64
J31
GTH Power
Module
TDI
TDO
J6
Analog
Switch
GTXPM_TDI
GTX Power
Module
TDI
TDO
J179
Analog
Switch
UG771_c1_08_022211
U20

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UG771 (v1.0.1) June 28, 2011
Detailed Description
INIT LED
[Figure 1-2, callout 5]
The INIT LED (DS20) lights during FPGA initialization.
System ACE Controller
[Figure 1-2, callout 6]
The onboard System ACE controller (U25) allows storage of multiple configuration files on
a CompactFlash card. These configuration files can be used to program the FPGA. The
CompactFlash card connects to the CompactFlash card connector (U24) located directly
below the System ACE controller on the back side of the board.
System ACE Controller Reset
[Figure 1-2, callout 7]
Pressing push button SW2 (RESET) resets the System ACE controller. Reset is an
active-Low input.
Configuration Address DIP Switches
[Figure 1-2, callout 8]
DIP switch SW3 selects one of the eight configuration bitstream addresses in the
CompactFlash memory card. The switch settings for selecting each address are shown in
Table 1-7.
JTAG Isolation Jumpers
[Figure 1-2, callout 9]
The group of four 2-pin headers shown in Figure 1-9 provide the option to isolate the
FPGA JTAG interface from the System ACE controller by removing the shunts from all
Table 1-7: SW3 DIP Switch Configuration
Address ADR2 ADR1 ADR0
0O
(1) OO
1OOC
(2)
2OCO
3OCC
4COO
5COC
6CCO
7CCC
Notes:
1. O indicates the open switch position (logic 0).
2. C indicates the closed switch position (logic 1).