Xycom XVME-678 User manual

© 1994 XYCOM, INC.
Printed in the United States of America
PartNumber 74688-002A
XVME-678/688
VMEbus PC/AT
Processor Module
PIN 74688-002A
XYCOM
750 North Maple Road
Saline, Michigan 48176-1292
734-429-4971 (phone)
734-429-1010 (fax)

XYCOM REVISIONRECORD
Revision Description Date
A Manual Released 7/94
Trademark Information
Brand or product names are registered trademarks of their respective owners.
CopyrightInformation
This document is copyrighted by Xycom Incorporated (Xycom) and shall not be reproduced or copied without
expressed written authorization from Xycom.
The information contained within this document is subject to change without notice. Xycom does not guarantee the
accuracy
of the information and makes no commitment toward keeping itup to date.
PartNumber: 74688-002A
Address comments concerningthis
manual to:
xycom
Technical Publications Department
750 North Maple Road
Saline, Michigan48176

TABLE OF CONTENTS
CHAPTER TITLE PAGE
1 INTRODUCTION
1.1 Product Features 1-1
1.2 Manual Structure 1-2
1.3 XVME-678/688 Board Operational Description
1-3
1.3.1 80386SX or 486SLC/e Central Processing Unit (CPU) 1-4
1.3.2 DRAM 1-4
1.3.3 Floppy Drive Controller 1-4
1.3.4 Hard Drive Controller 1-4
1.3.5 Graphics Controller
1-5
1.3.6 110 Ports 1-5
1.3.7 VMEbus Master Interface 1-5
1.3.8 Keyboard Controller 1-5
1.4 Specifications 1-6
2 INSTALLATION
2.1 Introduction
2-1
2.2 Jumpers 2-2
2.2.1 VGA Jumpers (J3, J5) 2-4
2.2.2 EPROM/Flash Jumper (J1) 2-4
2.2.3 IRQ12 Jumper (J8) 2-4
2.2.4 Battery and Test Jumpers (J2, J4) 2-5
2.3 Switch Settings 2-5
2.4 Connectors 2-6
2.4.1 VMEbus
PI Connector 2-8
2.4.2 VMEbus P2 Connector 2-9
2.4.3 Floppy Drive Connector (P4) 2-10
2.4.4 IDE Hard Drive Connector (P5) 2-11
2.4.5 Keyboard Connector (P6) 2-12
2.4.6 Auxiliary Connector (P7) 2-12
2.4.7 COM2 Serial Port Connector (P8) 2-12
2.4.8 COM1 Serial Port Connector (P9) 2-13
2.4.9 VGA Connector (PlO) 2-13
2.4.10 Parallel Port Connector (JKl) 2-14
2.4.11 Speaker Connector
(17) 2-14
2.4.12 PXTI Connector 2-15
2.4.13 PATI Connector 2-16
2.5 Installing the XVME-678/688 into a Backplane 2-17
2.6 Adding Extended
BIOS 2-20
2.7 Installing DRAM 2-22
2.8 Installing an Optional Intel 80387SX Math Co-processor 2-25

Table of Contents
CHAPTER TITLE PAGE
3 BIOS SETUP MENUS
3.1 Introduction
3-1
3.2 Software Control and Initial Setup
3-1
3.3 BIOS Main Menu 3-2
3.3.1 BIOS Setup Menu 3-3
3.3.2 VMEbus Master Setup Menu 3-8
3.3.3 Solid State Disk Setup Menu 3-11
3.3.4 Extended BIOS Features Menu 3-13
3.3.5 System Information Menu 3-16
3.3.6 Diagnostics Menu 3-16
3.3.7 Format Fixed Disk Menu 3-23
4 PROGRAMMING
4.1 Introduction 4-1
4.2 XVME-678/688 Memory Maps 4-1
4.2.1 DRAM 4-7
4.2.2 EPROM 4-8
4.3 Accessing VMEbus Memory Space Using the
Real Mode Window 4-9
4.3.1 EPROM 4-9
4.3.2 VMEbus lACK Space 4-9
4.3.3 VMEbus Short
110 Space 4-10
4.3.4 VMEbus Standard Address Space 4-11
4.4 VMEbus Master Interface 4-12
4.5 Shadow RAM Option 4-14
4.6 110 Port Addresses 4-15
4.6.1 Control Register 1 4-17
4.6.2 Auxiliary Interrupt 4-18
4.6.3 Status Register 1 4-18
4.6.4
Status Register 2 4-19
4.6.5 VMEbus HI Address 4-19
4.6.6 Control Register 2 4-19
4.6.7 Control Register 3 4-20
4.6.8 Control Register 4 4-20
4.6.9 Control Register 5 4-21
4.6.10 Control Register 6 4-21
4.7 Interrupts 4-22
4.7.1 Auxiliary Maskable Interrupts (AMIs) 4-22
4.8 Byte-Swapping 4-26
4.8.1 Byte-Ordering Schemes 4-26
4.8.2 Address Consistency 4-27
ii

CHAPTER
4
5
4.8.3
4.9
4.10
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.3
5.3.1
5.3.2
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.5
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
5.5.6
5.6
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
TITLE
PROGRAMMING (continued)
Numeric Consistency
System Resource Function
CMOS RAM
XVME BIOS FUNCTIONS
XVME BIOS Functions
Miscelleneous Functions
Identify XVME Model
Get Real Mode Window Physical Segment
Get LED Configuration
Set LED Configuration
Get Flash BIOS Write Configuration
Set Flash BIOS Write Configuration
Real Mode Window (RMW) Functions
Get Real Mode Window Configuration
Set Real Mode Window Configuration
XVME-678/688 Manual
July 1994
PAGE
4-28
4-30
4-31
5-1
5-4
5-4
5-5
5-6
5-7
5-8
5-9
Auxiliary Non-maskable Interrupt (ANMI) Functions
Get ANMI Group Configuration
5-10
5-10
5-11
5-12
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-18
5-19
5-21
5-22
5-23
5-24
5-25
5-25
5-26
5-27
5-28
5-30
5-32
Set ANMI Group Configuration
Get ANMI Mask
Set ANMI Mask
Get ANMI Status
Clear ANMI
VMEbus Master Functions
Get VMEbus Master Configuration
Set VMEbus Master Configuration
Get VMEbus Ownership Configuration
Set VMEbus Ownership Configuration
Get VMEbus Ownership Status
Wait for VMEbus Ownership to be Granted
VMEbus Interrupt Handler Functions
Get VMEbus Interrupt Group Configuration
Set VMEbus Interrupt Group Configuration
Get VMEbus Interrupt Mask
Set VMEbus Interrupt Mask
EnablelDisable Specific VMEbus Interrupts
Get VMEbus Interrupt Status
iii

Table of Contents
CHAPTER
5
A
B
C
D
5.6.7
5.6.8
5.7
5.7.1
FIGURE
1-1
2-1
2-2
2-3
2-4
2-5
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
4-1
iv
TITLE PAGE
XVME BIOS FUNCTIONS (continued)
Determine Highest Priority Pending VMEbus Interrupt 5-33
Acknowledge VMEbus Interrupt Via Real Mode Window 5-34
VMEbus System Resource Functions 5-35
Get System Resource Flag 5-35
APPENDICES
VMEbus CONNECTOR/PIN DESCRIPTIONS
QUICK REFERENCE GUIDE
EXTENDED VGA MODES
BLOCK DIAGRAM, ASSEMBLY DRAWING, AND SCHEMATICS
LIST
OF FIGURES
TITLE PAGE
XVME-678/688 Board Block Diagram
1-3
XVME-678/688 Jumper and Switch Locations 2-3
XVME-678/688 Connector Locations 2-7
XVME-678/688 Board Front Panel 2-19
DRAM Installation 2-24
80387SX Math Co-processor Installation 2-25
Main Setup Menu 3-2
BIOS Setup Menu 3-3
VMEbus Master Setup Menu 3-8
Solid State Disk Setup Menu 3-11
Extended BIOS Features Menu 3-13
System Information Menu 3-16
Advanced Diagnostics Menu 3-17
Advanced Diagnostics Test Menu 3-18
Diskette Drive Menu 3-20
Fixed Disk Menu 3-21
Parallel Port Test Menu 3-22
Serial and Parallel Loopback Connections 3-22
Format Fixed Disk Menu 3-23
1 Mbyte Memory Map (as seen by the CPU) 4-2

FIGURE
4-2
4-3
4-4
4-5
4-6
4-7
4-9
4-10
4-11
4-12
4-13
4-14
TABLE
1-1
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
3-1
4-1
4-2
4-3
XVME-678/688 Manual
July 1994
LIST OF FIGURES (continued)
TITLE PAGE
2 Mbyte Memory Map (as seen by the CPU) 4-3
4 Mbyte Memory Map (as seen by the CPU) 4-4
10 Mbyte Memory Map (as seen by the CPU) 4-5
16 Mbyte Memory Map (as seen by the CPU) 4-6
EPROM Memory Map 4-8
BERR Mapped Onto IOCHCK* 4-12
BERR, SYSFAIL, and ABORT Switch Mapped on IRQI04-24
Auxiliary Non-maskable Interrupt Structure 4-25
Byte-Ordering Schemes· 4-26
Maintaining Address Consistency 4-27
Maintaining Numeric Consistency 4-28
Reset Structure 4-30
LIST
OF TABLES
TITLE PAGE
XVME-678/688 Module Specifications 1-6
XVME-678/688 Jumper Options 2-4
XVME-678/688 SWI Switch Settings 2-5
PI Pinouts 2-8
P2 Pinouts 2-9
Floppy Drive Connector 2-10
IDE Hard Drive Connector
2-11
Keyboard Connector 2-12
Auxiliary Connector 2-12
COM2 Serial Port Connector 2-12
COM1 Serial Port Connector 2-13
VGA Connector 2-13
Parallel Port Connector 2-14
Speaker Connector 2-14
PXT1 Pinouts 2-15
PAT1 Pinouts 2-16
Bank and SIMM Size 2-22
Error Codes 3-26
110 Address Map 4-15
110 Addresses Unique to the XVME-678/688 4-16
CMOS RAM Address Map 4-32
v

Chapter 1 - INTRODUCTION
1.1 PRODUCT FEATURES
The XVME-678/688 VMEbus PCIAT processor modules are designed to combine the high-performance
and ruggedized packaging
of the VMEbus with the broad application software base of the IBM PCIAT
standard. These 6U, double-high modules require a single VMEbus slot, are fully AT-compatible, and
support all standard PCIAT software.
The XVME-688 features a low-power CMOS design with an 80386SX processor running at 25 MHz. The
XVME-678 features a Cyrix 486SLC/e running at
25 MHz. The 486SLC/e provides an internal 1 Kbyte
cache, a 486SX-compatible instruction set, and a 80386SX pin out.
Both modules offer the following features:
• 25 MHz 80386SX microprocessor (XVME-688) or 25 MHz 486SLC/e (XVME-678)
• 0, 1, or 4 Mbytes of DRAM
-SIMM sockets for memory expansion up to 16 Mbytes DRAM
-Zero wait state page interleaved DRAM accesses with 60 nsec DRAMs
• Shadow RAM option for System and VGA BIOS
• Super VGA graphics controller with 512 Kbytes of DRAM
• Floppy disk controller
• High-performance IDE hard disk controller
• A socket for an 80387SX math co-processor
• VMEbus master interface
• VMEbus interrupt handler
• Programmable interrupt enable
• Programmable bus request and bus grant levels
• VMEbus slot 1 functions
• Real mode window, allowing VMEbus Short I/O and Standard address space locations to be
accessed while processor
is in real mode
• Two RS-232C serial communication ports
• Centronics-compatible parallel port
• PS/2-compatible keyboard port
• PS/2 AUX port for PS/2-compatible mouse or trackball
• VMEbus SYSFAIL switch
1-1

Chapter 1 - Introduction
1.2 MANUAL STRUCTURE
The chapters in this manual are organized in the following manner:
Chapter One Module Description: functional and environmental specifications, module structure,
VMEbus compliance information, and blo.ck diagram
Chapter Two Installation: system requirements, jumper and switch settings, connector pinouts, and
procedures for installing the XVME-678/688 into a backplane, installing SIMM memory
onto the XVME-678/688, adding extended BIOS. and installing the optional math co-
processor
Chapter Three BIOS Setup Menus: descriptions of menu-driven
BIOS utilities
Chapter Four Programming: information required
to program the module, including memory maps,
I/O maps, and interrupt information
Appendix A VMEbus Connector/Pin Description: VMEbus signals, connectors, pin numbers and
their descriptions
Appendix B Quick Reference Guide: default jumper settings, tables, and graphs
Appendix C Extended VGA Modes: information about extended video modes
Appendix D Block Diagrams, Assembly Drawings,
and Schematics
1-2

XVME-6781688 Manual
July 1994
1.3 XVME-678/688 BOARD OPERATIONAL DESCRIPTION
Figure 1-1 shows the logical arrangement of the XVME-678/688 board.
VGA
CONTROLLER
BUFFERS
SCATSX
DRAM
ATbus
DRAMSIMM
SOCKETS (4)
t..-c ---'{
--~----,
80386SXI
486SLC/e
PROCESSOR
80387SX MATH
CO-PROCESSOR
FLOPPY IDE
VMEbus
MASTER
INTERFACE
Figure 1-1. XVME-678/688 Board Block Diagram
1-3

Chapter 1 - Introduction
1.3.1 80386SX or 486SLC/e Central Processing Unit (CPU)
The XVME-688 uses an 80386SX microprocessor to provide operational capabilities. The XVME-678
uses a Cyrix 486SLC/e that provides a 486SX-compatible instruction set with a 1 Kbyte internal cache.
These 25 MHz CPUs can access
up to 16 Mbytes of DRAM.
1.3.2 ])1lAJ\I
The XVME-678/688 uses Dynamic Random Access Memory (DRAM) configured in a page interleave
mode with 0 wait-state operation. The 1, 4, and 16 Mbyte versions of the XVME-678/688 are two-way
interleaved, while the 2 and
10 Mbyte versions have no interleaving.
The XVME-678/688 comes factory-configured with 0,
1, or 4 Mbytes of DRAM. Additional DRAM can
be installed in 2, 10, and 16 Mbyte configurations. Refer to section 2.7 for more information.
1.3.3
Floppy])rive Controller
The XVME-678/688 floppy drive controller can support
up to two PC/AT-compatible floppy drives.
These drives can be any combination of 360 Kbytes, 720 Kbytes, 1.2 Mbytes, and 1.44 Mbytes.
1.3.4
Hard ])rive Controller
The XVME-678/688 uses the IDE interface for the hard drive controller. This 16-bit interface provides
complete hardware-level compatibility to the
IBM PC/AT hard drive controller. Two drives can be
connected to the interface by daisy chaining the ribbon cable and setting one drive
as the master and one
as the slave. (This requires setting jumpers on the drive. Consult your drive manual for more
information.)
1-4
CAUTION
The IDE ribbon cable should not exceed 18 inches. Otherwise, errors may
occur and data may be corrupted.
Most IDE drives should never be low-level formatted. Check your IDE
drive manual for formatting procedures.

1.3.5 Graphics Controller
XVME-678/688 Manual
July 1994
The XVME-678/688 VGA graphics controller supports all IBM VGA, EGA, CGA, and MDA modes to
the register level. The VGA adapter supports Super VGA up to 1024 x 768 with 16 colors. The VGA
BIOS is 8 bits. Shadowing the BIOS through the BIOS Setup Menu (see Chapter 3 for more information)
significantly increases system performance.
The VGA controller supports
IBM modes 0-13H (hex) as well as other modes. See Appendix C for a
complete list
of supported modes.
1.3.6
I/O Ports
The XVME-678/688 has two RS-232C serial ports and one IBM PC/AT style Centronics-compatible
parallel port. These ports are controlled
in the BIOS Setup Menu which allows the ports to be disabled
or enabled from software. Interrupts are enabled or disabled
by setting bits in 110 registers (refer to
Chapter 5).
1.3.7 VMEbus Master Interface
The VMEbus master interface allows the 80386SX CPU
to become a master or interrupt handler on the
VMEbus. The XVME-678/688 master interface
is invoked whenever the 80386SX accesses the VMEbus
Standard, Short
110, or lACK address spaces. All accesses to the VMEbus are through the Real Mode
Window.
1. 3.8 Keyboard Controller
The XVME-678/688 keyboard controller
is PS/2 compatible and supports not only the PS/2 keyboard,
but also provides an auxiliary input port for a PS/2-compatible mouse, trackball, etc.
1-5

Chapter 1 - Introduction
1.4 SPECIFICATIONS
Table 1-1 contains the functional specifications for the XVME-678/688.
1-6
Table 1-1. XVME-678/688 Module Specifications
SPECIFICATION
Mechanical
Processor
XVME-688
XVME-678
Processor Speed
AT-bus Speed
Math Co-processor (optional)
Graphics Controller
Floppy Disk Interface
Hard Disk Interface
PS/2 AUX Port
Serial Ports
(2)
Parallel Port
Power Requirements
+5 V @ 1.9 A typ., 2.7 A max.
SIMM Memory Configuration
SIMM Sites
Memory Configurations
Memory Accepted
Memory Speed Required
DESCRIPTION
80386SX·
486SLC/e
25 MHz
10 or 8.33 MHz
80387SX
VGA analog output
Max. resolution: 1024 x 768,
16 colors
PC/AT-compatible: supports two
drives-360 Kbyte, 720 Kbyte, 1.2 Mbyte,
and 1.44 Mbyte capacities
IDE controller: supports two drives
Compatible with PS/2 mouse
RS-232C
Centronics compatible
+
12 V @ 2 rnA max.
-12 V @ 1
rnA max.
4
Up to 16* Mbytes
256Kx9, IMx9, or 4Mx9
60 nsec, 0 wait states
80 nsec, 1 wait state
* 0, 1, and 4 lv1bytes of DRAM are available as factory-configured options.

XVME-678/688 Manual
July 1994
Table 1-1. XVME-678/688 Module Specifications (continued)
SPECIFICATION
Environmental
Temperature
Operating
Non-operating
Humidity
Altitude
Operating
Non-operating
Vibration
Operating
Non-operating
Shock
Operating
Non-operating
VMEbus
DESCRIPTION
0° to 65° C (32° to 149°F)
-40°
to 85°C (-40° to 185°F)
5 to 95 %RH, non-condensing
Sea level to 10,000 ft. (3048 m)
Sea level to 50,000 ft. (15240 m)
5 to 2000 Hz
.015" peak to peak displacement
2.5 g max acceleration
.030" peak to peak displacement
5.0 g max acceleration
30 g peak acceleration,
11 msec duration
50 g peak acceleration,
11 msec duration
Complies with VMEbus Specification IEEE 1014
A24/AI6:DI6/D08(EO) Master
R(0-3) Bus Requester
Interrupt Handler IH(I)-IH(7)
SYSCLK and SYSRESET Driver
SGL Arbiter
ROR Option
Form Factor -Double (6U), 233.35 mm x 160 mm (9.2" x 6.3")
1-7

Chapter 2 - INSTALLATION
2.1 INTRODUCTION
This chapter provides the information necessary to configure the XVME-678/688 VMEbus PC/AT
Processor Module. It also provides information on installing the XVME-678/688 into a backplane, adding
extended BIOS
to the XVME-678/688, adding DRAM memory in SIMM sockets, and installing an
optional math co-processor.
WARNING
If the battery is disabled in your system, please do the following: Upon
enabling, your module must be powered up for a minimum of 30 seconds.
Failure to follow this procedure may result in premature battery failure.
WARNING
XVME-678/688 CPU modules with functional revision levels of 4.1 or
higher (functional revision levels and part numbers are located on a label
on the
PI connector) feature a 16-bit compatible PC/104 expansion site.
This PC/104 expansion site requires a new version
of the XVME-956
Modular I/O Carrier Module. If the CPU module's functional revision level
is 4.1 or higher, use the XVME-956/12 (part number 70956-012). If the
functional revision level is less than 4.1, use the XVME-956/2 (part
number 70956-002). Do not use the XVME-956/2 on a CPU module with
functional revision levels
of 4.1 or higher as this may cause damage to
both modules.
Inaddition, the XVME-956/402 SCSI ExpansionModule has beenupdated.
The XVME-956/412 must be used with XVME-678/688 modules that have
a functional revision level
of 4.1 or higher. Use of the XVME-956/402
with the new CPU modules will damage the SCSI Expansion Module and
the CPU.
Please contact Xycom's Customer Service Department at 1-800-289-9266
for assistance.
2-1

Chapter 2 - Installation
NOTE
The XVME-678/688 module obtains power from both the VMEbus PI and
P2 backplanes. However, only
PI is necessary for proper operation.
2.2
JUMPERS
All of the jumpers on the XVME-678/688 are shipped in the correct positions. The unit will function as
required with no modifications.
NOTE
Jumpers only need to be modified when disabling VGA or replacing the
BIOS EPROM with Flash RAM devices.
Jumper locations on the XVME-678/688 module are shown in Figure 2-1. The jumpers are described in
Table 2-1.
2-2