Z3 Technology Z3-DM816X-PCI2-RPS Instruction Manual

Developer’s Guide
Dual 1080p60 Encoding System
High Definition Video Processor Module
DM8168 Multichannel Rapid Prototyping System
Model Name: Z3-DM816X-PCI2-RPS
DOC-USR-0028-01
Manual Version 2.00.00
Software Version 2.00.00
August 15, 2013
Before attempting to connect or operate this product, please read these
instructions carefully and save the manual for future use.

CONFIDENTIAL Z3-DM816X-PCI2-RPS V2.00.00
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Z3 Technology, LLC ♦100 N 8th ST, STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
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Revision History
Version
Date
Change Note
Author
1.0
8/12/13
Original Z3-DM8168-PCI2-RPS document
NC
1.1
8/13/13
Formatting changes
MC
1.2
8/14/13
Added information on power adapter
NC
2.0
8/15/13
Engineering revisions
RC

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Z3 Technology, LLC ♦100 N 8th ST, STE 250 ♦Lincoln, NE 68508-1369 USA ♦+1.402.323.0702
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TABLE OF CONTENTS
1. General Description....................................................................................................................................5
2. Features........................................................................................................................................................7
2.1 Supported Input Resolutions - Encoder ..........................................................................................7
2.2 Supported Output Resolutions –Decoder....................................................................................... 7
3. Thermal Considerations.............................................................................................................................8
4. Standalone Operation ................................................................................................................................9
5. Untarring and Building the Sample Code..............................................................................................10
5.1 Preparing the Linux Environment..................................................................................................10
5.2 Making the Directories and Running the Make Script ................................................................10
6. Code Overview ..........................................................................................................................................12
6.1 The z3apps/rdk directory ............................................................................................................... 12
6.1.1 rdk_demo .................................................................................................................................12
6.1.2 z3_mcfw_api ...........................................................................................................................13
6.1.3 z3...............................................................................................................................................13
6.2 RDK documentation .........................................................................................................................13
7. Running the Demos ...................................................................................................................................15
7.1 Set up the HD Source....................................................................................................................... 15
7.2 Connect the Board ........................................................................................................................... 15
7.2 Set up the Terminal Window ..........................................................................................................16
7.3 Power on the board ......................................................................................................................... 16
7.4 Ensure your PC has a proper IP address .......................................................................................18
7.5 Run the Web Interface to Configure CH1.....................................................................................18
7.6 Run VLC to View Stream .................................................................................................................20
8. Exercising Other Features .......................................................................................................................21
9. Running The Code You Built on the Board ............................................................................................ 22
9.1 Method 1: Updating the Image File .............................................................................................22
9.2 Method 2: Running Your Code through TFTP/NFS .....................................................................24
9.3 Other available u-boot commands................................................................................................28
10. PCI Express .............................................................................................................................................29
10.1 PCIe Lanes and Slots....................................................................................................................... 29
10.2 PCIe BIOS on the PC........................................................................................................................29
10.3 The DM816X-MOD-3X PCIe Hardware...........................................................................................30
Appendix A: Example of Successful Boot Log ............................................................................................31
Appendix B: Troubleshooting ........................................................................................................................39

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LIST OF FIGURES
Figure 1 Z3-DM8168-APP-41 Inputs and Outputs............................................................ 5
Figure 2 Z3-DM816X-MOD-3X .................................................................................. 6
Figure 3 Z3-DM8168-DEB-02 Power Adapter Board ........................................................ 9
Figure 4 Connection Point to the Z3-DM8168-DEB-02 ...................................................... 9
Figure 5 Sample Content of Images Directory after Successful Build .................................. 11
Figure 6 Demo Connections................................................................................... 15
Figure 7 RPS Main Menu ....................................................................................... 17
Figure 8 Web Interface Initial Screen ....................................................................... 18
Figure 9 Web Interface Channel 1 Configuration Tab ..................................................... 19
Figure 10 VLC Network Screen Setting to Receive Z3 TS Stream........................................ 20
Figure 11 Example of Z3 Video Streaming on VLC......................................................... 20
Figure 12 Updating the Device Firmware from the Web Interface...................................... 22
Figure 13 Browsing for the Image File in the Updater .................................................... 23
Figure 14 Editing u-boot-env-netra-rdk.txt ............................................................... 26
Figure 15 Minicom Terminal Settings ........................................................................ 26
Figure 16 Minicom Paste File Selection ..................................................................... 27
Figure 17 Example of Successful u-boot Configuration ................................................... 27

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1. General Description
The Z3-DM816X-PCI2-RPS is a development system that allows dual encode and single decode of 1080p60
video on media-centric PCI Express applications. The hardware consists of one Z3-DM816X-MOD-3X System
on Module card with one Z3-DM8168-APP-41 PCI Express application board. The software consists of Linux
kernel and application packages to allow users to develop their own advanced multimedia, graphics and
DSP applications.
The Z3-DM8168-APP-41 application board includes 2 HDMI 1080p60 inputs and 1 HDMI 1080p60 output. It
includes a 2-lane PCIe interface that can plug into a 4-lane or 16-lane PCIe slot or a 1-lane PCIe slot with
open back. It has been proven on an ASUS motherboard (model P8H67-M, PRO/CSM, revision 3.0).
In order to make custom hardware and software development easier, the Z3-DM816X-PCI2-RPS is designed
to allow standalone operation so that the system can be developed and tested independently of any hosts.
To allow this, the Z3-DM8168-APP-41 contains independent power and Ethernet jacks, allowing for direct
connection without any hosts. Figure 1 shows a picture of the Z3-DM8168-APP-41 and its main interfaces.
Figure 1 Z3-DM8168-APP-41 Inputs and Outputs
89 mm
168 mm
HDMI In 1
HDMI In 2
HDMI Out
Ethernet

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The Z3-DM816X-MOD-3X is a compact OEM module which supports H.264 High Profile encode/decode at up
to two channels of 1080p at 60 fps (frames per second). It includes the interface used to connect the
serial port. The Z3-DM8168-MOD-3X features a unique expansion interface comprised of five high density
connectors providing access to most of the interface signals available from the DM8168 processor. below
shows the Z3-DM8168-MOD-3X System on Module:
The Z3-DM8168-PCI2-RPS software is based on the Linux OS. The kit comes with all of the low-level
resources such as the Linux kernel, u-boot, tool chain and starter file system pre-integrated and
configured. There is no need to port or integrate OS functions, media functions etc. The software bundle
also contains tools to allow the development of high-level applications using hardware-accelerated video
processing, DSP, and graphics. Those customers that license the optional source code package can also
receive source code for Z3’s demonstration applications, providing an ideal starting point for custom
applications.
Additional design services and support are available from Z3 Technology. Please contact Z3 at
http://www.z3technology.com or e-mail at [e-mail].
General Note: In the software and log files, there may be references to DM8169. For the purposes of this
documentation, the menus, the log files, and the delivered software, the customer can consider DM8168 as
equivalent to DM8169 (and equivalent to any references of DM816X).
Figure 2 Z3-DM816X-MOD-3X
Serial
68 mm
108 mm
mm

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2. Features
2 HDMI 1.4a Inputs at up to 1080p60
1 HDMI video output at up to 1080p60
PCI Express 2-lane add-in card footprint provides high bandwidth communication with a PCI host
Standalone operation independent of host for easy development
Independent 1GB Ethernet and serial I/O connections
Pre-integrated, ready to run hardware and software provides for zero development start-up time
Modular approach allows for rapid and cost-effective deployment of customer’s applications
2.1 Supported Input Resolutions - Encoder
HDMI: 1080p60, 1080p50, 1080i30, 1080i29.97, 1080i25, 720p60, 720p59.94, 720p50, 576p50,
576i25, 480p60, 480i30, and 480i29.97
2.2 Supported Output Resolutions –Decoder
HDMI: 1080p60, 720p60

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3. Thermal Considerations
The main processor on the Z3-DM816X-MOD-3X generates a large amount of heat, and is cooled by a fan
and a heat sink. The heat sink may reach temperatures in excess of 75°C during operation. Please make
sure that the airflow for the heat sink is free and unimpeded at all times. Hot air must have a place to
escape to allow for room air to be used to cool the chip. Failure to do so may result in permanent damage
to the processor.
The maximum continuous power consumption by the whole Z3-DM816X-MOD-3X system during normal
operation should be less than 18W, with up to 14W dissipated by the main processor. Please plan the
cooling strategy appropriately.

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4. Standalone Operation
Standalone operation of the Z3-DM816X-PCI2-RPS is enabled through the Z3-DM8168-DEB-02 (or Z3-DEBUG-
02) adapter board (Figure 3). This board allows the user to power the board using the standard 12V power
supply shipped with the Z3-DM816X-PCI2-RPS. It connects to the Z3-DM8168-APP-41 board using a 6-pin
connector located at J25 (Figure 4). To attach, carefully insert the connector into the pins, applying even
pressure until the connector is even with the socket at J25.
Note: Once the Z3-DM8168-DEB-02 is connected to the Z3-DM8168-APP-41, it is recommended that the 2
boards stay connected. If you must disconnect the boards, you can do so very gently using a needle-nose
pliers to grab either side of the plastic header and then gently pulling upward to separate. Do not pull on
the gray ribbon. Pulling on the gray ribbon increases the chance of breaking the wires.
Figure 4 Connection Point to the Z3-DM8168-DEB-02
Connect here
Figure 3 Z3-DM8168-DEB-02 PowerAdapter Board

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5. Untarring and Building the Sample Code
5.1 Preparing the Linux Environment
Prior to building the Z3 sample code, certain modules are required. In Ubuntu 10.x, the following
command can be used to get the required modules:
sudo apt-get install bison flex mtd-utils liblzo2-dev uuid-dev zlib1g-dev
libpcre3-dev autoconf autoconf-archive automake automake1.9 automake1.9-doc
libtool libtool-doc
In Fedora, the command would be:
sudo yum install bison flex mtd-utils mtd-utils-ubi lzo-devel libuuid-devel
pcre-devel automake automake17 automake14 autoconf libtool
If you are running a 64-bit OS, it may be necessary to install some 32-bit libraries for the cross-compiling
toolchain. You can determine whether your OS is 64-bit by using the “uname –p” command. A 64-bit OS
will return “x86_64,” while a 32-bit OS will return “i386”, “i586”, or “i686”.
For 64-bit Ubuntu, you can get the necessary libraries by typing:
# sudo apt-get install ia32-libs
For 64-bit Fedora, you can type:
# sudo yum install glibc.i686
5.2 Making the Directories and Running the Make Script
The software provided will allow you to re-create the pre-installed software of the DM816X-PCI2-RPS
starting from the included source code.
On a PC running Linux, create a directory where the released materials are going to be located:
# mkdir /home/z3/z3-netra-rdk
Copy the released tar archive to that directory:
# cp SW-6R2-00056-01_DM8168-PCI2-RPS-SRC-20130814.tar.bz2 /home/z3/z3-netra-rdk
Untar the archive:
# tar -xvjf SW-6R2-00048-01_DM8168-MC-RPS-SRC-20130724.tar.bz2
Note: Untarring could take 5 to 10 minutes.
Then go into the directory just created and run the build script:
# cd z3-netra-DM8168-PCI2-RPS-20130814
# ./makeall
Note: Building can take around 30-40 minutes. You will also need to type in the sudo password a few
times towards the end of the build.

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The outcome of the build process should be newly created image files in the images directory. You can
confirm this by doing the following:
# cd images
# ls -alt
The result should be something like the following. Note that actual filenames, dates, and times will differ.
Figure 5 Sample Content of Images Directory after Successful Build

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6. Code Overview
Once you have untarred the code, you will see the following top-level directories:
build-tools Config files and scripts for building the codebase
dvr-rdk A modified version of the TI RDK code
factory Factory testing scripts (the user can disregard these)
filesys The base filesystem for release
kernels Kernel code for release
sysapps Various supporting applications
toolchain The ARM toolchain for building the codebase
u-boot u-boot code for release
z3apps Z3 demo application code and scripts
The Z3 demo code that comes with the Z3-DM816X-PCI2-RPS is run from the run.sh script in dvr-
rdk/dvr_rdk/bin/ti816x . This code calls the z3_dvr_rdk_demo_mcfw_api.out binary, which initializes and
runs the encoder. This binary is built from the dvr-rdk directory. The code for the binary resides in
z3apps/rdk/rdk_demo. The z3apps/rdk directory is described in more detail in the next section.
6.1 The z3apps/rdk directory
There are 3 main subdirectories: rdk_demo, z3_mcfw_api, and z3
6.1.1 rdk_demo
This directory contains the code for the various modes that Z3’s boards are able to run in. The encoder
setup is done in demo_vcap_vdis.c. The decoder setup is done in demo_vdec_vdis.c. The passthrough
setup is done in demo_vcap_vdis.c.
The file demo_rtptx.c is responsible for setting the output mode of the encoder. Output to file, rtp, and
MPEG2-TS are handled here.
The file demo_mcsenc.c contains the implementation of the command line interface. This can be run
using the following command:
# source /opt/mcsenc/mcsenc.sh

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6.1.2 z3_mcfw_api
This directory contains a modified version of the TI mcfw api (found in dvr-
rdk/dvr_rdk/mcfw/src_linux/mcfw_api) that is tailored to work with Z3’s hardware and use-cases. The
link setup code for Z3’s demos can be found in the usecases directory. The use-case code is called from
ti_vsys.c in the same directory.
6.1.3 z3
This directory contains the base code for rtp tx and rx, as well as the base code for audio capture and
output.
6.2 RDK documentation
Documentation on the RDK can be found in dvr-rdk/dvr_rdk/docs. Below is a list of some of the major
documentation available:
Docs
├── DM81xx_DVR_RDK_Install_Guide.pdf
├── DM81xx_DVR_RDK_MainPage.pdf
├── DM81xx_DVR_RDK_Release_Notes.pdf
├── DM81xx_DVR_RDK_Release_Summary.pdf
├── AppNotes
│├── DM8107_DVR_RDK_DM8107DVR_SchematicChanges_BCH120.pdf
│├── DM8107_DVR_RDK_PowerSavings.pdf
│├── DM8168_DVR_RDK_AVS_User_Guide.pdf
│├── DM81xx_DVR_RDK_960H_Notes.pdf
│├── DM81xx_DVR_RDK_App_Notes_Summary.pdf
│├── DM81xx_DVR_RDK_Audio_Notes.pdf
│├── DM81xx_DVR_RDK_AVSync_Notes.pdf
│├── DM81xx_DVR_RDK_Boot_Logo_and_External_Device.pdf
│├── DM81xx_DVR_RDK_Customer_Display_Resolution.pdf
│├── DM81xx_DVR_RDK_Debug_Statistics.pdf
│├── DM81xx_DVR_RDK_Display_Output_Configuration.pdf
│├── DM81xx_DVR_RDK_Ethernet_Offload_Driver.pdf
│├── DM81xx_DVR_RDK_External_Video_Device_Configuration.pdf
│├── DM81xx_DVR_RDK_Flash_File_FS.pdf
│├── DM81xx_DVR_RDK_Graphics_Using_FBDev.pdf
│├── DM81xx_DVR_RDK_HDMI_Control_Notes.pdf
│├── DM81xx_DVR_RDK_Memory_Map.pdf

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│├── DM81xx_DVR_RDK_Minimal_Root_File_System.pdf
│├── DM81xx_DVR_RDK_Network_Stack_Optimization_Techniques_for_Multichannel_NVR.pdf
│├── DM81xx_DVR_RDK_PLL_Print_Utility.pdf
│├── DM81xx_DVR_RDK_Qt_Installation_Guidelines.pdf
│├── DM81xx_DVR_RDK_SCD_AlgorithmIntegration.pdf
│├── DM81xx_DVR_RDK_Software_OSD_Notes.pdf
│└── DM81xx_DVR_RDK_Software_OSD_Text_Render_Notes.pdf
├── software_manifest.htm
├── TestReports
│├── DM810X_DVRRDK_Test_Report_04.00.00.03.xls
│├── DM814X_DVRRDK_Test_Report_04.00.00.03.xls
│├── DM816X_DVRRDK_Test_Report_04.00.00.03.xls
│└── HDMITestReports
├── Trainings
│└── DVR_RDK_McFW_Link_API_Training.pdf
├── Usecases
│├── DM810x_DVR_RDK_UseCaseGuide_4D1_8CIF_16CIF_DVR.pdf
│├── DM810x_DVR_RDK_UseCaseGuide_Decode_Display.pdf
│├── DM814x_DVR_RDK_UseCaseGuide_4D1_8CIF_16CIF_DVR.pdf
│├── DM814x_DVR_RDK_UseCaseGuide_Decode_Display.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_16D1_DVR.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_32D1_Decode_Display.pdf
│├── DM816x_DVR_RDK_UseCaseGuide_SD_HD_Encode_Card.pdf
│└── DM81xx_DVR_RDK_Interlace_UseCaseGuide.pdf
└── UserGuides
├── DM8168_DVR_RDK_GUI_Guide.pdf
├── DM816x_FAPLL.xls
├── DM81xx_DVR_RDK_Demo_Guide.pdf
├── DM81xx_DVR_RDK_FAQs.pdf
├── DM81xx_DVR_RDK_IPC_Bits_Out_Host.pdf
├── DM81xx_DVR_RDK_Migration_Guide.pdf
├── DM81xx_DVR_RDK_Overview.pdf
├── DM81xx_DVR_RDK_PSP_Arago.pdf
├── DM81xx_DVR_RDK_SCD_DMVAL_FAQs.pdf
├── DMVAL_API_and_UsersGuide.pdf
├── DVR_RDK_ApiGuide.CHM
└── SCD_TI_API_UsersGuide_v00.50.pdf

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7. Running the Demos
This section gives step-by-step instructions on taking the DM8168-PCI2-RPS and using it to stream 1080p or
1080i video to VLC running on your PC.
7.1 Set up the HD Source
(1) Select an HD source with HDMI non-HDCP output (in Z3’s testing, the Brite-View BV-5005HD is used).
-Power on the HD Source
-Connect HDMI to a monitor
-Set the HD Source to 1080p or 1080i output
-Select content you would like to stream
7.2 Connect the Board
For these steps, please refer to Figure 6.
(2) Connect the supplied 2.5mm serial cable and NULL modem adapter to your PC.
(3) Take the HDMI cable connected to the monitor and connect it to HDMI In 1 of the board.
(4) Connect the Ethernet
The next step is to set up a terminal to view the activity of the board …
Serial
Connection to 12V
power via debug
board (standalone)
Ethernet
Figure 6 Demo Connections
HDMI In 1
HDMI In 2
HDMI Out
Connection to 12V power
via PCI Express

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7.3 Set up the Terminal Window
(5) If you are running from a Windows PC, run TeraTerm. Select “Setup – Serial Port” and set the
following:
Port: Whichever serial port the port is connected to
Baud Rate: 115200
Data: 8-bit
Parity: None
Stop: 1-bit
Flow Control: None
(6) If you are running from Linux, type:
# sudo minicom –s
And then configure by doing the following:
-Select “Serial Port Setup”
-Ensure the right Serial Device is specified (typically “/dev/ttyUSB0”)
-Set option E (“Bps/Par/Bits”) to 115200 8N1
-Press <return>
-Select “Exit”
7.4 Power on the board
(7) If using the board in standalone mode, connect the 12V power supply and turn on the switch. If using
the board in a PCI slot, insert it in the PCI slot if you haven’t already and turn on the host PC (note:
Hot-plug insertion and removal of the board is supported).
If all is configured properly, you should see the board booting up within the terminal window. After
about a minute, you will see the RPS Main Menu (Figure 7).

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Note the local IP address and netmask (in this example, it is 192.168.0.81 and 255.255.255.0). This is the
IP address of the board. You will need this later to access the web interface.
Figure 7 RPS Main Menu

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7.5 Ensure your PC has a proper IP address
(8) To be able to communicate with the board, the PC that you are communicating from needs to have the
same first 2 parts of the IP address. For example, if the board has an IP address of 192.168.0.81, your
PC would need to have an address of 192.168.x.y, where y is anything but 81 (and not conflicting with
whatever is on your current network, of course). Ensure that this is the case. If necessary, use the “P”
and “N” options to modify the address/network of the board to conform to your network. Note that
the first 2 parts being the same are based on a value of netmask of 255.255.0.0. If netmask were
255.255.255.0 (as it is in the previous screenshot), for example, then the first 3 parts of the IP address
would have to be the same.
After you are done, make note of the address you set it to. This will be important in the streaming
step.
7.6 Run the Web Interface to Configure CH1
(9) In your PC, run a web browser (for best results, Z3 recommends FireFox or Chrome). In this browser,
type the IP address of the board noted in step (7) (for example, if the default value is used, it would
be http://192.168.0.81). After about 3 seconds, the control menu should come up:
Figure 8 Web Interface Initial Screen

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(10) Click on the “CH1” tab
(11) You should see the Channel 1 configuration tab. In this tab, set “Output Format” to UDP and “Dest
Address” to the IP address of your PC (in this example, 192.168.0.2) Also make note of the value of
“Dest Port” (should be 5004 by default):
(12) Click “start”. The status should change from “IDLE” or “STOPPED” to “RUNNING”
Figure 9 Web Interface Channel 1 Configuration Tab
(a) Change format to UDP
(a) Change Dest Address to PC IP address
(c) Note Dest Port (will use in VLC)
(d) Click “start”

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7.7 Run VLC to View Stream
(13) Run VLC on your PC (version used in testing at Z3: 2.05)
(14) Select Media –Open Network Stream. In the box, type “udp://@192.168.0.2:5004”, where
“192.168.0.2” is the IP address of your PC, and 5004 is the value of “Dest Port” noted in step (11).
(15) Press “Enter.”
(16) You should now see video streaming to VLC:
Figure 10 VLC Network Screen Setting to Receive Z3 TS Stream
Figure 11 Example of Z3 Video Streaming on VLC