Acromag AcroPack AP445 Series User manual

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Series AP445 AcroPack
32-Channel Isolated Digital Output Module
USER’S MANUAL
ACROMAG INCORPORATED
30765 South Wixom Road
Wixom, MI 48393-2417 U.S.A.
Tel: [phone]
Fax: [phone]
Copyright 2016, Acromag, Inc., Printed in the USA.
Data and specifications are subject to change without notice.
8501052E

SERIES AP445 ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 1 - http://www.acromag.com
- 1 -
www.acromag.com
Table of Contents
1.0 GENERAL INFORMATION..........................................................................................4
1.1 Intended Audience .......................................................................................................4
1.2 Preface.........................................................................................................................4
1.2.1 Trademark, Trade Name and Copyright Information .................................................................. 4
1.2.2 Class A Product Warning............................................................................................................. 4
1.2.3 Environmental Protection Statement ......................................................................................... 4
1.3 AcroPack Information –All Models...............................................................................4
1.3.1 Ordering Information ................................................................................................................. 5
1.3.2Key Features............................................................................................................................... 5
1.3.3 Key Features PCIe Interface........................................................................................................ 6
1.4 Signal Interface Products ..............................................................................................6
1.5 Software Support .........................................................................................................7
Windows............................................................................................................................................ 7
VxWorks............................................................................................................................................ 7
Linux.................................................................................................................................................. 7
1.6 References ...................................................................................................................7
2.0 PREPARATION FOR USE..............................................................................................8
2.1 Unpacking and Inspecting.............................................................................................8
2.2 Installation Considerations ...........................................................................................9
2.3 Board Configuration .....................................................................................................9
2.4 Field I/O Connector ......................................................................................................9
Table 2.1: Field I/O Connector Pin Assignments ........................................................................... 9
2.5 Noise and Earth Grounding Considerations .................................................................14
2.6 Logic Interface Connector ...........................................................................................14
Table 2.2: Logic Interface Connections........................................................................................ 14
3.0 PROGRAMMING INFORMATION............................................................................ 16
CONFIGURATION REGISTERS................................................................................................................16

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Table 3.1: Configuration Registers .............................................................................................. 17
Memory Map.......................................................................................................................................17
Table 3.2: AP445.......................................................................................................................... 17
Memory Map............................................................................................................................... 17
Software Reset Register (Write Only) - (BAR0 + 0x0000 0000) .............................................................18
Table 3.3: Reset Register ............................................................................................................. 18
Module Location In System Register (Read Only) - (BAR0 + 0x0000 0004)............................................18
Table 3.4: Location Register ........................................................................................................ 18
Port Output Register (Read/Write) - (BAR0 + 0x0000 0008) .................................................................18
Table 3.5: Port Output Register................................................................................................... 18
XADC Status/Control Register (Read/Write) –(BAR0 + 48H).....................................................19
XADC Address Register (Write Only) –(BAR0 + 4CH) ..................................................................19
Table 3.6: System Monitor Register Map .................................................................................... 20
Table 3.7 FPGA Voltage and Temperature Range...................................................................... 20
Firmware Revision Register (Read Only) –(BAR0 + 0x0000 0200) ...........................................20
4.0 THEORY OF OPERATION.......................................................................................... 21
4.1 Logic/Power Interface ................................................................................................21
4.2 Output Ports ..............................................................................................................21
5.0 SERVICE AND REPAIR............................................................................................... 23
5.1 Service and Repair Assistance .....................................................................................23
5.2 Preliminary Service Procedure ....................................................................................23
5.3 Where to Get Help......................................................................................................23
6.0 SPECIFICATIONS......................................................................................................... 24
6.1 Physical......................................................................................................................24
6.2 Power Requirements ..................................................................................................24
6.3 Environmental Considerations....................................................................................24
6.3.1 Operating Temperature.............................................................................................................24
6.3.2. Relative Humidity .....................................................................................................................24
6.3.3Isolation ....................................................................................................................................25
6.3.4Vibration and Shock Standards..................................................................................................25
6.3.5EMC Directives ..........................................................................................................................25
6.4 Reliability Prediction ....................................................................................................26
Table 6.1 AP445E-LF.............................................................................................................................26

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6.5 OUTPUTS....................................................................................................................26
6.6 PCIe Bus Specifications ...............................................................................................26
Table 6.6 PCIe Bus Data Rates..............................................................................................................27
APPENDIX A .......................................................................................................................... 28
AP-CC-01 Heatsink Kit Installation......................................................................................28
APPENDIX B .......................................................................................................................... 31
Figure 1 AP445 Block Diagram .............................................................................................................31
Figure 2 AP445 Digital Out to AP440 Digital In .....................................................................................31
Figure 3 AP445 to AP440 Loopback Connections..................................................................................32
CERTIFICATE OF VOLATILITY ........................................................................................ 33
REVISION HISTORY ............................................................................................................ 34

SERIES AP445 ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 4 - http://www.acromag.com
- 4 -
www.acromag.com
1.0 GENERAL INFORMATION
1.1 Intended Audience
This user’s manual was written for technically qualified personnel who will
be working with I/O devices using the AcroPack module. It is not intended
for a general, non-technical audience that is unfamiliar with I/O devices and
their application.
1.2 Preface
The information contained in this manual is subject to change without
notice, and Acromag, Inc. (Acromag) does not guarantee its accuracy.
Acromag makes no warranty of any kind with regard to this material,
including, but not limited to, the implied warranties of merchantability and
fitness for a particular purpose. Further, Acromag assumes no responsibility
for any errors that may appear in this manual and makes no commitment to
update, or keep current, the information contained in this manual. No part
of this manual may be copied or reproduced in any form, without the prior
written consent of Acromag,
1.2.1 Trademark, Trade Name and Copyright Information
© 2016 by Acromag Incorporated.
All rights reserved. Acromag and Xembedded are registered trademarks of
Acromag Incorporated. All other trademarks, registered trademarks, trade
names, and service marks are the property of their respective owners.
1.2.2 Class A Product Warning
This is a Class A product. In a domestic environment this product may cause
radio interference, in which case the user may find it necessary to take
adequate corrective measures.
1.2.3 Environmental Protection Statement
This product has been manufactured to satisfy environmental protection
requirements where possible. Many components used (structural parts,
circuit boards, connectors, etc.) are capable of being recycled. Final
disposition of this product after its service life must be conducted in
accordance with applicable country, state, or local laws or regulations.
1.3 AcroPack Information –All Models
The AcroPack IO modules are based on the PCI Express Mini Card
Electromechanical specification and are 70mm in length with an added 100
pin field I/O connector.

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USER’S MANUAL
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The AcroPack is 19.05mm longer than the full length mini PCIe card at
50.95mm. It has the same mPCIe board width of 30mm and uses the same
mPCIe standard board hold down standoff and screw keep out areas.
The AP445 module is a bus isolated 32-channel output module. It provides
control for 32 solid state relays which are bipolar (may be used to switch
positive or negative voltages). The AP445 utilizes state of the art Surface-
Mounted Technology (SMT) to achieve its wide functionality and is an ideal
choice for a wide range of industrial I/O applications that require a high-
density, highly reliable, high-performance interface at a low cost.
1.3.1 Ordering Information
The AP445 AcroPack module is available in one model as described in the
following table.
Model Number
Description
AP445E-LF1
32 channel, isolated output module
Note 1: Operating temperature range for models:-40oCto 85oC
AP-CC-01
AcroPack Heatsink Conduction
Cool Kit
See Appendix A for installation instructions.
1.3.2 Key Features
High Channel Count –Individual control of up to 32 (SPST-NO)
bipolar Solid State Relays (SSR’s) is provided.
Isolated Field I/O –Individual bipolar SSR’s provide isolation. There
are four groups (ports) of 8 channels, each which include separate
port commons to ensure port-to-port isolation. Individual ports are
isolated from each other and from the control logic.
Low-Side or High-Side Switch Configuration –Each group of eight
channels can be connected directly to positive or negative supplies
for high (hot) side switching. Alternatively, each group of eight
channels can be connected to common for low side switching
applications.
TTL Compatible –When configured as a low side switch will sink
32mA at 0.2 volts. Sourcing can be controlled by on-board surface
mount or external pull-up resistors. On-board surface mount
resistors are depopulated by default. Please contact factory for a
custom configuration.
Power Up & System Reset Fail-Safe –For safety, the outputs are
turned OFF upon power-up and a system reset. Thus, the SSR’s will

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be disabled after a power-up or system reset.
Wide Range Bipolar Voltage Outputs –Outputs are rated from 0 to
±60 volts. The bipolar solid state relays allow both AC and DC
switching.
Output Readback Function –A 32-bit readback buffer is provided to
allow the output channel registers to be read back.
No Configuration Jumpers or Switches –All configuration is
performed through software commands with no internal jumpers to
configure or switches to set.
Loopback Compatible with AP440 Digital Input Module –The P2
field I/O pin assignments of this model are directly compatible with
those of the Acromag Model AP440 32-Channel Isolated Input
Module for direct closed-loop monitoring of the output states. The
AP445 also shares the same pinout used on the Acromag non-
isolated AP408 32-Channel I/O Module, for channels 0-31.
1.3.3 Key Features PCIe Interface
PCIe Bus –The AP module includes a PCI Express Generation 1
interface operating at a bus speed of 2.5 Gbps with one lane in each
direction.
Compatibility –PCI Express Base Specification v2.1 compliant PCI
Express Endpoint.
1.4Signal Interface Products
This AcroPack Module will mate directly to all Acromag AP carriers. Once
connected, the module is accessed via a 50 pin front panel connector.
The cables and termination panels are also available. For optimum
performance with the AP445 isolated output module, use of the shortest
possible length of shielded I/O cable is recommended.

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1.5Software Support
The AcroPack series products require support drivers specific to your
operating system. Supported operating systems include: Linux, Windows,
and VxWorks.
Windows
Acromag provides software products (sold separately) to facilitate the
development of Windowsapplications interfacing with AcroPack modules,
VPX I/O board products, and PCIe I/O Cards. This software (model APSW-
API-WIN) consists of low-level drivers and Dynamic Link Libraries (DLLs) that
are compatible with a number of programming environments. The DLL
functions provide a high-level interface to boards eliminating the need to
perform low-level reads/writes of registers, and the writing of interrupt
handlers.
VxWorks
Acromag provides a software product (sold separately) consisting of
VxWorkssoftware. This software (Model APSW-API-VXW) is composed of
VxWorks(real time operating system) libraries for all AcroPack modules,
VPX I/O board products, and PCIe I/O Cards. The software is implemented
as a library of “C” functions which link with existing user code to make
possible simple control of all Acromag AcroPack modules.
Linux
Acromag provides a software product consisting of Linuxsoftware. This
software (Model APSW-API-LNX) is composed of Linuxlibraries for all
AcroPack modules, VPX I/O board products, and PCIe I/O Cards. The
software is implemented as a library of “C” functions which link with existing
user code to make possible simple control of all Acromag AcroPack modules.
1.6 References
The following resources regarding AcroPack modules are available for
download on Acromag’s website or by contacting your sales representative.
PCI Express MINI Card Electromechanical Specification, REV 1.2
http://www.acromag.com

SERIES AP445 ACROPACK
USER’S MANUAL
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2.0 PREPARATION FOR USE
IMPORTANT PERSONAL AND PRODUCT SAFETY CONSIDERATIONS
It is very important for the user to consider the possible safety implications
of power, wiring, component, sensor, or software failures in designing any
type of control or monitoring system. This is especially important where
personal injury or the loss of economic property or human life is possible. It
is important that the user employ satisfactory overall system design. It is
understood and agreed by the Buyer and Acromag that this is the Buyer's
responsibility.
WARNING: This board utilizes static sensitive components and should only
be handled at a static-safe workstation. This product is an electrostatic
sensitive device and is packaged accordingly. Do not open or handle this
product except at an electrostatic-free workstation. Additionally, do not
ship or store this product near strong electrostatic, electromagnetic,
magnetic, or radioactive fields unless the device is contained within its
original manufacturer’s packaging. Be aware that failure to comply with
these guidelines will void the Acromag Limited Warranty.
2.1 Unpacking and Inspecting
Upon receipt of this product, inspect the shipping carton for evidence of
mishandling during transit. If the shipping carton is badly damaged or water
stained, request that the carrier's agent be present when the carton is
opened. If the carrier's agent is absent when the carton is opened and the
contents of the carton are damaged, keep the carton and packing material
for the agent's inspection.
For repairs to a product damaged in shipment, refer to the Acromag Service
Policy to obtain return instructions. It is suggested that salvageable shipping
cartons and packing material be saved for future use in the event the
product must be shipped.
This board is physically protected with packing material and electrically
protected with an anti-static bag during shipment. However, it is
recommended that the board be visually inspected for evidence of
mishandling prior to applying power.
The board utilizes static-sensitive components and should only be handled at
a static-safe workstation.

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2.2 Installation Considerations
IMPORTANT: Adequate air
circulation must be provided to
prevent a temperature rise
above the maximum operating
temperature.
Refer to the specifications section for loading and power requirements. Be
sure that the system power supplies are able to accommodate the power
requirements of the system boards, plus the installed Acromag board,
within the voltage tolerances specified.
In an air cooled assembly, adequate air circulation must be provided to
prevent a temperature rise above the maximum operating temperature and
to prolong the life of the electronics. If the installation is in an industrial
environment and the board is exposed to environmental air, careful
consideration should be given to air-filtering.
In a conduction cooled assembly, adequate thermal conduction must be
provided to prevent a temperature rise above the maximum operating
temperature.
2.3 Board Configuration
Power should be removed from the board when installing AP modules,
cables, termination panels, and field wiring. Model AP445 isolated output
boards have no hardware jumpers or switches to configure.
2.4Field I/O Connector
A field I/O interface connector provides a mating interface between the AP
modules and the carrier board. The 100 pin ST5-50-1.50-L-D-P-TR Samtec
connector is used on the AcroPack card as board to board interconnect. This
connector will mate with the 100 pin SS5-50-3.00-L-D-K-T Samtec connector
on the carrier. The stack height is 4.5mm.
Pin assignments are unique to each AP model. Table 2.1 lists signal pin
assignments for the module field I/O connector. Every other pin of the 100
pin connector is left unconnected in order to meet the minimum creepage
distance required for 60 volt isolation.
Table 2.1: Field I/O Connector
Pin Assignments
Ribbon Carrier
Connector1
50 Pin Champ
Carrier
Connector2
68 Pin Champ
Carrier
Connector3
Module P2 Pin
Number
Field I/O Signal
1
1
1
2
Field Output 1
2
26
35
1
Field Output 2
4
Reserved/isolation
3
Reserved/isolation
3
2
2
6
Field Output 3

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4
27
36
5
Field Output 4
8
Reserved/isolation
7
Reserved/isolation
5
3
3
10
ASUP
6
28
37
9
Field Output 5
12
Reserved/isolation
11
Reserved/isolation
7
4
4
14
Field Output 6
8
29
38
13
Field Output 7
16
Reserved/isolation
15
Reserved/isolation
9
5
5
18
Field Output 8
10
30
39
17
ACOM
20
Reserved/isolation
19
Reserved/isolation
11
6
6
22
Field Output 9
12
31
40
21
Field Output 10
24
Reserved/isolation
23
Reserved/isolation
13
7
7
26
Field Output 11
14
32
41
25
Field Output 12
28
Reserved/isolation
27
Reserved/isolation
15
8
8
30
BSUP
16
33
42
29
Field Output 13
32
Reserved/isolation
31
Reserved/isolation
17
9
9
34
Field Output 14
18
34
43
33
Field Output 15
36
Reserved/isolation
35
Reserved/isolation
19
10
10
38
Field Output 16
20
35
44
37
BCOM
40
Reserved/isolation
39
Reserved/isolation
21
11
11
42
Field Output 17
22
36
45
41
Field Output 18
44
Reserved/isolation

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43
Reserved/isolation
23
12
12
46
Field Output 19
24
37
46
45
Field Output 20
48
Reserved/isolation
47
Reserved/isolation
25
13
13
50
CSUP
26
38
47
49
Field Output 21
52
Reserved/isolation
51
Reserved/isolation
27
14
14
54
Field Output 22
28
39
48
53
Field Output 23
56
Reserved/isolation
55
Reserved/isolation
29
15
15
58
Field Output 24
30
40
49
57
CCOM
60
Reserved/isolation
59
Reserved/isolation
31
16
16
62
Field Output 25
32
41
50
61
Field Output 26
64
Reserved/isolation
63
Reserved/isolation
33
17
17
66
Field Output 27
34
42
51
65
Field Output 28
68
Reserved/isolation
67
Reserved/isolation
35
18
18
70
DSUP
36
43
52
69
Field Output 29
72
Reserved/isolation
71
Reserved/isolation
37
19
19
74
Field Output 30
38
44
53
73
Field Output 31
76
Reserved/isolation
75
Reserved/isolation
39
20
20
78
Field Output 32
40
45
54
77
DCOM
80
Reserved/isolation
79
Reserved/isolation
41
21
21
82
NC

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42
46
55
81
NC
84
Reserved/isolation
83
Reserved/isolation
43
22
22
86
NC
44
47
56
85
NC
88
Reserved/isolation
87
Reserved/isolation
45
23
23
90
NC
46
48
57
89
NC
92
Reserved/isolation
91
Reserved/isolation
47
24
24
94
NC
48
49
58
93
NC
96
Reserved/isolation
95
Reserved/isolation
49
25
25
98
NC
50
50
59
97
NC
100
Reserved/isolation
99
Reserved/isolation
Note 1: VPX4500-CC-LF is an
example of a carrier that uses the
ribbon cable connector see image
of carrier.

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Note 2: APCe7020E-LF is an
example of a carrier that uses the
Champ connector. See image of
carrier.
Note 3: APCe7040E-LF is an
example of a carrier that uses the
68-pin Champ connector. See
image of carrier.
Output channels of this module are divided into four ports of eight channels
each. Channels of a port share a common signal connection with each other
(ACOM, BCOM, CCOM and DCOM). Isolation is provided between ports and
between each port and the AcroPack logic circuitry.
Field I/O pinouts are arranged to be compatible with similar AcroPack
models. This model is directly loopback compatible with the Acromag Model
AP440 Isolated Input Module. Likewise, pin assignments are identical to
those of Acromag Model AP408.
Note that the inputs of this device are bipolar, and may be connected in any
polarity with respect to the port common. Further, do not confuse port
commons with signal common. For the AP445, port common only infers that
this lead is connected common to the 8 inputs of the port (a separate port
common for each port). Likewise, the port commons of the AP445 output
module and AP440 input module are normally not connected together for

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loopback interconnection (see Figure 3 in Appendix A)
2.5Noise and Earth Grounding Considerations
Output lines of the AP445 are isolated between the logic and field I/O
connections. Likewise, separate port commons facilitate port-to-port
isolation. Consequently, the field I/O connections are isolated from the
carrier board and backplane, thus minimizing the negative effects of ground
bounce, impedance drops, and switching transients. However, care should
be taken in designing installations to avoid inadvertent isolation bridges,
noise pickup, isolation voltage clearance violations, equipment failure, or
earth ground loops.
2.6Logic Interface Connector
The AP module logic edge connector interfaces to the mating connector on
the carrier board. The pin assignments of this connector are standard for all
AP modules according to the PCI Express MINI Card Electromechanical
Specification, REV 1.2 (with exceptions shown in Table 2.2 and noted
below).
Threaded metric M2.5 screws and spacers are supplied with the AP module
carriers and conduction cooling kit to provide additional stability for harsh
environments.
Power supplies +5V, +12V, and -12V have been assigned to pins that are
reserved in the mini-PCIe specification. The Present signal is grounded on
the AP module. In addition, COEX1, COEX2 –wireless transmitter control
are reassigned to JTAG signals TMS and TCK Lastly, UIM_C4, UIM_C8 –
reserved User Identity Module signals are reassigned to JTAG signals TDI
and TDO.
Table 2.2: Logic Interface
Connections
Pin #
Name
Pin #
Name
51
+5V1,2
52
+3.3V3
49
+12V1,2
50
GND
47
-12V1,2
48
N.C. (+1.5V)1
45
Present4
46
N.C. (LED_WPAN#)1
43
GND
44
N.C. (LED_WLAN#)1
41
+3.3V3
42
N.C. (LED_WWAN#)1
39
+3.3V3
40
GND
37
GND
38
N.C. (USB_D+)1
35
GND
36
N.C. (USB_D-)1
33
PETp0
34
GND
31
PETn0
32
SMB_DATA
29
GND
30
SMB_CLK
27
GND
28
N.C. (+1.5V)1

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25
PERp0
26
GND
23
PERn0
24
+3.3V3
21
GND
22
PERST#
19
TDI (UIM_C4)1
20
N.C. (W_DISABLE#)1
17
TDO (UIM_C8)1
18
GND
15
GND
16
N.C. (UIM_VPP)1
13
RECLK+
14
N.C. (UIM_RESET)1
11
REFCLK-
12
N.C (UIM_CLK)1
9
GND
10
N.C. (UIM_DATA)1
7
CLKREQ#
8
N.C. (UIM_PWR)1
5
TCK (COEX2)1
6
N.C. (+1.5V)1
3
TMS (COEX1)1
4
GND
1
N.C. (WAKE#)1
2
+3.3V3
Note 1: Signals are not applicable for the AP445 implementation. Pins are
either “no connects”on the module or are repurposed for JTAG.
Note 2: +5V, +12V, and -12V power supplies have been assigned to pins that
are reserved in the mini-PCIe specification.
Note 3: All +3.3Vaux power pins are changed to +3.3V power.
Note 4: The Present signal is tied to circuit common on the AP module.

SERIES AP445 ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 16 - http://www.acromag.com
- 16 -
www.acromag.com
3.0 PROGRAMMING INFORMATION
This Section provides the specific information necessary to program and
operate the AP445 module.
The PCIe bus is defined to address three distinct address spaces: I/O,
memory, and configuration space. The AcroPack module can be accessed
via the PCIe bus memory space and configuration spaces, only.
The AcroPack configuration registers are initialized by system software at
power-up to configure the card. The AP445 module is a Plug-and-Play PCIe
card. As a Plug-and-Play card the board’s base address and system interrupt
request are not selected via jumpers but are assigned by system software
upon power-up via the configuration registers. A PCIe bus configuration
access is used to access an AcroPack’s configuration registers.
When the computer is first powered-up, the computer’s system
configuration software scans the PCIe bus to determine what PCIe devices
are present. The software also determines the configuration requirements
of the PCIe card.
The system software accesses the configuration registers to determine how
many blocks of memory space the module requires. It then programs the
board’s configuration registers with the unique memory base address.
Since this board is not fixed in address space, its device driver must use the
mapping information stored in the board’s Configuration Space registers to
determine where the board is mapped in memory space.
CONFIGURATION REGISTERS
The PCIe specification requires software driven initialization and
configuration via the Configuration Address space. This board provides 512
bytes of configuration registers for this purpose. It contains the
configuration registers shown in the following table to facilitate Plug-and-
Play compatibility.
The Configuration Registers are accessed via the Configuration Address and
Data Ports. The most important Configuration Registers are the Base
Address Registers and the Interrupt Register which must be read to
determine the base address assigned to the board and the interrupt request
that goes active on a board interrupt request. Interrupts are not supported
on the AP445 module.

SERIES AP445 ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 17 - http://www.acromag.com
- 17 -
www.acromag.com
Table 3.1: Configuration
Registers
Reg.
Num.
D31 D24
D23 D16
D15 D8
D7 D0
0
Device ID
0x7014 AP445E-LF
Vendor ID
16D5
1
Status
Command
2
Class Code=118000
Rev ID=00
3
BIST
Header
Latency
Cache
4
64-bit Memory Base Address for Memory Accesses to PCIe
interrupt and I/O registers
4K Space (BAR0)
5:10
Not Used
11
Subsystem ID
0x7014 AP445E-LF
Subsystem Vendor ID
16D5
12
Not Used
13,14
Reserved
15
Max_Lat
Min_Gnt
Inter. Pin
Inter. Line
This board is allocated a 4K byte block of memory (BAR0), to access the PCIe
interrupt and I/O registers. The PCIe bus decodes 4K bytes for BAR0 for this
memory space.
The memory space address map for the AP445 is shown in Table 3.2. Note
that the base address for the board (BAR0) in memory space must be added
to the addresses shown to properly access these AP445 registers. Register
accesses as 32, 16, and 8-bit data in memory space are permitted.
Memory Map
The AP445 registers provide simple control and readback of 32 digital
output lines. Data is read from or written to one of four groups (ports) as
designated by the address and read and write signals.
Table 3.2: AP445
Memory Map
Notes:
1. The AP will respond to
addresses that are “Not
Used”. The board will
return “0” for all address
reads that are not used or
reserved.
BAR0 Base Address
Bit(s)
Description
0x0000 0000
32:0
Reset Register
0x0000 0004
32:0
Location in System Register
0x0000 0008
32:0
Port Output Register
OUTPUT00-OUTPUT31
0x0000 000C→
0x0000 0044
32:0
NOT USED1
0x0000 0048
32:0
XADC Status Control Register
0x0000 004C
32:0
XADC Address Register

SERIES AP445 ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: [phone] - 18 - http://www.acromag.com
- 18 -
www.acromag.com
Software Reset Register (Write Only) - (BAR0 + 0x0000 0000)
This write only register is used to reset all the output ports to 0 (SSR switches
OFF).
Table 3.3: Reset Register
Note that any registers/bits not
mentioned will remain at the
default value logic low.
Bit(s)
FUNCTION
0
Writing a ‘1’ to this bit will cause a software reset.
31 to 1
Not Used
Module Location In System Register (Read Only) - (BAR0 + 0x0000 0004)
This read only register is used identify the module’s plugin location in a
system.
Table 3.4: Location Register
Note that any registers/bits not
mentioned will remain at the
default value logic low.
Bit(s)
FUNCTION
2 to 0
Module Site Location Bits. These bits identify the location on
the carrier of the AP module.
000
Carrier Site A
001
Carrier Site B
010
Carrier Site C
011
Carrier Site D
7 to 3
Module Slot Location Bits. These bits identify the slot location
of the AP module in a system. The Carrier may use backplane
signals as in a VPX system or a carrier DIP switch to uniquely
identify the system location of the carrier.
XXXXX
System Slot identification bits are described by the
AcroPack carrier card.
31 to 8
Not Used
Port Output Register (Read/Write) - (BAR0 + 0x0000 0008)
This register is provided to control 32 possible output points. Data can be
read from or written to one of the four groups of eight output lines (Ports 0-
3), as designated by the address and read/write signals.
Table 3.5: Port Output
Register
Bit(s)
FUNCTION
7 to 0
Port A: Output Channels 7 to 0
15 to 8
Port B: Output Channels 15 to 8
23 to 16
Port C: Output Channels 23 to 16
31 to 24
Port D: Output Channels 31 to 24
Write a zero to each channel’s position to turn the corresponding SSR OFF.
Write a one to each channel’s position to turn the corresponding SSR ON.