Epson S5U1C17564T2 User manual

Rev. 1.0
CMOS 16-BIT SINGLE CHIP OCONTROLLER
S5U1C17564T2 Manual
(Software Evaluation Tool for S1C17564)

Evaluation board/kit and Development tool important notice
1. This evaluation board/kit or development tool is designed for use for engineering evaluation, demonstration,
or development purposes only. Do not use it for other purpose. It is not intended to meet the requirement of
design for finished product.
2. This evaluation board/kit or development tool is intended for use by an electronics engineer, and it is not the
product for consumer. The user should use this goods properly and safely. Seiko Epson dose not assume any
responsibility and liability of any kind of damage and/or fire coursed by usage of it. User should cease to use
it when any abnormal issue occurs even during proper and safe use.
3. The part used for this evaluation board/kit or development tool is changed without any notice.
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material is
applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any
intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that
anything made in accordance with this material will be free from any patent or copyright infringement of a third
party. When exporting the products or technology described in this material, you should comply with the
applicable export control laws and regulations and follow the procedures required by such laws and regulations.
You are requested not to use, to resell, to export and/or to otherwise dispose of the products (and any technical
information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other
military purposes.
All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
©SEIKO EPSON CORPORATION 2012, All rights reserved.

Product code explanation
Device
S1 C17xxx F 00E1 00
Development tool
S5U1 C17000 Y2 100
Packaging specifications
[00: Standard packaging]
Version
［1: Version 1］
Tool classification
Hx : ICE
Dx : Evaluation board
Ex : ROM emulation board
Mx: External ROM emulation memory
Tx : Mounting socket
Cx : Compiler package
Sx : Middleware package
Yx : Writer software
Supported device numbers
[17xxx: For S1C17xxx]
Tool classification
[C: For microprocessor]
Product classification
[S5U1: Semiconductor development tool]
Packaging specifications
00 : Other than tape or reel
0A : TCP BL 2-direction
0B : Tape and reel BACK
0C: TCP BR 2-direction
0D: TCP BT 2-direction
0E : TCP BD 2-direction
0F : Tape and reel FRONT
0G: TCP BT 4-direction
0H: TCP BD 4-direction
0J : TCP SL 2-direction
0K : TCP SR 2-direction
0L : Tape and reel LEFT
0M: TCP ST 2-direction
0N: TCP SD 2-direction
0P : TCP ST 4-direction
0Q: TCP SD 4-direction
0R: Tape and reel RIGHT
99 : Packaging specification undetermined
Specifications
Configuration
[D: Bare chip, F: QFP, B: BGA]
Device numbers
Device name
[C: Microprocessor, digital products]
Product classification
[S1: Semiconductor]

S5U1C17564T2 Manual Seiko Epson Corporation i
(Rev. 1.0)
Table of Contents
1. Overview..................................................................................................................... 1
1.1 Usage Method..........................................................................................................................1
2. Block Diagram............................................................................................................ 2
3. Hardware Information................................................................................................ 3
3.1 Layout information ..................................................................................................................3
3.2 Jumper information.................................................................................................................4
3.2.1 Jumper settings when using S1C17564..............................................................................4
3.2.2 Jumper settings when using S1C17554..............................................................................5
3.3 Circuit diagram ........................................................................................................................6
3.4 Parts List ..................................................................................................................................8
Revision History............................................................................................................... 9

1. Overview
S5U1C17564T2 Manual Seiko Epson Corporation 1
(Rev. 1.0)
1. Overview
The S5U1C17564T2 (S5U1C17564T2: Software Evaluation Tool for S1C17564) is a board used to support the
development and evaluation of the Seiko Epson S1C17564 single-chip microcontroller.
The S5U1C17564T2 features through-holes for attaching expansion connectors to provide I/O pins for the
S1C17564, and can be used to expand functions by connecting a user board or similar via these connector
through-holes.
The S5U1C17564T2 can be used for developing S1C17564 software by connecting to the Seiko Epson
S5U1C17001H (ICDmini) emulator.
This product includes an IC socket, enabling it to be used with the Seiko Epson S1C17554 single-chip
micro-controller in addition to the S1C17564 included.
1.1 Usage Method
The S1C17564 software development environment can be set up using the procedure described below.
(1) Insert the S1C17564*1 into the IC socket (U1).*2 (It is already inserted at the time of shipping.)
(2) Connect the S5U1C17001H (ICDmini) to J5 and J6 on the S5U1C17564T2 via the dedicated cable
provided with the ICDmini.*3
(3) Provide power via the power supply connectors (J7, J8, J9).*4
(4) Connect the ICDmini to the PC*5 via the USB cable provided with the ICDmini.
*1: The S1C17554 can also be mounted.
*2: Insert so that the triangular mark printed on the board aligns with pin 1 on the S1C17564. There is a risk
of damaging the S1C17564 if power is turned on while inserted incorrectly.
*3: For more information on connecting this device, refer to the S5U1C17001H User Manual (ICDmini
Ver2.0). Note that this device should be used with S5U1C17001H2 (ICDmini Ver 2.0) or later. It cannot
be connected to the S5U1C17002H (ICD Board).
*4: Never apply a voltage exceeding the power supply voltage input range for the S1C17564. For more
information on the S1C17564 power supply voltage input range, refer to the S1C17564 Technical Manual.
There is no need to supply power via J8 if the S1C17564 internal regulator is used. For more information,
refer to Section 3.
*5: The PC used for S1C17564 development must be installed with the GNU17 (S5U1C17001C) software
development tool. Note that this device should be used with GNU17 Ver 2.0.0 or later.
Note: When using the S5U1C17564T2, the spacers provided should be used to prevent shorting of the
mounted components.

2. Block Diagram
2 Seiko Epson Corporation S5U1C17564T2 Manual
(Rev. 1.0)
2. Block Diagram
The S5U1C17564T2 block diagram is as shown below.
Figure 2.1 S5U1C17564T2 block diagram
32kHz
Crystal Unit (X2)
12MHz
Crystal Unit (X1)
Reset SW
(SW1)
VPP
ICDmini i/f
Connecto
r
(
J5
)
S5U1C17001H
Power Supply
Connector (J8)
S1C17564
Debug i/f
ICDmini i/f
Connector (J6)
OSC1
OSC3
Ports
Extension
connector
(J1-J4)
(Not mounted)
Target
Board
Power Supply
Connector (J9)
LVDD
AVDD
Power Supply
Connecto
r
(
J7
)
HVDD
LED (D1)
REGEN
RESET
HVDD LVDD
AVDD
VIN
JP1
JP2 JP5
JP6 JP7
S5U1C17001H

3. Hardware Information
S5U1C17564T2 Manual Seiko Epson Corporation 3
(Rev. 1.0)
3. Hardware Information
3.1 Layout information
The S5U1C17564T2 component layout is as shown in Figures 3.1 and 3.2.
Figure 3.1 S5U1C17564T2 component layout (upper side)
*1: Connectors J1, J2, J3, and J4 are patterns only, and the actual connectors are provided together with the
product for mounting as necessary.
*2: The through-hole bore diameter is 0.85 mm.
Extension
Connector (J1)
(foot pattern only*1*2)
Reset SW
(SW1)
HVDD-IN
(J7) LVDD-IN
(J8) AVDD-IN
(J9)
Extension
Connector (J2)
(foot pattern
only*1*2)
Extension
Connector (J3)
(foot pattern only*1*2)
Extension
Connector (J4)
(foot pattern only*1*2)
S1C17564
(U1)
1 Pin
Regulator
Enable/Disable
Select Jumper
(JP2)

3. Hardware Information
4 Seiko Epson Corporation S5U1C17564T2 Manual
(Rev. 1.0)
Figure 3.2 S5U1C17564T2 component layout (underside)
3.2 Jumper information
3.2.1 Jumper settings when using S1C17564
Table 3.1 lists the S5U1C17564T2 jumper functions (for when using the S1C17564).
Table 3.1 Jumper function list (when using S1C17564)
Jumper Enable internal regulator (default setting) Disable internal regulator
JP1 CLOSE (VIN=HVDD) –
JP2 REGEN EN CLOSE
(Enable S1C17564 internal regulator)
REGEN DS CLOSE
(Disable S1C17564 internal regulator)
JP5 CLOSE
(Supply AVDD (supplied via J9) to S1C17564)
–
JP6 CLOSE
(Supply HVDD (supplied via J7) to S1C17564)
–
JP7 OPEN*1 CLOSE
(Supply LVDD (supplied via J8) to S1C17564)
*1: There is no need to supply LVDD power via J8 if the S1C17564 internal regulator is used.
32.768kHz
Crystal Unit (X2)
12MHz
Crystal Unit
(X1)
ICDmini i/f
connector
(J6)
ICDmini i/f
connector
(J5)

3. Hardware Information
S5U1C17564T2 Manual Seiko Epson Corporation 5
(Rev. 1.0)
3.2.2 Jumper settings when using S1C17554
Table 3.2 lists the S5U1C17564T2 jumper functions (for when using the S1C17554).
Table 3.2 Jumper function list (when using S1C17554)
Jumper (No internal regulator)
JP1 CLOSE (VIN=HVDD)
JP2 REGEN DS CLOSE
JP5 CLOSE
(Supply AVDD (supplied via J9) to S1C17554)
JP6 CLOSE
(Supply HVDD (supplied via J7) to S1C17554)
JP7 CLOSE
(Supply LVDD (supplied via J8) to S1C17554)

5
5
4
4
3
3
2
2
1
1
B B
A A
IC51-0644-807-6
SVTmini17564_CPUboard_sch 1.1
SVTmini17564 CPU Board
A3
1 3Thursday April 15 2010
Title
Size Document Number Rev
Date: Sheet of
#RESET
DCLK
DSIO
DST2
LVDD2
HVDD2
HVDD2
HVDD
AVDD
HVDD2
HVDD
HVDD2
HVDD
LVDD2
HVDD2
LVDD2
LVDD2
AVDD2
AVDD
HVDD
HVDD2
AVDD2
LVDD2
VPP
HVDD2
C19
0.1uF
J1
FFC-40BMEP1B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
HVDD
N.C.
N.C.
US_SDI0/P50
GND
AIN1/P01
GND
RFIN/611
SENA/611
N.C.
#SPISS0/TOUT5/CAP5/P13
SDO0/P11
N.C.
N.C.
N.C.
GND
AVDD
GND
SCLK1/SPICLK1/P16
GND
HVDD
N.C.
N.C.
N.C.
GND
AIN0/P00
GND
REF/611
SENB/611
P31/#BFR/#ADRTIG
SDI0/P10
SPICLK0/P12
SIN1/SDI1/P14
SDA1/REMI/P43
SCL1/REMO/P44
#BFR/#SPISS2/P25
US_SDO0/P51
SOUT1/SDO1/P15
SDO2/P24(EXCL3)
GND
C15
0.1uF C6
1uF
C20
4.7uF
C26
0.1uF
C40
10uF
X2
MC-146
C38
10uF
C25
0.1uF
C30
TH only
C28
0.1uF
C21
0.1uF
R1
1M
U1
S1C17564
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
US_SDI0/P50
SDI0/P10
VSS
SDO0/P11
SPICLK0/P12
#SPISS0/TOUT5/CAP5/P13
LVDD
HVDD
SIN1/SDI1/P14
US_SDO0/P51
SOUT1/SDO1/P15
SCLK1/SPICLK1/P16
SDA1/REMI/P43
SCL1/REMO/P44
SDO2/P24(EXCL3)
#BFR/#SPISS2/P25
P52/US_SCK0 P26/SDA1 P27/SCL1 VSS HVDD P30/TOUT0/CAP0 LVDD P53/US_SDI1 P31/#BFR/#ADTRG DST2/P37 DSIO/P36 TEST DCLK/P35 P33/REMI/SPICLK2 P34/REMO/#SPISS1 P54/US_SDO1
REGEN
VSS
VIN
VOUT
P23(EXCL2)/SDI2
P22(EXCL1)/FOUTB
P21/TOUT3/CAP3
P20/TOUT2/CAP2
HVDD
OSC4
OSC3
VPP
OSC2
OSC1
VSS
P55/US_SCK1
AIN0/P00 AIN1/P01
AIN2/US_SSI0/P02 AIN3/US_SSI1/P03
AVDD
N.C.
TOUT4/CAP4/FOUTA/P32
SCL0/P17
VSS
HVDD
SDA0/P45(EXCL0)
SCLK0/TOUT1/CAP1/P42
SOUT0/TOUT7/CAP7/P41
SIN0/TOUT6/CAP6/P40
LVDD
#RESET
C17
0.1uF
C16
0.1uF
C32 TH only
C22
4.7uF
C1
1pF
C45
0.1uF
C29
0.1uF
C13
0.1uF
R12 33
JP1
FFC-2AMEP1B
1 2
. .
C27
0.1uF
C31
10uF
R2
10M
C7
0.1uF
C23
0.1uF
C2
1pF
X1
FA-238V
C18
0.1uF
C41
10uF
C46
10uF
C14
0.1uF
JP2
WL-1 3P
1
2
3
.
..
...
J2
FFC-40BMEP1B
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
HVDD
N.C. N.C. N.C. N.C. N.C. N.C. N.C.
P01/611 P02/611
SDA0/P45(EXCL0)
N.C. N.C. N.C. N.C.
GND
AVDD
GND
N.C.
GND
HVDD SIN0/TOUT6CAP6/P40 N.C. SOUT0/TOUT7/CAP7/P41 N.C. SCLK0/TOUT1/CAP1/P42 N.C. N.C. N.C. P00/611 #RESET SCL0/P17 N.C. N.C. N.C. N.C. TOUT4/CAP4/FOUTA/P32
AIN3/P03 AIN2/P02
GND
J4
FFC-40BMEP1B
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
HVDD N.C. N.C. N.C. N.C. N.C. N.C. DSIO/P36 DCLK/P35 SEG1/611 SEG3/611 SEG5/611 SEG7/611 N.C. N.C. N.C. N.C. N.C. N.C. GND
HVDD
P52
P26/SDA1
P27/SCL1
P30/TOUT0/CAP0
N.C. N.C.
DST2/P37 SEG0/611 SEG2/611 SEG4/611 SEG6/611
SEG8/COM7/611
N.C.
P53
P33/REMI/SPICLK2
P34/REMO/#SPISS1
US_SDO1/P54
US_SCK1/P55
GND
C39
0.1uF
C12
0.1uF
C24
4.7uF
C42
10uF
R5
0
J3
FFC-40BMEP1B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
HVDD
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
COM0/611
COM2/611
SEG11/COM4/611
SEG9/COM6/611
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
GND
HVDD
N.C.
P20/TOUT2/CAP2
N.C.
P21/TOUT3/CAP3
N.C.
N.C.
N.C.
N.C.
N.C.
COM5/611
COM3/611
COM1/611
N.C.
P22(EXCL1)/FOUTB
N.C.
P23(EXCL2)/SDI2
N.C.
N.C.
GND

5
5
4
4
3
3
2
2
1
1
B B
A A
GND
HVDD-IN
VF=1.9V at 2mA
AVDD-IN
GND
HVDD: +3V
AVDD: +3V(ANALOG)
LVDD: +1.8V
HVDD2: +3V for MC
AVDD2: +3V(ANALOG) for MC
LVDD2: +1.8V for MC
VPP: FLASH PROGRAM POWER
S PPLY
LVDD-IN
GND
SVTmini17564_CPUboard_sch 1.1
SVTmini17564 CPU Board
A3
2 3Thursday April 15 2010
Title
Size Document Number Rev
Date: Sheet of
DST2
RESET_ICD
#RESET
RESET_ICD
DSIO
DCLK
HVDD
HVDD
LVDD2
AVDD
VPP
AVDD2
HVDD
HVDD
HVDD
LVDD
HVDD
HVDD2
HVDD
R3
10k
R10
680
C10
0.1uF
C36
0.1uF
JP7
FFC-2AMEP1B
1 2
. .
C5
0.1uF
R4
10k
J7
S2B-XH-A(LF)(SN)
1
2
U2
SN74LVC1G97
1
2
3
6
5
4
In1
GND
In0
In2
Vcc
Y
C11
0.1uF
J5
A2-4PA
1
2
3
4
DCLK
GND
DSIO
DST2
U3
S-1000N15-N4T1G
1
2
4
3
OUT
VDD
GND
N.C.
C9
10uF
D1
PG1111C
JP6
FFC-2AMEP1B
1 2
. .
SW1
SKRAAKE010
C8
10uF
J8
S2B-XH-A(LF)(SN)
1
2
J9
S2B-XH-A(LF)(SN)
1
2
J6
S04B-PASK-2
1
2
3
4
VPP
GND
RESET
VDD
JP5
FFC-2AMEP1B
1 2
. .
C4
0.1uF
C43
0.1uF
R8
470k
TP1
VPP
R6
47k
R9
0
C3
0.1uF
R7
0
C35
10uF
C44
10
* Note: J1‑7. J1‑34, J4‑36, and J4‑38 are marked with signal names related to the universal serial interface (USI),
which can be used by the S1C17564, but this function cannot be used if the S1C17554 is mounted.

3. Hardware Information
8 Seiko Epson Corporation S5U1C17564T2 Manual
(Rev. 1.0)
3.4 Parts List
Table 3.3 S5U1C17564T2 parts list*1
Part name Location Code, specifications Qty. Manufacturer
MCU U1 S1C17564F
(TQFP13-64) 1SEIKO EPSON CORPORATION
IC socket (U1) IC51-0644-807-6 1YAMAICHI electronics
Crystal oscillator X1 FA-238V 12 MHz
(10pF 50ppm) 1EPSON TOYOCOM
CORPORATION
Crystal oscillator X2 MC-146(7pF) 32.768
kHz 1EPSON TOYOCOM
CORPORATION
Voltage detector IC U3 S-1000N15-N4T1G 1Seiko Instruments Inc.
General logic device U2 SN74LVC1G97DCK 1Texas Instruments
LED D1 PG1111C 1STANLEY ELECTRIC CO., LTD.
Switch SW1 SKRAAKE010 1ALPS ELECTRIC CO., LTD.
Connector J5 A2-4PA-2.54DS(71) 1HIROSE ELECTRIC CO., LTD.
Connector J6 S04B-PASK-2(LF)(SN) 1JST Mfg. Co., Ltd
Connector J7, J8, J9 S2B-XH-A(LF)(SN) 3JST Mfg. Co., Ltd
Jumper pin JP1, JP5, JP6, JP7 FFC-2AMEP1B 4Honda Tsushin Kogyo Co., Ltd.
Jumper pin JP2 WL-1-3P 1Mac-Eight Co.,Ltd.
Jumper socket JP1, JP2, JP5, JP6,
JP7 5
C1, C2 1 pF/100V 2
C3, C4, C5, C7, C10,
C11, C12, C13, C14,
C15, C16, C17, C18,
C19, C21, C23, C25,
C26, C27, C28, C29,
C36, C39, C43, C45
0.1 /16 V 25
C6 1 /6.3 V 1
C20, C22, C24 4.7 6.3 V 3
C8, C9, C31, C35,
C38, C40, C41, C42,
C46 10 /6.3 V 9
Chip ceramic
capacitor
C44 10 /16 V 1
R5, R7, R9 0 /0.1 W 3
R10 680 /0.1 W 1
R12 33 /0.1 W 1
R3,R4 10 k/0.1 W 2
R6 47 k/0.1 W 1
R8 470 k/0.1 W 1
R1 1 M/0.1 W 1
Chip resistor
R2 10 M/0.1 W 1
Power cable
(housing) Included XHP-2 3JST Mfg. Co., Ltd
Power cable
(contact) Included 6
Power cable (lead) Included 6
Spacer Included 4
Screw Included 4
Connector Included (can be mounted on
J1, J2, J3, J4) FFC-40BMEP1B 4Honda Tsushin Kogyo Co., Ltd.
*1: Components described here are subject to change without notice.

Revision History
S5U1C17564T2 Manual Seiko Epson Corporation 9
(Rev. 1.0)
Revision History
Attachment-1
Code No. Page Revision details (including previous details) and reason
411934300 All New

International Sales Operations
AMERICA
EPSON ELECTRONICS AMERICA, INC.
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San Jose, CA 95112, USA
Phone: [phone] FAX: [phone]
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EPSON EUROPE ELECTRONICS GmbH
Riesstrasse 15, 80992 Munich,
GERMANY
Phone: [phone] FAX: [phone]
ASIA
EPSON (CHINA) CO., LTD.
7F, Jinbao Bldg., No.89 Jinbao St.,
Dongcheng District,
Beijing 100005, CHINA
Phone: [phone] FAX: [phone]
SHANGHAI BRANCH
7F, Block B, Hi-Tech Bldg., 900 Yishan Road,
Shanghai 200233, CHINA
Phone: [phone] FAX: [phone]
SHENZHEN BRANCH
12F, Dawning Mansion, Keji South 12th Road,
Hi-Tech Park, Shenzhen 518057, CHINA
Phone: [phone] FAX: [phone]
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Unit 715-723, 7/F Trade Square, 681 Cheung Sha Wan Road,
Kowloon, Hong Kong.
Phone: [phone] FAX: [phone]
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14F, No. 7, Song Ren Road,
Taipei 110, TAIWAN
Phone: [phone] FAX: [phone]
EPSON SINGAPORE PTE., LTD.
1 HarbourFront Place,
#03-02 HarbourFront Tower One, Singapore 098633
Phone: [phone] FAX: [phone]
SEIKO EPSON CORP.
KOREA OFFICE
5F, KLI 63 Bldg., 60 Yoido-dong,
Youngdeungpo-Ku, Seoul 150-763, KOREA
Phone: [phone] FAX: [phone]
SEIKO EPSON CORP.
MICRODEVICES OPERATIONS DIVISION
IC Sales & Marketing Department
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: [phone] FAX: [phone]
Document Code: 411934300a
First Issue:June 2010
Revised:December 2012 in JAPAN