Fuji Electric MT5F33743 User manual

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
Chapter 5 Precautions for Use
5-1
1.
Maximum Junction Temperature
Tvjmax
5-
2
2.
Short
-Circuit Protection
5-
2
3.
Over Voltage Protection and Safety Operation Area
5-
2
4.
Operation Condition and Dead Time Setting
5-
7
5.
Parallel Connections
5-
8
6.
Electrostatic Discharge Countermeasures and Gate Protection
5-
9
7.
ESD Conductive Foam
5-
10

MT5F33743
1. Maximum Junction Temperature Tvjmax
© Fuji Electric Co., Ltd. All rights reserved.
As described in specification sheet, this automotive IGBT module can be used under Tvj =175℃.
However, if junction temperature under operation is close to the maximum ratings, the products life
time degradation might be happened by expediting thermal fatigue destruction.
Therefore, to keep safety operation, please use the product under suitable operating conditions.
This chapter describes precautions for actual operation of the IGBT module.
5-2
2. Short-Circuit Protection
When IGBT is to be short-circuit state, Collector current is increased and VCE voltage is rapidly
increased. From this characteristics, although Collector current is limited certain level under
short-circuit state, high power due to high voltage and high current is apply to the IGBT at this
moment. Therefore, this severe state should be removed as soon as possible.
An example by using gate driver IC which has short-circuit protection function is shown in chapter 7,
please refer it.
As it is explained in chapter 1, this IGBT module has on-chip current detecting sensor. Its function
and characteristics are shown in chapter 8.
So please use this on-chip sensor for short-circuit protection function suitably.
On the other, because this IGBT module does not have corrector voltage detecting point on each
arm, desaturation type of short-circuit protection method shall not be used to avoid any unexpected
trouble.
3. Overvoltage Protection and Safety OperationArea
3.1 Overvoltage protection
Because switching speed of IGBT is very fast, large di/dtis produced in turn-off operation or reverse
recovery. So from this large di/dtand inductance component contained inside and outside this module
surge voltage is produced. If this surge voltage is excessed the device breakdown voltage, the device
is in overvoltage state and it would be destructed in the worst case. Followings are some examples to
avoid this kind of worst case:
1) Add snubber circuit 2) Tune the gate resistance 3) Reduce inductance in the main circuit
Images of turn-off waveform and reverse recovery waveform are shown in Fig. 5-1 and surge voltage
is defined.
(a) Turn-off (b) Reverse recovery
Fig. 5-1 Turn-off waveform, reverse recovery waveform and surge voltage
VAK
ICVAKP
00
VCE
ICVCEP
00

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
Some examples of actual surge voltage by using 6MBI800XV-075V are explained below.
Fig. 5-2 shows an example of the collector current dependence of the surge voltage. In generally, the
larger collector current makes the larger surge voltage at the turn-off. On the other hand, the larger
collector current is produced the smaller surge voltage on reverse recovery.
Fig. 5-3 shows an example of the gate resistance dependence of the surge voltage of the reverse
recovery.
As explained above, surge voltage produced by IGBT module is not only depend on circuit
inductance but also many of operating conditions like VCC and circuit parameters like gate resistance.
Therefore, when IGBT module is employed to actual equipment, it is need to confirm that surge
voltage on all of operating conditions is to be within RBSOA on actual system like invertor. If surge
voltage is excess guaranteed RBSOA, surge voltage shall be suppressed by adding snubber circuit,
by reducing stray inductance, by tuning gate resistance and so on. In addition, when surge voltage is
reduced by gate resistance, it is able to be effective operating condition to independently tune the gate
resistance of turn-on and turn-off, respectively.
5-3
Fig. 5-2 An example of collector current dependence of surge voltage
Fig. 5-3 An example of gate resistance dependence of surge voltage of reverse recovery
0
100
200
300
400
500
600
700
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Spike voltage [V]
Rg [Ω]
150℃、Vcc=400V,
Ic=800A
Vge=+15V/-0V
Cge=56nF
Ls=30nH
150℃, VCC = 400V
IC= 800A
VGE = +15V/-0V
CGE =56nF
LS =30nH
0
100
200
300
400
500
600
700
800
0 100 200 300 400 500 600 700 800
Spike voltage [V]
Collector current [A]
VCEP
VAKP
150℃、Vcc=400V,
Vge=+15V/-0V
Rgon=+2.7/-1.8Ω
Cge=56nF
Ls=30nH
150℃, VCC = 400V
VGE = +15V/-0V
RG= +2.7/-1.8Ω
CGE =56nF
LS =30nH
VCEP
VAKP
RG (Ω)
Spike voltage (V)
Collector current (A)
Spike voltage (V)

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
3.2 Gate resistance dependence of surge voltage of turn-off
Relating to overvoltage protection, an example of the gate resistance dependence of the surge
voltage is shown in Fig. 5-4.
In generally, a methodology, which the larger resistance is applied to suppress surge voltage, had
been used. However, according to generation changing of IGBT chip itself, the surge voltage
characteristics is also being changed. Therefore, when gate resistance is tuned, sufficient confirmation
on actual system shall be needed.
5-4
Fig. 5-4 An example of gate resistance dependence of surge voltage of turn-
off
Fig. 5-5 An example of SOA of FWD part
3.3 Safety operation area (SOA) of FWD part
As same as RBSOA of IGBT, SOA of FWD part is also defined. SOA of diode is defined as
acceptable area of maximum power (Pmax) which is the product of current and voltage during reverse
recovery operation. Therefore, any system shall be designed that locus of current and voltage during
reverse recovery should be within SOA.
An example of SOA of FWD part of 6MBI800XV-075V is shown in Fig. 5-5.
0
200
400
600
800
1000
1200
1400
1600
1800
0 100 200 300 400 500 600 700 800
Reverse recovery current [A]
Collector to emitter voltage Vce [V]
Pmax=300kW
Pmax = 300kW
400
450
500
550
600
650
700
750
110
Spike voltage [V]
Rg [Ω]
150℃、Vcc=400V,
Ic=800A
Vge=+15V/-0V
Cge=56nF
Ls=30nH
150℃, VCC = 400V
IC= 800A
VGE = +15V/-0V
CGE =56nF
LS =30nH
RG (Ω)
2520
Collector to emitter voltage VCE (V)
Reverse recovery current (A) Spike voltage (V)

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
3.4 Dynamic avalanche phenomenon
It is explained in previous section that VCE is increased when turn-off operation is performed. And if
VCE is excessed certain voltage, VCE voltage is suppressed. One of typical example of this
phenomenon is shown in Fig. 5-6. This phenomenon is called Dynamic avalanche.
If this dynamic avalanche is happened, spike voltage of VCE is suppressed by the decreased turn-off
current. The certain operating conditions which happen dynamic avalanche shall not be applied
because there is possibility of IGBT destruction by turn-off loss increase and latch-up phenomenon.
There are many causes of dynamic avalanche like long wiring of main circuit. To prevent this dynamic
avalanche, IGBT module shall be used within RBSOA condition, at least.
5-5
Fig. 5-6 An example of dynamic avalanche waveform
150℃, VCC =500V
IC=2000A
VGE =+15V/ -0V
RGon/off =+2.7/ -1.8Ω
CGE =56nF
LS =30nH
0
100
200
300
400
500
600
700
800
900
1000
0
400
800
1200
1600
2000
2400
2800
3200
3600
4000
0250 500 750 1000 1250 1500 1750 2000
VCE (V)
Collector current (A)
time (ns)
IC(A)
VCE (V)
150℃, VCC = 500V,
IC= 2000A
VGE = +15V/-0V
RG= +2.7/-1.8Ω
CGE = 56nF
LS= 60nH

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved. 5-6
Fig. 5-8 Schematic waveform for active clamp circuit
3.5 Spike voltage suppression circuit - clamp circuit -
Fig. 5-7 Active clamp circuit
In general, spike voltage generated between
collector to emitter can be suppressed by
means of decreasing the stray inductance or
installing snubber circuit. However, it may be
difficult to decrease the spike voltage under
the hard operating conditions. For this case, it
is effective to install the active clamp circuits,
which is one of the spike voltage suppressing
circuits.
Fig. 5-7 shows the example of active clamp
circuits.
In the circuits, Zenner diode and a diode
connected with the anti-series in the Zenner
diode are added. When the VCE over
breakdown voltage of Zenner diode is applied,
IGBT will be turned-off with the similar voltage
as breakdown voltage of Zenner diode.
FWD
Zenner Di
Di
IGBT
Therefore, installing the active clamp circuits can suppress the spike voltage. Moreover, avalanche
current generated by breakdown of Zenner diode, charge the gate capacitance so as to turn-on the
IGBT. As the result, di/dtat turn-off become lower than that before adding the clamp circuit. (Refer to
Fig. 5-8.) Therefore, because switching loss may be increased, apply the clamp circuit after various
confirmations for design of the equipment.
With clamp circuit
Without clamp circuit
VGE
IC
VCE

MT5F33743
4. Operation Condition and Dead Time Setting
© Fuji Electric Co., Ltd. All rights reserved.
Since principal characteristics of IGBT depend on driving conditions like VGE and RG, certain setting
according to target design is needed. Gate bias condition and dead time setting are described here.
4.1 Forward bias voltage : +VGE (on state)
Notes when +VGE is designed are shown as follows.
(1) Set +VGE so that is remains under the maximum rated G-E voltage, VGES =±20V.
(2) It is recommended that supply voltage fluctuations are kept to within ±10%.
(3) The on-state C-E saturation voltage VCE(sat) is inversely dependent on +VGE, so the greater the
+VGE the smaller the VCE(sat).
(4) Turn-on switching time and switching loss grow smaller as +VGE rises.
(5) At turn-on (at FWD reverse recovery), the higher the +VGE the greater the likelihood of surge
voltages in opposing arms.
(6) Even while the IGBT is in the off-state, there may be malfunctions caused by the dv/dtof the
FWD’s reverse recovery and a pulse collector current may cause unnecessary heat generation.
This phenomenon is called a dv/dtshoot through and becomes more likely to occur as +VGE
rises.
(7) The greater the +VGE the smaller the short circuit withstand capability.
4.2 Reverse bias voltage : -VGE (off state)
Notes when -VGE is designed are shown as follows.
(1) Set -VGE so that it remains under the maximum rated G-E voltage, VGES =±20V .
(2) It is recommended that supply voltage fluctuations are kept to within ±10%.
(3) IGBT turn-off characteristics are heavily dependent on -VGE, especially when the collector current
is just beginning to switch off. Consequently, the greater the -VGE the shorter, the switching time
and the switching loss become smaller.
(4) If the -VGE is too small, dv/dtshoot through currents may occur, so at least set it to a value
greater than -5V. If the gate wiring is long, then it is especially important to pay attention to this.
5-7
Fig. 5-9 Principle of unexpected turn-on
In this section, the way to avoid the unexpected
IGBT turn-on by dv/dtat the FWD’s reverse recovery
will be described.
Fig. 5-9 shows the principle of unexpected turn-on
caused by dv/dtat reverse recovery. In this figure, it
is assumed that IGBT1is turned off to on and gate to
emitter voltage VGE of IGBT2is negative biased. In
this condition, when IGBT1get turned on from
off-state, FWD on its opposite arm, that is, reverse
recovery of FWD2is occurred. At same time, voltage
of IGBT2and FWD2with off-state is raised. This
causes the dv/dtaccording to switching time of
IGBT1. Because IGBT1and IGBT2have the mirror
capacitance Cres, Current is generated by dv/dt
through Cres. This current is expressed by Cres x
dv/dt. This current is flowed through the gate resistance
RG, results in increasing the gate potential.
4.3 Avoid the unexpected turn-on by recovery dv/dt
IGBT1
IGBT2
FWD2
FWD1
RG
RG
Off state
i= Cres ×dv/dt

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved. 5-8
So, VGE is generated between gate to emitter. If VGE is excess the sum of reverse biased
voltage and VGE(th), IGBT2is turned on. Once IGBT2is turned on, the short-circuit condition is
happened, because both IGBT1and IGBT2is under turned-on state.
Based on this principle, several measures have been devised as methods for avoiding the
unexpected turn-on for the IGBT. These include adding a capacitance CGE component between the
gate and the emitter, increasing - VGE, and enlarging the gate resistance RG. The effect of these
measures varies depending on the applied gate circuit. Therefore, only apply them after sufficiently
confirming your configuration. In addition, also confirm whether there is any impact on switching loss.
4.4 Dead time setting
For inverter circuits and the like, it is necessary to set an on-off timing delay (dead time) in order to
prevent short circuits. During the dead time, both the upper and lower arms are in the OFF state.
Basically, the dead time (Fig. 5-10) needs to be set longer than the IGBT switching time (toff max.).
For example, when RGis increased, switching time also becomes longer, so it would be necessary to
lengthen dead time as well. Also, it is necessary to consider other drive conditions and the
temperature characteristics.
It is important to be careful with dead times that are too short, because in the event of a short circuit
in the upper or lower arms, the heat generated by the short circuit current may destroy the module.
Therefore, appropriate dead time should be settled by the confirmation of practical machine.
Fig. 5-10 Dead time timing chart
Dead time
Lower arm
Gate signal
Dead time
H
L
H
L
ON ON
ON
OFF
OFF OFF
Upper arm
Gate signal
In high capacity inverters and other equipment that needs to control large currents, it may be
necessary to connect IGBT modules in parallel. When connected in parallel, it is important that the
circuit design allows for an equal flow of current to each of the modules. If the current is not balanced
among the IGBTs, a higher current may build up in just one device and destroy it. The electrical
characteristics of the module as well as the wiring design, change the balance of the current between
parallel connected IGBTs. In order to help maintain current balance it may be necessary to match the
VCE(sat) values of all devices.
Also, when the IGBT module has the cooler with the water jacket, it is necessary to adhere strictly to
specifications such as water temperature, water flow and pressure within each water jacket.
For more detailed information on parallel connections, refer to Chapter 10 of this manual.
5. Parallel Connections

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
The guaranteed value of VGE for the IGBT module is generally up to ±20 V (Check the specifications
for the exact guaranteed value). If a voltage that exceeds the guaranteed value (VGES) is applied
between the gate and emitter of the IGBT, the IGBT gate is susceptible to breakage. Therefore, make
sure that the voltage applied between the gate and emitter does not exceed the guaranteed value. In
particular, the control terminal for the IGBT gate and temperature sensing diode is extremely sensitive
to static electricity. Therefore, make sure to observe the following cautions when handling the product.
1) When handling the module after unpacking, first make sure to discharge any static electricity that
exists on the human body or clothing with a high-resistance (about 1 MΩ) ground, and then perform
the work on a grounded conductive mat.
2) For the IGBT module, since no electrostatic measures have been taken for the terminal after
unpacking, do not directly touch terminal components (especially the control terminal), but handle
the module using the package body.
3) When performing soldering work on the IGBT terminal, make sure to ground the tip of the soldering
iron with an adequately low resistance to ensure that static electricity is not applied to the IGBT
through soldering iron or solder bath leakage.
Furthermore, the IGBT is susceptible to breakdown if voltage is applied between the collector and
emitter while the gate-emitter are in the open state.
The reason for this is shown in Fig. 5-11 where a change in collector potential causes the gate
potential to rise due to the flow of current (i). As a result, the IGBT turns on, and collector current
begins to flow, which in turn, could cause IGBT breakdown due to heat generation.
Furthermore, when the product is installed in a piece of equipment, the IGBT is susceptible to
breakdown due to the above reasons when a voltage is applied to the main circuit while the gate circuit
is broken or not operating normally (gate in the open state). In order to prevent this type of breakdown,
it is recommended that a resistor (RGE) of about 10 kΩ be installed between the gate and emitter.
6. Electrostatic Discharge Countermeasures and Gate Protection
5-9
Fig. 5-11 Gate charging from electric potential of collector
C(Collector)
E(Emitter)
G(Gate)
RGE
iIC

MT5F33743 © Fuji Electric Co., Ltd. All rights reserved.
When unpacking the product, it is important that there be no control pin contact when handling the
product after removing the conductive foam, as this could cause electrostatic discharge damage. When
installing the product in a piece of equipment, it is requested that you only remove the conductive foam
just before PCB mounting in order to prevent electrostatic discharge damage. (Refer to the following
workflow)
7. ESD Conductive Foam
5-10
4. PCB mounting
and control terminal
soldering
3. Conductive foam
removal
Fig. 5-12 Conductive foam removal procedures
1. Unpacking
2. Moving process
Do not remove
the conductive
foam
Do not remove
the conductive
foam
Remove the
conductive
foam
---