Fujitsu ALL Series Installation and operating instructions

Fujitsu Microelectronics Europe
Application Note MCU-AN -300203-E-V17
F²MC-16FX FAMILY
16-BIT MICROCONTROLLER
ALL SERIES
EXTERNAL INTERRUPTS
APPLICATION NOTE

EXTERNAL INTERRUPTS
Revision History
MCU-AN -300203-E-V17 - 2 - © Fujitsu Microelectronics Europe GmbH
Revision History
Date Issue
2006-04-25 First Version; MWi
2006-12-13 V1.1, Reviewed the document and updated with review findings, MPi
2007-02-21 V1.2, Updated with re-review findings from PHu, MPi
2007-03-01 V1.3, Updated with re-review findings from HWe, MPi
2007-06-05 V1.4, Updated with re-review findings from PHu, MPi
2007-08-23 V1.5, Fixed typos, added flowchart and modified code for disturbed signal,
MPi
2007-08-28 V1.6, Updated key features and added external interrupt timing, MPi
2008-06-24 V1.7; add information on Port Input Enable; PHu
This document contains 20 pages.

EXTERNAL INTERRUPTS
Warranty and Disclaimer
©Fujitsu Microelectronics Europe GmbH - 3 - MCU-AN -300203-E-V17
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EXTERNAL INTERRUPTS
Contents
MCU-AN -300203-E-V17 - 4 - © Fujitsu Microelectronics Europe GmbH
Contents
REVISION HISTORY............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
CONTENTS .......................................................................................................................... 4
1INTRODUCTION.............................................................................................................. 5
1.1 Key Features........................................................................................................... 5
2EXTERNAL INTERRUPTS .............................................................................................. 6
2.1 Block Diagram......................................................................................................... 6
2.2 Connection Diagram................................................................................................ 6
2.3 Register................................................................................................................... 7
2.3.1 External Interrupt Enable Register (ENIR) ................................................. 7
2.3.2 External Interrupt Request Register (EIRR) ............................................... 7
2.3.3 Request Level Setting Register (ELVR)...................................................... 7
2.3.4 Port Input Enable Register......................................................................... 7
3EXTERNAL INTERRUPT TIMING ................................................................................... 8
4EXTERNAL INTERRUPT EXAMPLES ............................................................................ 9
4.1 Basic Functionality .................................................................................................. 9
4.2 Disturbed Signals .................................................................................................. 10
4.2.1 Sequence Diagram .................................................................................. 11
4.2.2 External Interrupts and DMA.................................................................... 14
4.3 External Interrupts and Wake Up from Stop Mode................................................. 14
4.3.1 Example I ................................................................................................ 14
4.3.2 Example II................................................................................................ 17
5ADDITIONAL INFORMATION ....................................................................................... 18
LIST OF FIGURES ............................................................................................................. 19
LIST OF TABLES............................................................................................................... 20

EXTERNAL INTERRUPTS
Chapter 1 Introduction
©Fujitsu Microelectronics Europe GmbH - 5 - MCU-AN -300203-E-V17
1Introduction
This application note describes the functionality of the External Interrupts and gives some
examples.
1.1 Key Features
The external interrupts have the following features:
•Edge sensitivity - rising and falling selectable
•Level sensitivity - low and high selectable
•ISR execution is started in 200 ns + minimum 10 CPU cycles after first rising / falling
edge at external interrupt pin

EXTERNAL INTERRUPTS
Chapter 2 External Interrupts
MCU-AN -300203-E-V17 - 6 - © Fujitsu Microelectronics Europe GmbH
2External Interrupts
THE BASIC FUNCTIONALITY OF THE EXTERNAL INTERRUPT MODULE
2.1 Block Diagram
Figure 2-1 shows the internal block diagram of an External Interrupt channel.
Figure 2-1: External Interrupts Block Diagram
2.2 Connection Diagram
Figure 2-2 shows the connection diagram depicting how the external interrupt pin INTn is
interfaced to the external circuitry.
The pull up resistor R is connected to limit the current when the key is pressed. The
capacitor (hardware debounce) circuit shown with the dotted line is optional and is used to
eliminate the bouncing of the switch. The RC time constant needs to be chosen according to
the bouncing time or debounce delay of the switch. If such arrangement is not used then the
bouncing needs to be taken care in the software and also vice a versa.
Here the INTn needs to be configured to detect a falling edge.
Figure 2-2: External Interrupts Connection Diagram
C
R
Vcc
MCU
INTn
Pin INTn Interrupt
Request
Edge
Detection
Circuit
MCU

EXTERNAL INTERRUPTS
Chapter 2 External Interrupts
©Fujitsu Microelectronics Europe GmbH - 7 - MCU-AN -300203-E-V17
2.3 Register
2.3.1 External Interrupt Enable Register (ENIR)
This 16 bit register contains the interrupt enable bits for each external interrupt channel.
Writing ‘1’ to these bits enables the corresponding external interrupt requests.
2.3.2 External Interrupt Request Register (EIRR)
This 16 bit register contains the flag which is set if the specified interrupt event occurs at the
corresponding external interrupt pin. Writing “0” to it clears the request. The interrupt request
bit must be cleared by the ISR. These flags can also be used for polling if the corresponding
Interrupt Enable bit is disabled.
2.3.3 Request Level Setting Register (ELVR)
This register contains a pair of control bits LBx:LAx for each channel for the detection kind.
The following table shows the possible settings:
LBx LAx Functionality
0 0 “L” Level Input
0 1 “H” Level Input
1 0 Rising Edge Pin Input
1 1 Falling Edge Pin Input
Table 2-1: ELVR
Where x = 0 to 7 for ELVR0 and 8 to 15 for ELVR1
2.3.4 Port Input Enable Register
External Interrupts need a port pin that is set to digital input mode. Please enable the
corresponding input pin before enabling the external interrupt. See pin assignment in
datasheet to determine which port pin must be enabled.
Example:
External Interrupt 0 shall be used. This is shown as INT0 in pin assignment. On MB96340
series, this function shares pin P07_0. Hence, this pin must be enabled for input:
PIER07_IE0 = 1;

EXTERNAL INTERRUPTS
Chapter 3 External Interrupt Timing
MCU-AN -300203-E-V17 - 8 - © Fujitsu Microelectronics Europe GmbH
3External Interrupt Timing
The following figure shows timing of events for external interrupt. Here it is considered that
external interrupt pin INTn is configured to detect falling edge.
Figure 3-1: External Interrupt Timing
Time required for CPU to finish the current instruction execution is dependent on type of
instruction being executed. If it is one of the interrupt deferring instructions / prefix codes then
it is definitely more than all other instructions. For further details please refer section 2.4.2 of
Interrupts application note MCU-AN-300210.
Time required for the context saving is dependent on various factors. Those are described in
section 2.4.1 of Interrupts application note MCU-AN-300210. The above mentioned time of 10
cycles is the minimum timing required for context saving.
External
interrupt
ISR
execution
Minimum 10
CPU cycles
for context
saving
Time required
for CPU to
finish current
instruction
execution
External
interrupt
recognized
by CPU
First
falling
edge at
external
interrupt
input
200 ns
delay for
noise
filtering
CPU
finishes
current
interrupt
execution
and starts
context
saving
CPU starts
external
interrupt
ISR
execution
INTn

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
©Fujitsu Microelectronics Europe GmbH - 9 - MCU-AN -300203-E-V17
4External Interrupt Examples
EXAMPLES FOR EXTERNAL INTERRUPTS
4.1 Basic Functionality
The following example shows how to set up the External Interrupt Channel 0 of the
MB96340 Series.
Please note, that the corresponding interrupt vector and level has to be defined in the
vectors.c module of our standard template project.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
void InitIrqLevels(void)
{
...
ICR = ((17 & 0xFF) << 8) | 6; // Priority Level 6 for External
// Interrupt 0 of MB96340 Series
}
...
__interrupt void IRQHandler_EI0 (void); // Prototype
...
#pragma intvect IRQHandler_EI0 17 // EXT0 of MB96340 Series
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
void InitExtInt0(void)
{
ADER2 = 0x00; // Port function
PIER07_IE0 = 1; // Enable Port 07_0 input
ELVRL0_LB0 = 0; // LB0, LA0 = 00 -> low level
ELVRL0_LA0 = 0;
EIRR0_ER0 = 0; // reset interrupt request
ENIR0_EN0 = 1; // enable interrupt request
}
...
__interrupt void IRQHandler_EI0 (void)
{
EIRR0_ER0 = 0; // clear interrupt request
...
}

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
MCU-AN -300203-E-V17 - 10 - © Fujitsu Microelectronics Europe GmbH
4.2 Disturbed Signals
If signal on an External Interrupt input pin is disturbed (such as from a bouncing switch), it is
recommended to use edge detection instead of level sensitivity. Also, if the bouncing of the
switch needs to be taken care in the software (i.e. the optional capacitor as shown the Figure
2-2 is not used), then the external interrupt service routine should disable the interrupt for a
time slot greater than the bouncing time. This can be done by a further interrupt using a
timer (e.g. Reload Timer 0).
Figure 4-1: Interrupt Timing – Disturbed Input Signal
This mechanism prevents the application from multiple unwanted interrupts during “bouncing
time”. The same is accomplished using the software for the External Interrupt Channel 0 of
the MB96340 Series in the example on the next page.
In the below example, at the first rising edge of the signal at External Interrupt input pin
INT0, the interrupt service routine IRQHandler_EI0() will be executed and since the initial
value of FLAG variable is TRUE,the Reload Timer RLT0 will be started (A in the above
figure) and no further processing would happen.
After 0.26 seconds (debouncing time, this can be chosen depending upon the type of
key/switch) the interrupt service routine IRQHandle_RLT0() will be executed and it will
enable External Interrupt request again and make value of FLAG variable FALSE.Now by
this time (B in the above figure) since there are multiple edges already appeared at pin INT0,
again interrupt service routine IRQHandler_EI0() will be executed. Within this interrupt
service routine value of FLAG variable will be made TRUE for the next key press and then the
user can do the desired processing considering a “valid” key press, if the key is still pressed
(i.e. if EPSR07_PS0 =1).
It should be noted that the above mentioned logic would work properly only when the key
bounces a few times before settling at a position after a key press.
External
Interrupt
Input
Interrupt
Enable
ISR disables Interrupt after edge detection (A)
Interrupts are enabled again by Timer (B)

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
©Fujitsu Microelectronics Europe GmbH - 11 - MCU-AN -300203-E-V17
4.2.1 Sequence Diagram
Figure 4-2: Sequence Diagram – Disturbed Input Signal
Switch to EI0 ISR
because of Key Bounce
during Debounce Time
Switch to EI0 ISR
@Key Press
IRQHandler_EI0()
Switch back
from ISR
Switch to RLT0 ISR
@Debounce Timer
Expiration
EI0 interrupts re-enabled
RLT0 interrupt flag cleared,
RLT0 interrupts disabled
Clear RLT0 interrupt flag and
disable RLT0 interrupt
IRQHandler_RLT0()
RLT0 Interrupt
Debounce
delay
No action since
EI0 interrupts
disabled, but
interrupt flag
remains set
Consecutive rising
edges at INT0 –
debounce of key
Return
Return
RLT0 (key debounce timer)
started
Trigger RLT0 and
enable RLT0 interrupt
Clear El0 interrupt flag
and disable EI0 interrupt EI0 interrupt flag cleared,
EI0 interrupts disabled
IRQHandler_EI0()
First rising
edge at INT0 –
Key press
Waiting for
External
interrupt
External Interrupt channel
0is initialized for rising
edge interrupts
RLT0 is initialized to
issue interrupt after
0.26 seconds
Initialize External
Interrupt channel 0
Initialize
RLT0
Init
RLT
0()
Driver
main () /
Application Hardware
Init
ExtInt
0()
Switch back
from ISR
Enable EI0 interrupt
Valid key press if key is
still pressed (i.e. if
EPSR07_PS0 =1) after
debounce delay
Clear El0 interrupt flag
Switch back
from ISR
EI0 interrupt flag cleared
Waiting for
External
interrupt

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
MCU-AN -300203-E-V17 - 12 - © Fujitsu Microelectronics Europe GmbH
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
#define TRUE 1
#define FALSE 0
volatile unsigned char FLAG = TRUE;
void InitExtInt0(void)
{
ADER2 = 0x00; // Port function
PIER07_IE0 = 1; // enable Port 07_0 input
ELVRL0_LB0 = 1; // LB0, LA0 = 10 -> Rising edge
ELVRL0_LA0 = 0;
EIRR0_ER0 = 0; // reset interrupt request
ENIR0_EN0 = 1; // enable interrupt request
}
void InitRLT0(void)
{
TMRLR0 = 0xFFFF; // Reload value (about 0.26 s @ 16 MHz)
TMCSR0 = 0x0800; // Prescaler 1:64
}
void main(void)
{
...
InitRLT0(); // initialize RLT0
InitExtInt0(); // initialize EXT0
...
while (1);
}
__interrupt void IRQHandler_EI0(void)
{
EIRR0_ER0 = 0; // clear interrupt request
if (FLAG == TRUE)
{
ENIR0_EN0 = 0; // disable interrupt request, Figure 3-1:(A)
TMCSR0_UF = 0; // clear Reload Timer 0
TMCSR0_TRG = 1; // trigger Reload Timer 0
TMCSR0_INTE = 1; // enable Reload Timer 0 interrupt
}
else
{ FLAG = TRUE; // for next key press
if (1 == EPSR07_PS0)// key still pressed?
{
// valid key press, take required action
}
}
}
__interrupt void IRQHandler_RLT0(void)
{
TMCSR0_UF = 0; // clear Reload Timer 0
TMCSR0_INTE = 0; // disable Reload Timer 0 interrupt
ENIR0_EN0 = 1; // enable External Interrupt request again,
// Figure 3-1:(B)
FLAG = FALSE;
}

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
©Fujitsu Microelectronics Europe GmbH - 13 - MCU-AN -300203-E-V17
Please note, that the ISRs for the External Interrupts and the Reload Timer also has to be
defined in vectors.c.
Also make sure that the RLT0 interrupt priority is higher than that of External Interrupt 0, in
order to avoid nesting of interrupts.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
void InitIrqLevels(void)
{
...
ICR = ((17 & 0xFF) << 8) | 6; // Priority Level 6 for External
// Interrupt 0 of MB96340 Series
ICR = ((51 & 0xFF) << 8) | 5; // Priority Level 5 for Reload
// Timer 0 of MB96340 Series
}
__interrupt void IRQHandler_EI0 (void); // Prototype
__interrupt void IRQHandler_RLT0 (void); // Prototype
#pragma intvect IRQHandler_EI0 17 // EXT0 of MB96340 Series
#pragma intvect IRQHandler_RLT0 51 // RLT0 of MB96340 Series

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
MCU-AN -300203-E-V17 - 14 - © Fujitsu Microelectronics Europe GmbH
4.2.2 External Interrupts and DMA
The user has to take special care when using DMA transfer triggered by an External
Interrupt pin connected to disturbed signal source (as explained before in the section 4.2).
During the bouncing time of the switch, multiple DMA transfers can happen which is not
desired. The DMA as such is not able to disable the interrupts during this bouncing time, so
the software debounce mechanism discussed in section 4.2 cannot be realized in this case.
Hence it is required to use the capacitor (hardware debounce) circuit as shown in Figure 2-2.
By using the same, the bouncing of the switch is eliminated at the hardware level itself and
the clean signal (without noise) would appear at the external interrupt pin.
4.3 External Interrupts and Wake Up from Stop Mode
4.3.1 Example I
The following example shows, that External Interrupts can be used to request a stop mode
and can wake up the MCU from this mode.
External Interrupt 0 is used to wake up the MCU and External Interrupt 1 is used to request a
stop mode. Before stop mode “0x0F“is written to Port00, during run mode this Port is
counting.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
// initialise external int 0
void Init_extint0 (void)
{
ADER2_ADE16 = 0; // select IO mode
PIER07_IE0 = 1;
ENIR0_EN0 = 0; // disable ext int 0
ELVR0_LA0 = 1;
ELVR0_LB0 = 1; // LB0,LA0 = 11 -> falling edge
}
// initialise external int 1
void Init_extint1 (void)
{
ADER2_ADE17 = 0; // select IO mode
PIER07_IE1 = 1;
ENIR0_EN1 = 0; // disable interrupt request
ELVR0_LA1 = 1;
ELVR0_LB1 = 1; // LB1,LA1 = 11 -> falling edge
}
P

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
©Fujitsu Microelectronics Europe GmbH - 15 - MCU-AN -300203-E-V17
Q
void main (void)
{
PDR00 = 0x00; // clear port data
DDR00 = 0xFF; // set port 0 to output
Init_extint0();
Init_extint1();
InitIrqLevels();
__set_il(7); // allow all levels
__EI(); // globally enable interrupts
EIRR0_ER1 = 0; // clear ext. int 1 request flag
ENIR0_EN1 = 1; // enable ext. int1
status = RUNMODE;
while(1)
{
if (status == STOPREQUEST) // stop mode request
{
PDR00 = 0x0F;
SMCR = 0x03; // goto stop mode, preserve pin state
}
else // run mode
{
for (i = 0; i < 50000; i++) // wait loop
{
__asm(" NOP");
__asm(" NOP");
}
PDR00++; // show, that MCU is running
}
}
}
// ISR external Int 0
__interrupt void IRQ_extint0 (void)
{
status = RUNMODE;
EIRR0_ER0 = 0; // clear ext. int 0 request flag
ENIR0_EN0 = 0; // disable ext. int0
EIRR0_ER1 = 0; // clear ext. int 1 request flag
ENIR0_EN1 = 1; // enable ext. int1
}
// ISR external Int 1
__interrupt void IRQ_extint1 (void)
{
status = STOPREQUEST;
EIRR0_ER0 = 0; // clear ext. int 0 request flag
ENIR0_EN0 = 1; // enable ext. int0
EIRR0_ER1 = 0; // clear ext. int 1 request flag
ENIR0_EN1 = 0; // disable ext. int1
}

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
MCU-AN -300203-E-V17 - 16 - © Fujitsu Microelectronics Europe GmbH
Please note, that the corresponding interrupt vector and level has to be defined in the
vectors.c module of our standard template project.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
void InitIrqLevels(void)
{
...
ICR = ((17 & 0xFF) << 8) | 6; // Priority Level 6 for External
// Interrupt 0 of MB96340 Series
ICR = ((18 & 0xFF) << 8) | 6; // Priority Level 6 for External
// Interrupt 1 of MB96340 Series
}
...
__interrupt void IRQ_extint0 (void); // Prototype EXT0
__interrupt void IRQ_extint1 (void); // Prototype EXT1
. . .
#pragma intvect IRQ_extint0 17 // EXT0 of MB96340 Series
#pragma intvect IRQ_extint1 18 // EXT1 of MB96340 Series
...

EXTERNAL INTERRUPTS
Chapter 4 External Interrupt Examples
©Fujitsu Microelectronics Europe GmbH - 17 - MCU-AN -300203-E-V17
4.3.2 Example II
The following example shows to request a stop mode and to wake the MCU up from this
mode using External Interrupt 0. After the MCU is in stop mode, if the falling edge appears at
External Interrupt 0 pin, then the MCU wakes up and continues executing the program.
There is no need to have an interrupt service routine in this case.
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*---------------------------------------------------------------------------*/
// Initialise external int 0
void Init_extint0 (void)
{
ADER2_ADE16 = 0; // select IO mode
PIER07_IE0 = 1;
ENIR0_EN0 = 0; // disable ext int 0
ELVR0_LA0 = 1;
ELVR0_LB0 = 1; // LB0,LA0 = 11 -> falling edge
EIRR0_ER0 = 0; // clear ext. int 0 request flag
}
// Request stop mode
void Request_stop (void)
{
__DI(); // globally disable interrupts
EIRR0_ER0 = 0; // clear ext. int 0 request flag
ENIR0_EN0 = 1; // enable ext int 0
SMCR = 0x03; // goto stop mode
EIRR0_ER0 = 0; // clear ext. int 0 request flag after wakeup
__EI(); // globally disable interrupts
}
void main (void)
{
InitIrqLevels();
__set_il(7); // allow all levels
__EI(); // globally enable interrupt
Init_extint0();
Request_stop()
...
...
}

EXTERNAL INTERRUPTS
Chapter 5 Additional Information
MCU-AN -300203-E-V17 - 18 - © Fujitsu Microelectronics Europe GmbH
5Additional Information
Information about FUJITSU Microcontrollers can be found on the following Internet page:
http://mcu.emea.fujitsu.com/
The software examples related to this application note is:
96340_irq_ext
96340_irq_ext_stop_wakeup
It can be found on the following Internet page:
http://mcu.emea.fujitsu.com/mcu_product/mcu_all_software.htm

EXTERNAL INTERRUPTS
List of Figures
©Fujitsu Microelectronics Europe GmbH - 19 - MCU-AN -300203-E-V17
List of Figures
Figure 2-1: External Interrupts Block Diagram....................................................................... 6
Figure 2-2: External Interrupts Connection Diagram .............................................................. 6
Figure 3-1: External Interrupt Timing...................................................................................... 8
Figure 4-1: Interrupt Timing – Disturbed Input Signal .......................................................... 10
Figure 4-2: Sequence Diagram – Disturbed Input Signal...................................................... 11

EXTERNAL INTERRUPTS
List of Tables
MCU-AN -300203-E-V17 - 20 - © Fujitsu Microelectronics Europe GmbH
List of Tables
Table 2-1: ELVR ..................................................................................................................... 7